JPH02141148U - - Google Patents
Info
- Publication number
- JPH02141148U JPH02141148U JP4959189U JP4959189U JPH02141148U JP H02141148 U JPH02141148 U JP H02141148U JP 4959189 U JP4959189 U JP 4959189U JP 4959189 U JP4959189 U JP 4959189U JP H02141148 U JPH02141148 U JP H02141148U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- frequency
- communication satellite
- pll
- controls
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000008929 regeneration Effects 0.000 claims description 3
- 238000011069 regeneration method Methods 0.000 claims description 3
- 238000012544 monitoring process Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 230000005540 biological transmission Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
Landscapes
- Radio Relay Systems (AREA)
Description
第１図はこの考案に係る通信衛星用の送信装置
の実施例を示すブロツク図、第２図は従来のブロ
ツク図である。
主な符号の説明、１……通信衛星、２……送信
機、３……受信アンテナ、４……キヤリア再生回
路、５……ＰＬＬ回路、６……ＡＦＣ回路、７…
…モジユレータ、８……送信アンテナ、９……同
期検出回路、１０……パワーモニタ回路、１１…
…コントロール回路、１２……表示部。
FIG. 1 is a block diagram showing an embodiment of a transmitting device for a communication satellite according to this invention, and FIG. 2 is a conventional block diagram. Explanation of main symbols, 1...Communication satellite, 2...Transmitter, 3...Receiving antenna, 4...Carrier regeneration circuit, 5...PLL circuit, 6...AFC circuit, 7...
...Modulator, 8...Transmission antenna, 9...Synchronization detection circuit, 10...Power monitor circuit, 11...
...control circuit, 12...display section.
Claims (1)
再生回路と、キヤリア再生回路の出力周波数に同
期してロツクするＰＬＬ回路と、このＰＬＬ回路
の出力周波数にしたがつてモジユレータのアツプ
リンク周波数を制御するＡＦＣ回路とからなり、
通信衛星内部のローカル発振器の周波数ドリフト
を地上局側のアツプリンク周波数を変化させるこ
とによつて補正し、ダウンリンク周波数を一定に
するようにした通信衛星用の送信装置において、 受信信号の電力を監視するパワーモニタ回路と
、このパワーモニタ回路の監視結果と前記ＰＬＬ
回路のロツクまたはアンロツク状態に基づき前記
ＡＦＣ回路を制御するコントロール回路とで構成
したことを特徴とする通信衛星用の送信装置。[Scope of Claim for Utility Model Registration] A carrier regeneration circuit that regenerates a carrier based on received radio waves, a PLL circuit that locks in synchronization with the output frequency of the carrier regeneration circuit, and a modulator that increases in accordance with the output frequency of this PLL circuit. It consists of an AFC circuit that controls the link frequency,
In a communication satellite transmitter, the frequency drift of the local oscillator inside the communication satellite is corrected by changing the uplink frequency on the ground station side, and the downlink frequency is kept constant. A power monitor circuit to monitor, a monitoring result of this power monitor circuit, and the PLL
1. A transmitting device for a communication satellite, comprising a control circuit that controls the AFC circuit based on a locked or unlocked state of the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4959189U JPH079461Y2 (en) | 1989-04-28 | 1989-04-28 | Transmitter for communication satellite |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4959189U JPH079461Y2 (en) | 1989-04-28 | 1989-04-28 | Transmitter for communication satellite |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02141148U true JPH02141148U (en) | 1990-11-27 |
| JPH079461Y2 JPH079461Y2 (en) | 1995-03-06 |
Family
ID=31567414
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4959189U Expired - Lifetime JPH079461Y2 (en) | 1989-04-28 | 1989-04-28 | Transmitter for communication satellite |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH079461Y2 (en) |
-
1989
- 1989-04-28 JP JP4959189U patent/JPH079461Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH079461Y2 (en) | 1995-03-06 |
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