JPH02143468A - Solar cell - Google Patents

Solar cell

Info

Publication number
JPH02143468A
JPH02143468A JP63296975A JP29697588A JPH02143468A JP H02143468 A JPH02143468 A JP H02143468A JP 63296975 A JP63296975 A JP 63296975A JP 29697588 A JP29697588 A JP 29697588A JP H02143468 A JPH02143468 A JP H02143468A
Authority
JP
Japan
Prior art keywords
solar cell
films
semiconductor
substrate
bumps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP63296975A
Other languages
Japanese (ja)
Inventor
Masao Aiga
相賀 正夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP63296975A priority Critical patent/JPH02143468A/en
Publication of JPH02143468A publication Critical patent/JPH02143468A/en
Pending legal-status Critical Current

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Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

PURPOSE:To manufacture an integrated solar cell in high efficiency and having sufficiently effective space regardless of the specific resistance of semiconductor films by a method wherein the cells are isolated by the bumps of substrates comprising ceramics etc., as well as the grooves cut by physical removal of the semiconductor films. CONSTITUTION:A ceramic substrate 1 is sectioned into equispaces by square sectional bumps 11'. First, Si powder is heaped up on the substrate 1' to be heated and melted down in H2 so that the substrate 1' may be doped with the Si powder to give the specific resistance of 0.001OMEGAcm. Secondly, active layers 3'. in the same conductivity type and the specific resistance of 0.1-1.0OMEGAcm are formed on semiconductor films 2' by liquid deposition process. Thirdly, fine crystalline hydrogenated Si films 4 in inverse conductivity type to that of the films 3' are laminated on the films 3' to make pn junctions. Fourthly, the films 3', 4' are deposited only on the parts above Si underneath layers. Fifthly, grooves 12 reaching the semiconductor films 2' are cut in parallel with the bumps 11'. Finally, the sectional regions 13' by the grooves 12' and the bumps 11' are melted down linearly into conductive channels 13' by laser beams to be communicated with the semiconductor films 2 so that cells A, B may be connected by paste 5' to be covered with reflection preventive films 15' for the completion of an integrated poly Si solar cell.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明は多結晶材料を用いた太陽電池の構造に関する
ものであり、特に−個の基板上に複数個の発電領域が直
列に接続されてなる集積型太陽電池に関し、その低コス
ト化を実現するものである。
[Detailed Description of the Invention] [Industrial Application Field] This invention relates to the structure of a solar cell using a polycrystalline material, and particularly relates to a solar cell structure in which a plurality of power generation regions are connected in series on - substrates. The present invention aims to reduce the cost of integrated solar cells.

〔従来の技術〕[Conventional technology]

第2図a)は、U、S、P、 4,042,418に示
された従来の集積型多結晶太陽電池の平面図、第2図b
)は同じく断面図である。図において、1はセラミック
やガラス等の絶縁性基板、2は絶縁性基板1の一表面の
部分に被着されたCuやA1などの金属薄膜、3は発電
を担う第1の半導体膜(例えばCu25)、4は第1の
半導体膜3と接合を形成する第2の半導体膜(例えばC
d5)、5は第2の半導体膜4の表面に部分的に被着さ
れたAIやAg等の金属部、6は同じく第2の半導体膜
4の表面部分に被着され金属部5と電気的な接触をもち
、拡散原子源(Zn等)を含む、例えばカーボン粉から
なる導電体ペーストである。
Figure 2a) is a plan view of the conventional integrated polycrystalline solar cell shown in U, S, P, 4,042,418, Figure 2b
) is also a sectional view. In the figure, 1 is an insulating substrate such as ceramic or glass, 2 is a metal thin film such as Cu or A1 deposited on one surface of the insulating substrate 1, and 3 is a first semiconductor film responsible for power generation (e.g. Cu25), 4 is a second semiconductor film forming a junction with the first semiconductor film 3 (for example, C
d5), 5 is a metal part such as AI or Ag that is partially deposited on the surface of the second semiconductor film 4, and 6 is also deposited on the surface part of the second semiconductor film 4 and is electrically connected to the metal part 5. It is a conductive paste made of, for example, carbon powder, which has an atomic contact and contains a diffused atomic source (such as Zn).

例えばAで示す細線ではさまれた部分は、半導体膜3と
4からなる接合と、これらの各々と電気的に接触し、か
つ電極となる金属部分2と5によって一個のユニット太
陽電池を構成している。Bも同様の構成をもつ別のユニ
ット太陽電池である。
For example, the part sandwiched by the thin lines indicated by A constitutes one unit solar cell by a junction made of semiconductor films 3 and 4 and metal parts 2 and 5 that are in electrical contact with each of these and serve as electrodes. ing. B is another unit solar cell having a similar configuration.

ここで導電体ペースト6に含まれる拡散源の原子を温度
を上げて半導体3及び4に拡散させると、この部分の抵
抗が下がり金属薄膜2と導電体ベースト6との間に導電
部分7(ハツチングを施した部分)が形成される。この
導電部分7はユニット太陽電池Aの金属部5とユニット
太陽電油Bの金属薄膜2を接続している。また各々のユ
ニット太陽電池には隣接するユニット太陽電池と同様な
電気的接続が形成される。この場合間隙aと間隙すの電
気抵抗が小さいと、各々のユニット太陽電池の出力はこ
の部分の抵抗によって消費され、十分な出力が取り出せ
ないことになる。このような不都合を避けるため、半導
体膜3及び4の比抵抗を十分高くとるか(1〜100Ω
cm)、あるいは比抵抗が低い場合は間隙a及びbを広
くとることが必要となる。
When the temperature of the diffusion source atoms contained in the conductor paste 6 is increased to diffuse them into the semiconductors 3 and 4, the resistance of this portion decreases and a conductive portion 7 (hatching) is formed between the metal thin film 2 and the conductor base 6. ) is formed. This conductive portion 7 connects the metal portion 5 of the unit solar cell A and the metal thin film 2 of the unit solar cell B. Additionally, each unit solar cell is provided with electrical connections similar to those of adjacent unit solar cells. In this case, if the electrical resistance between the gap a and the gap is small, the output of each unit solar cell will be consumed by the resistance of this part, and sufficient output will not be obtained. In order to avoid such inconvenience, the resistivity of the semiconductor films 3 and 4 should be set sufficiently high (1 to 100Ω).
cm) or when the specific resistance is low, it is necessary to widen the gaps a and b.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

半導体膜3及び4の比抵抗を高くするという条件は低コ
ストで優れた特性の薄膜多結晶シリコン(Si)を用い
た太陽電池に対して設計上好ましくない条件を課するこ
とになる。すなわち高効率薄膜多結晶Stの比抵抗は1
Ωc11以下が望ましい。
The condition of increasing the specific resistance of the semiconductor films 3 and 4 imposes an unfavorable design condition on a solar cell using thin film polycrystalline silicon (Si), which is low in cost and has excellent characteristics. In other words, the specific resistance of high-efficiency thin film polycrystalline St is 1
It is desirable that Ωc be 11 or less.

また間隙a及びbを増すことは、発電に寄与しない無効
面積を増すことになり、単位面積当たりの出力、すなわ
ち効率を低下させるなどの不都合があった。
Furthermore, increasing the gaps a and b increases the ineffective area that does not contribute to power generation, which has the disadvantage of reducing the output per unit area, that is, the efficiency.

本発明は以上のような従来の問題点を解決するためにな
されたもので、比較的比抵抗が低く、シかも低コストで
公害等の問題の無い材料であるSiを用い、かつ充分な
有効面積を確保して高い効率が得られる集積型多結晶太
陽電池を提供することを目的とするものである。
The present invention was made in order to solve the above-mentioned conventional problems, and uses Si, which is a material with relatively low resistivity, low cost, and no pollution problems, and has sufficient effectiveness. The purpose of this invention is to provide an integrated polycrystalline solar cell that can secure a large area and provide high efficiency.

〔課題を解決するための手段〕[Means to solve the problem]

この発明にかかる太陽電池は、絶縁基板に線状の突起を
形成して該基板上に形成される半導体部分が小部分に分
割されるようにし、該突起の間の各へこみの領域におい
て上記半導体部分上に半導体層を形成して太陽電池を形
成し、また第2図の間隙aに相当する表面の分離を行う
ために、ダイシングソーによるスクライブ等による溝を
形成して太陽電池を主たる発電領域と接続領域とに分離
し、該発電領域と接続領域とは上記半導体部分により電
気的に接続し、ひとつの太陽電池の接続領域と他の太陽
電池の主たる発電領域とは上記突起上を介して電気的に
接続したものである。
In the solar cell according to the present invention, linear protrusions are formed on an insulating substrate so that a semiconductor portion formed on the substrate is divided into small parts, and the semiconductor portion is formed in a region of each recess between the protrusions. A semiconductor layer is formed on the portion to form a solar cell, and in order to separate the surface corresponding to the gap a in Fig. 2, a groove is formed by scribing with a dicing saw, etc. The power generation region and the connection region are electrically connected by the semiconductor portion, and the connection region of one solar cell and the main power generation region of the other solar cell are connected via the protrusion. It is electrically connected.

〔作用〕[Effect]

この発明においては、絶縁基板は堤状の突起によって面
積の等しい複数の部分に分割されており、その上に形成
する半導体部分は溶融状態にすることによって基板の低
い部分に集まるから、該半導体部分上に半導体層からな
る太陽電池を突起によって形成される各へこみ部分に電
気的に独立して形成できる。また上記太陽電池はその一
部に形成された溝により主たる発電領域と接続領域とに
分けられ、上記接続領域と主たる発電領域とは基板と接
する面において半導体部分により電気的に接続されると
ともに表面部分において上記溝によって電気的に分離せ
られ、ひとつのへこみ部分の太陽電池の接続領域とこれ
と隣接する他のへこみ部分の太陽電池の主たる発電領域
とは上記突起上を介して電気的に接続され、このように
してユニット太陽電池の直列接続が可能となる。また突
起による分離によってユニット間の間隔が小さくなり、
充分な有効面積を確保でき、高い効率が得られる。
In this invention, the insulating substrate is divided into a plurality of parts having equal areas by the bank-like protrusions, and the semiconductor part formed thereon is brought into a molten state and gathered at the lower part of the substrate, so that the semiconductor part A solar cell having a semiconductor layer thereon can be formed electrically independently in each depression formed by the protrusion. Further, the solar cell is divided into a main power generation region and a connection region by a groove formed in a part thereof, and the connection region and the main power generation region are electrically connected by a semiconductor portion on the surface in contact with the substrate, and the surface The connecting area of the solar cell in one recessed part is electrically connected to the main power generation area of the solar cell in the other adjacent recessed part through the above-mentioned protrusion. In this way, series connection of unit solar cells is possible. In addition, separation by protrusions reduces the distance between units,
A sufficient effective area can be secured and high efficiency can be obtained.

また基板側導電膜として用いる半導体部分を厚くするよ
うにすれば、厚み方向の加工精度に対する余裕をとって
、ダイシングソーによる表面層の分離を実現できる。
Furthermore, by making the semiconductor portion used as the substrate-side conductive film thick, a margin for processing accuracy in the thickness direction can be secured, and separation of the surface layer using a dicing saw can be realized.

〔実施例〕〔Example〕

以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.

第1図、a)はこの発明の一実施例による太陽電池の基
板の斜視図、b)は同じく断面図であり、この第1図を
用いて本実施例の製造方法について説明する。
FIG. 1A is a perspective view of a substrate of a solar cell according to an embodiment of the present invention, and FIG. 1B is a cross-sectional view thereof.The manufacturing method of this embodiment will be explained using FIG.

1−はセラミック(例えばアルミナ等)からなる基板で
、0.1〜0.5mm角の概略正方形の断面をもつ突起
状の堤11′によって面積の等しい小部分に分割されて
いる。基板1−上に例えばSi粉末を仕込み、還元雰囲
気中で加熱溶融し冷却する。不純物の量はp型であれn
型であれ、比抵抗が0.001Ωcmとなるように調節
する。この結果、512−が堤11−と堤11−の間に
溶けて膜を形成し、第1図C)のようになる。この半導
体膜2゛は下部電極として用いるもので、発電のための
活性層ではない。発電のための活性層3−は液相成長法
と呼ばれる方法で、SiとSnの溶液の底部に上記の半
導体膜2゛が形成された基板を置き、800〜1200
℃の間で過飽和となった5iSn溶液を徐々に冷却する
ことによって該溶液から第1図d)に示すようにSiか
らなる半導体膜3−を半導体膜2゛上に析出させる。こ
の場合、半導体膜3′は半導体膜2−と同一の導電型で
かつ比抵抗が0.1〜1.0Ωc1の範囲のものが望ま
しい。
Reference numeral 1- denotes a substrate made of ceramic (for example, alumina, etc.), which is divided into small parts of equal area by protruding banks 11' having a roughly square cross section of 0.1 to 0.5 mm square. For example, Si powder is placed on the substrate 1-, melted by heating in a reducing atmosphere, and cooled. The amount of impurities is n even if it is p-type.
Regardless of the type, adjust the specific resistance to 0.001 Ωcm. As a result, 512- dissolves between the banks 11- and 11- to form a film, as shown in FIG. 1C). This semiconductor film 2' is used as a lower electrode and is not an active layer for power generation. The active layer 3- for power generation is formed by a method called liquid phase growth, by placing the substrate on which the semiconductor film 2 is formed at the bottom of a solution of Si and Sn,
By gradually cooling the 5iSn solution, which has become supersaturated at a temperature between 0.degree. In this case, the semiconductor film 3' is preferably of the same conductivity type as the semiconductor film 2- and has a specific resistance in the range of 0.1 to 1.0 Ωc1.

続いて、半導体膜3−と反対導電型の微結晶水素化シリ
コン膜からなる半導体膜4゛を第1図e)に示すように
堆積し、pn接合を形成する。これはPH3(n型)ま
たはB2 Ha  (p型)などの不純物ガスをSiH
,とH2の混合ガスに加えてグロー放電分解することに
よって行うことができる。あるいは、BCl2(p型)
またはPOCI、(n型)のようなガスを半導体膜3゛
の表面と接触させておき、ArFエキシマレーザでこの
表面を照射加熱することによってドーピングを行い、反
対導電型の半導体膜4−を形成することも可能である。
Subsequently, a semiconductor film 4' made of a microcrystalline hydrogenated silicon film of a conductivity type opposite to that of the semiconductor film 3- is deposited as shown in FIG. 1e) to form a pn junction. This converts impurity gas such as PH3 (n-type) or B2 Ha (p-type) into SiH
, and H2 in addition to glow discharge decomposition. Alternatively, BCl2 (p-type)
Alternatively, a gas such as POCI (n-type) is brought into contact with the surface of the semiconductor film 3, and the surface is irradiated and heated with an ArF excimer laser to perform doping, thereby forming a semiconductor film 4- of the opposite conductivity type. It is also possible to do so.

半導体膜3゛及び4′は下地にStのある部分にのみ堆
積する。次に例えばダイシングソーを用いて、堤11゛
に平行な77412−を第1図f)に示すように掘る。
The semiconductor films 3' and 4' are deposited only on the portions where the underlying layer is St. Next, using, for example, a dicing saw, a hole 77412- parallel to the embankment 11' is dug as shown in FIG. 1f).

この溝12は半導体膜4゛及び3−を切断して半導体膜
2′にまで届くようにするが5、半導体膜2′を切断し
ないようにする。
This groove 12 cuts the semiconductor films 4' and 3- so as to reach the semiconductor film 2', but does not cut the semiconductor film 2'.

これは半導体膜2−の厚みを十分に厚くとる(100〜
500μm)ことによって可能となる。
This is done by making the semiconductor film 2- sufficiently thick (100~
500 μm).

溝12−と堤11−で区切られた細かい領域13−を第
1図g)に示すようにレーザビーム(例えばArレーザ
)で照射掃引し、半導体膜3゛4−及び2′の一部を点
線状または線状に溶融して導電路13−とじ、半導体膜
2−と電気的に導通するようにする。すなわち溶融した
半導体によって半導体膜2゛と半導体膜4゛が短絡され
る。
A fine region 13- separated by the groove 12- and the bank 11- is irradiated and swept with a laser beam (for example, an Ar laser) as shown in FIG. The conductive path 13- is melted in a dotted or linear shape so as to be electrically connected to the semiconductor film 2-. That is, the semiconductor film 2' and the semiconductor film 4' are short-circuited by the molten semiconductor.

さらに隣合うセルAとBを直列に連結(電気的に接続)
するため、銀ペースト5−をパターン化して印刷し焼成
する。その場合第1図h)のようにセルAのセクション
でレーザで溶融した部分13−の表面と、セルBの半導
体膜4″のうちで溝12′で分けられた広い方の発電領
域14−とを結ぶような、例えば櫛杖の電極5゛を形成
する。この後既知の方法によって反射防止膜15′(例
えばTiO2膜)を形成することによって集積型の多結
晶Sf太陽電池か完成する。
Furthermore, adjacent cells A and B are connected in series (electrically connected)
In order to do this, the silver paste 5- is patterned, printed, and fired. In that case, as shown in Fig. 1h), the surface of the laser-melted portion 13- in the section of cell A and the wider power generation region 14- of the semiconductor film 4'' of cell B separated by the groove 12'. For example, a comb-like electrode 5' is formed to connect the two.Thereafter, an antireflection film 15' (for example, a TiO2 film) is formed by a known method to complete an integrated polycrystalline Sf solar cell.

接合を微結晶の半導体膜4′で形成した場合は、反射防
止膜15゛としては蒸着またはスパッタで形成したIT
Oを用いることが望ましい。この場合は、半導体膜4−
を形成した後でかつ溝12′を形成する前にITOの形
成を行うので、第1図h)に示す反射防止膜15′は無
く、半導体膜4゛と電極5゛の旧に挟まれた層となる(
図示せず)。
When the junction is formed with a microcrystalline semiconductor film 4', the antireflection film 15' is an IT film formed by vapor deposition or sputtering.
It is desirable to use O. In this case, the semiconductor film 4-
Since the ITO is formed after forming the groove 12' and before forming the groove 12', there is no anti-reflection film 15' shown in Figure 1h), which is sandwiched between the semiconductor film 4' and the electrode 5'. layered (
(not shown).

またこのような構造で、半導体膜4′の上にアモルファ
スシリコンからなるpin接合太陽電池を層状に形成し
、続いて反射防止膜15゛としてITOを形成したのち
溝12−を形成し、以下上記実施例のような工程を行な
うようにすれば、発電層が2層積層された構造の太陽電
池で、かつ集積型の太陽電池を実現することができる。
Further, with such a structure, a pin junction solar cell made of amorphous silicon is formed in a layered manner on the semiconductor film 4', and then ITO is formed as the antireflection film 15', and then the groove 12- is formed, and the above-mentioned process is subsequently performed. By performing the steps as in the embodiment, it is possible to realize an integrated type solar cell having a structure in which two power generation layers are laminated.

〔発明の効果〕〔Effect of the invention〕

以上のように本発明によれば、太陽電池において、隣接
するセルの分離を、セラミック等の基板の突起と半導体
膜を物理的に除去して形成した溝とによって行うように
したので、半導体膜の比抵抗の大小にかかわらず充分な
有効面積を存し高い効率が得られる集積型構造の太陽電
池を実現できる効果がある。
As described above, according to the present invention, in a solar cell, adjacent cells are separated by a groove formed by physically removing a semiconductor film and a protrusion on a substrate such as a ceramic. This has the effect of realizing a solar cell with an integrated structure that has a sufficient effective area and can achieve high efficiency regardless of the specific resistance of the solar cell.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例を示す図で、a)は基板の
斜視図、b)は基板の断面図、C)〜h)は順次各製造
工程での断面を示す図、第2図は従来の太陽電池を示す
図である。 図において、1.1”は基板、2.2−は基板側電極、
3.3”は発電部分となる第1の半導体層、4.4−は
第1の半導体層3と反対導電型の第2の半導体層、5は
上部電極、6は電極の一部を構成する拡散源の層、7は
拡散による導電路、11″は基板に設けられた突起、1
2−は溝、13−はレーザ溶融した導電路、14″は発
電領域、15′は反射防止膜である。 なお図中同一符号は同−又は、相当部分を示す。
FIG. 1 is a diagram showing an embodiment of the present invention, in which a) is a perspective view of a substrate, b) is a cross-sectional view of the substrate, C) to h) are views sequentially showing cross-sections in each manufacturing process, and FIG. The figure shows a conventional solar cell. In the figure, 1.1" is the substrate, 2.2- is the substrate side electrode,
3.3'' is a first semiconductor layer which becomes a power generation part, 4.4- is a second semiconductor layer of the opposite conductivity type to the first semiconductor layer 3, 5 is an upper electrode, and 6 is a part of an electrode. 7 is a diffusion source layer, 7 is a conductive path by diffusion, 11″ is a protrusion provided on the substrate, 1
2- is a groove, 13- is a conductive path melted by laser, 14'' is a power generation area, and 15' is an anti-reflection film. Note that the same reference numerals in the drawings indicate the same or corresponding parts.

Claims (1)

【特許請求の範囲】 1)複数の突起により形成される複数のへこみをもつ絶
縁体からなる基板上の各へこみ部分に導電層となる半導
体部分が形成され、 上記へこみ部分の半導体部分上に半導体層が形成されて
太陽電池が各へこみ部分ごとに電気的に独立して形成さ
れ、 上記太陽電池はその一部に形成された溝により主たる発
電領域と接続領域とに分けられ、 上記接続領域と主たる発電領域とは基板と接する面にお
いて上記半導体部分により電気的に接続されるとともに
表面部分において上記溝によって電気的に分離せられ、 ひとつのへこみ部分の太陽電池の接続領域とこれと隣接
する他のへこみ部分の太陽電池の主たる発電領域とは上
記突起上を介して電気的に接続されていることを特徴と
する太陽電池。
[Claims] 1) A semiconductor portion serving as a conductive layer is formed in each recessed portion of a substrate made of an insulator having a plurality of recesses formed by a plurality of protrusions, and a semiconductor portion is formed on the semiconductor portion of the recessed portion. A layer is formed and a solar cell is formed electrically independently in each recessed part, and the solar cell is divided into a main power generation area and a connection area by a groove formed in a part of the solar cell, and the connection area and the connection area are divided into a main power generation area and a connection area. The main power generation area is electrically connected by the semiconductor part on the surface in contact with the substrate and electrically separated by the groove on the surface part, and includes the connection area of the solar cell in one recessed part and the other area adjacent to this. A solar cell characterized in that the recessed portion of the solar cell is electrically connected to the main power generation area of the solar cell through the projection.
JP63296975A 1988-11-24 1988-11-24 Solar cell Pending JPH02143468A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63296975A JPH02143468A (en) 1988-11-24 1988-11-24 Solar cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63296975A JPH02143468A (en) 1988-11-24 1988-11-24 Solar cell

Publications (1)

Publication Number Publication Date
JPH02143468A true JPH02143468A (en) 1990-06-01

Family

ID=17840624

Family Applications (1)

Application Number Title Priority Date Filing Date
JP63296975A Pending JPH02143468A (en) 1988-11-24 1988-11-24 Solar cell

Country Status (1)

Country Link
JP (1) JPH02143468A (en)

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