JPH0214348A - ダイナミックdma伝送サイズ用装置 - Google Patents

ダイナミックdma伝送サイズ用装置

Info

Publication number
JPH0214348A
JPH0214348A JP3947689A JP3947689A JPH0214348A JP H0214348 A JPH0214348 A JP H0214348A JP 3947689 A JP3947689 A JP 3947689A JP 3947689 A JP3947689 A JP 3947689A JP H0214348 A JPH0214348 A JP H0214348A
Authority
JP
Japan
Prior art keywords
output
bit
input
scheme
memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3947689A
Other languages
English (en)
Japanese (ja)
Inventor
Venelin G Barbutov
ベネリン・ゲオルギエフ・バルブトフ
Khristo A Turlakov
ヒリスト・アレキサンドロフ・トウルラコフ
Dimitar D Rachev
デイミテル・ドブレフ・ラチエフ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CENTRAL INST PO IZCHISLITEL TECHNIKA I TECHNOL
Original Assignee
CENTRAL INST PO IZCHISLITEL TECHNIKA I TECHNOL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CENTRAL INST PO IZCHISLITEL TECHNIKA I TECHNOL filed Critical CENTRAL INST PO IZCHISLITEL TECHNIKA I TECHNOL
Publication of JPH0214348A publication Critical patent/JPH0214348A/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/20Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/28Handling requests for interconnection or transfer for access to input/output bus using burst mode transfer, e.g. direct memory access DMA, cycle steal
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38Information transfer, e.g. on bus
    • G06F13/40Bus structure
    • G06F13/4004Coupling between buses
    • G06F13/4009Coupling between buses with data restructuring
    • G06F13/4018Coupling between buses with data restructuring with data-width conversion

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Bus Control (AREA)
  • Exchange Systems With Centralized Control (AREA)
JP3947689A 1988-02-25 1989-02-21 ダイナミックdma伝送サイズ用装置 Pending JPH0214348A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
BG8313088A BG47775A1 (en) 1988-02-25 1988-02-25 Device for dynamic controlling of volume size in direct access
BG83130 1988-02-25

Publications (1)

Publication Number Publication Date
JPH0214348A true JPH0214348A (ja) 1990-01-18

Family

ID=3920193

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3947689A Pending JPH0214348A (ja) 1988-02-25 1989-02-21 ダイナミックdma伝送サイズ用装置

Country Status (5)

Country Link
JP (1) JPH0214348A (de)
BG (1) BG47775A1 (de)
DD (1) DD301955A9 (de)
DE (1) DE3905304A1 (de)
HU (1) HUT52887A (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2502403B2 (ja) * 1990-07-20 1996-05-29 三菱電機株式会社 Dma制御装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4514808A (en) * 1978-04-28 1985-04-30 Tokyo Shibaura Denki Kabushiki Kaisha Data transfer system for a data processing system provided with direct memory access units
JPS5892025A (ja) * 1981-11-26 1983-06-01 Hitachi Ltd デ−タ処理方式
US4530053A (en) * 1983-04-14 1985-07-16 International Business Machines Corporation DMA multimode transfer controls

Also Published As

Publication number Publication date
HUT52887A (en) 1990-08-28
BG47775A1 (en) 1990-09-14
DD301955A9 (de) 1994-08-11
DE3905304A1 (de) 1989-09-07

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