JPH02152280A - Manufacturing method of photodetector - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a light receiving element, and in particular to an optoelectronic integrated circuit (OEIC) used in optical fiber communication.
) used in the production of

[Conventional technology]

Conventionally, techniques in this field include [Applied Electronic Materials Subcommittee Research Report J No. 423. p, 8-13 (
The one disclosed in Japan Society of Applied Physics, May 10, 1988) is known. In such a conventional light receiving element, a buffer layer made of n-type GaInAs, a cathode layer made of n-type GaInAs, and an n-type GaInAs are formed on a semi-insulating InP substrate.
Etching stopper layer made of type InP, n-type GaI
It is formed by stacking a layer (one layer) made of nAs, an anode layer made into p-type by ion-implanting Be into GaInAs.

Here, the above etching stopper layer is provided for the following reasons. In other words, in 0EIC, the PIN
- It is necessary to take out the anode and cathode electrodes of the PD (pin type photodiode) from the top surface of the chip. Here, the anode electrode can be easily taken out from the top layer (anode layer) of the epitaxially grown layer, but the cathode electrode needs to be taken out from the middle of the epitaxially grown layer, so it is necessary to expose the cathode layer by selective etching. There is. Therefore, mesa etching is first performed up to the etching stopper layer, and then the etching stopper layer is removed to expose the cathode layer. A cathode electrode is provided in ohmic contact with this cathode layer.

[Problem to be solved by the invention]

However, the conventional etching stopper layer 1000A
It is thicker than above, and the n-type used for this! n
Since P has a high resistivity, it has the disadvantage of increasing the series resistance of PIN-PD.For this reason, in the technique of the above-mentioned document, the cathode electrode is provided up to the sidewall of the mesa-etched i-layer. However, this has drawbacks such as an increase in dark current.Also, when n-type InP is used as the cathode layer, the ohmic contact resistance with the cathode electrode increases, and the series resistance of the PIN-PD similarly increases. There was a downside to getting bigger.

Therefore, an object of the present invention is to provide a method of manufacturing a light receiving element with reduced series resistance.

[Means to solve the problem]

The method for manufacturing a light receiving element according to the present invention includes a first layer made of GaInAs of a first conductivity type (for example, n-type) and a second layer made of n-type InP having a thickness of 100A or more and 800A or less ( etching stopper layer), impurity concentration is 1016
c Third layer (i layer) made of GaInAs of order of m-3 or less and p-type GaInAs or InP
a first step of sequentially laminating a fourth layer consisting of the following layers; a second step of forming a mask covering the light-receiving element forming area on the fourth layer, which is the uppermost layer; and a second step of forming a mask using the second layer as an etching stopper layer. a third step of mesa etching the third and fourth layers through the etching; and a fourth step of etching the second layer to expose the first layer, thereby making ohmic contact on the exposed first layer. A fifth step of forming a first electrode (cathode electrode) and forming a second electrode (anode electrode) in ohmic contact on the fourth layer by removing the mask. .

[Effect]

According to the structure of the present invention, since the second layer as an etching stopper layer is formed to have a thickness of 100 to 800 Å, it functions as an etching stopper layer when mesa etching the third and fourth layers, and also serves as an etching stopper layer in series. There is no need to increase the resistance.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of a light-receiving element according to an embodiment of the present invention according to manufacturing steps. First, as shown in the same figure (a), a semi-insulating I
A first layer 11 to a fourth layer 14 are sequentially epitaxially grown on the surface of a substrate 1o made of nP. Here, the first layer 11 is an n-type G with an impurity concentration of about 5 x 1018 cm-3.
It is made of aInAs and has a thickness of about 200 OA.

The second layer 12 is formed of n-type InP with an impurity concentration of about 5×10 18 cm −3 and a thickness of about 500 cm. The third layer 13 is undoped (impurity concentration I x 1015c
m-3) and has a thickness of 2μ.
It is about m. The fourth layer 14 has an impurity concentration of 1×1
p-type GaInAs or p-type 1 of about 018cm-3
It is formed of nP and has a thickness of about 0.8 μm.

Next, a resist is applied and patterned on the fourth layer 14, so that the resist film 20 remains only in the PIN-PD formation region (as shown in FIG. 12A).

Thereafter, when etching is performed using an etching solution containing phosphoric acid as a main component, the fourth layer 14 and the third layer 13 are sequentially mesa-etched. At this time, the second layer 12 made of InP is difficult to be etched and therefore acts as an etching stopper layer, thus realizing the structure shown in FIG. 1(b). Note that in order for the second layer 12 to function as an etching stopper layer, it cannot be made very thin, and must have a thickness of 100 Å or more (50 OA in the example).

Next, when etching is performed with an etching solution containing hydrochloric acid as the main component, the exposed second layer (etching stopper layer) 1
Only 2 are removed. As a result, the first layer 11 as a cathode layer is exposed (as shown in FIG. 1C). [7
After that, the resist film 20 on the fourth layer 14 is removed using acetone or the like, and the first layer 11 and the fourth layer are removed using a lift-off method.
First and second electrodes 21,22 are formed on layer 14 in ohmic contact. The first electrode (n-type ohmic electrode) 21 serving as the cathode electrode is made of, for example, Au/Z.
For example, AuGe/Nl/Au can be used as the second electrode (n-type ohmic electrode) 22 serving as the anode electrode. Then, these are alloyed by heat treatment at 350° C. for 1 minute, for example.

Electrodes 21, .
When a reverse bias is applied through 22, a depletion layer spreads in the third layer 13, which becomes the i-layer of the PIN-PD, and photodetection is performed. Here, the second etching stopper layer is
If the layer 12 is too thick, the series resistance of the PIN-PD will become too large, so it is necessary to have a thickness of 800 mm or less.

Further, the impurity concentration of the first layer 11 and the second layer 12 is 5
1017c111-3 or more (5X10 in the example)
18Co+-3), the series resistance is further reduced. Moreover, since GaInAs has higher electron mobility and a smaller band gap than InP, by using GaInAs for the first layer 11, the series resistance can be reduced more markedly.

In addition, although the process of forming only PIN-PD on a substrate was shown in the Example, when used for manufacturing 0FIC, FET etc. will be formed on a board|substrate at the same time.

〔Effect of the invention〕

As described above in detail, in the present invention, the second layer as an etching stopper layer is formed to have a thickness of 100 to 800A, so it functions as an etching stopper layer when mesa etching the third and fourth layers. , and does not increase series resistance. Therefore, it becomes possible to manufacture a light receiving element with reduced series resistance.

13...Third layer (i layer of PIN-PD), 14...
・4th layer (p layer of PIN-PD), 20... resist film, 21... first electrode (n-type ohmic electrode), 2
2... Second electrode (n-type ohmic electrode).

Patent applicant: Sumitomo Electric Industries, Ltd. Representative Patent Attorney Yoshi Itsuki Hase

[Brief explanation of the drawing]

FIG. 1 is a cross-sectional view of an element according to manufacturing steps according to an embodiment of the present invention.

Claims (1)

[Claims] 1. A first layer made of GaInAs of the first conductivity type on the substrate, a first layer made of InP of the first conductivity type and having a thickness of 100 Å or more 80
Second layer below 0 Å, impurity concentration 10^1^6cm^-
A third layer made of GaInAs of ^3 order or less and a fourth layer made of GaInAs or InP of the second conductivity type.
a first step of sequentially laminating layers; a second step of forming a mask covering a light-receiving element formation region on the fourth layer; a third step of mesa-etching the third and fourth layers; a fourth step of etching the second layer exposed by the third step to expose the first layer; and a fourth step of etching the second layer exposed by the third step to expose the first layer. a fifth step of forming a first electrode in ohmic contact on the first layer, and forming a second electrode in ohmic contact on the fourth layer by removing the mask. A method for manufacturing a light receiving element. 2. The first conductivity type is n-type, and the second conductivity type is p-type.
2. The method of manufacturing a light receiving element according to claim 1, wherein the light receiving element is a mold.