JPH0216663A - Information processor - Google Patents

Abstract

PURPOSE:To speed up the information processing of a virtual computer by executing an input/output actuating instruction of a private channel by directly actuating an input/output processor and eliminating the need for monitoring of the virtual computer. CONSTITUTION:When an instruction decoder 17 decodes an input/output actuating instruction, outputs of a virtual computer execution display circuit 6 and virtual channel memory effectiveness display circuit 5 are tested by a virtual channel execution control circuit 10. When a virtual computer is activated and a virtual channel memory 1 is effective, a process is executed in accordance with the content of the memory 1. When the content of a virtual channel status 3 requests direct execution, a channel status control circuit 8 updates a condition code register 13. When the status 3 indicates an actuation pussible state, the real channel status of a real channel number 4 is read out from a real channel status memory 9. When the real channel status can be actuated, the input/output of an input/output processor 8 is actuated by changing the status 3 and real channel status during operations and updating the register 13.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an information processing device that can run multiple operating systems simultaneously.

[Prior Art] Conventionally, in this type of information processing device, an input/output start command in a virtual machine is notified to a virtual machine monitor as a simulation request interrupt, and the virtual machine monitor converts the virtual channel number into a real channel number. , the virtual machine monitor activated the input/output processing unit to determine whether the channel was a dedicated channel for the virtual machine, and if it was a dedicated channel, to directly execute the channel program of the virtual machine (Nikkei Electronics, December 1984). March 31st, pp. 98-101).

[Problem to be solved by the invention]

In the conventional information processing device described above, the input/output processing unit directly executes the channel program of the virtual machine, but the startup must be performed by the virtual machine monitor, and the virtual machine is executed every time an input/output startup instruction appears in the virtual machine. If a program that uses a large number of input/output activation instructions is executed on a virtual machine in order to interrupt the execution of the computer and start the virtual machine monitor, there is a drawback that the overhead becomes large.

[Means for Solving the Problems] The information processing apparatus of the present invention includes a virtual channel storage means that is addressed by a virtual channel number and stores a direct execution request flag, a virtual channel status, and a real channel number; checking the virtual machine running display means and the virtual channel storage enabled display means at the start of an input/output start command to determine whether the virtual machine is running and the virtual channel memory enabled display means indicates invalid; simulation request interrupt generating means for generating a simulation request interrupt when the direct execution request flag indicates non-direct execution, and when the real channel status corresponding to the real channel number does not indicate activation possible; , means for setting a condition code to a value corresponding to the virtual channel status when the virtual channel status does not indicate that activation is possible; and means for setting the condition code to a value corresponding to the virtual channel status and the input/output processing device when the virtual channel status and the real channel status indicate that activation is possible. , updates the virtual channel status and real channel status during execution, and sets a condition code.

[Effect] The direct execution request flag separates the shared channel and the exclusive channel, and the input/output activation command to the shared channel is simulated by the virtual machine monitor activated by the simulation request interrupt as before, and the input/output to the exclusive channel is simulated. Since the activation command directly activates the input/output processing device and eliminates the need for the intervention of the virtual machine monitor, there is no increase in overhead even if a program that uses many input/output activation instructions is executed on the virtual machine.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an embodiment of an information processing apparatus according to the present invention.

A virtual channel memory 1 stores a direct execution request flag 2, a virtual channel status 3, and a real channel number 4, and is addressed by a virtual machine identification number register 12 and a virtual channel number register 11. When the instruction word is set in the instruction register 16, the instruction decoder 17 decodes the operation code. When the instruction decoder 17 decodes the input/output start command, the virtual channel execution control circuit 10 tests the outputs of the virtual machine execution display circuit 6 and the virtual channel memory validity display circuit 5, and if the virtual machine is running and the virtual channel memory 1 is valid, An instruction is issued to the simulation request interrupt generation circuit 7 to generate a simulation request interrupt, and if the virtual computer is running and the virtual channel memory 1 is valid, processing according to the contents of the virtual channel memory is executed. When the direct execution request flag 2 read from the virtual channel memory 1 does not request direct execution, the simulation request interrupt generation circuit 7 generates a simulation request interrupt. When direct execution is requested, the channel status control circuit 8 updates the condition code register 13 according to the contents of the virtual channel status 3. When the virtual channel status 3 indicates that activation is possible, the real channel status is read from the real channel status memory 9 using the real channel number 4 via the selection circuit 19. If the real channel status is not activated, the simulation request interrupt generation circuit 7 generates an interrupt because it differs from the virtual channel status. If it is possible to start, update the virtual channel status 3 and real channel status to "operating", update the condition code register 13, and update the input/output processing device 18.
Real channel number 4 and virtual machine identification number register 12
, the contents of the channel program address register 14, and the contents of the address space identification register 15 are sent to start input/output. The input/output processing unit 18 takes in the virtual machine identification number, address space identification number, channel program address, and real channel number, reads the channel program in the logical space within the virtual machine, and executes the logic specified by the channel program. Transfer data in space. When the transfer is completed, it is reported to the actual computer by interrupt 6
The virtual machine monitor that recognizes the end of the transfer by the interrupt notifies the corresponding virtual machine of the end of the transfer through simulation, and updates the virtual channel status 3 to enable activation. The virtual machine monitor must load data into the virtual channel memory 1 and set the virtual channel memory validity display circuit 5 before starting the virtual machine. For data to be loaded into the virtual channel memory 1, the direct execution request flag 2 should be turned on for channels to be exclusively used by virtual machines, and turned off for other channels.

FIG. 2 and FIG. 3 are diagrams showing other embodiments of the present invention,
While the embodiment shown in FIG. 1 is composed of hardware, this embodiment is characterized by being composed of a microprogram and a control table stored in main memory. FIG. 2 is a diagram showing the relationship between control tables and the like stored in the main memory. FIG. 3 is a flowchart of a microprogram of a portion of the input/output activation instruction related to the present invention.

In this embodiment, virtual machines are managed by a virtual machine control table 32. The virtual machine control table 32 includes virtual machine identification numbers 23. Virtual channel table valid flag 22
．． It includes a virtual channel table pointer 21 and the like.

When the virtual channel table valid flag 22 indicates valid, the virtual channel table pointer 21 indicates the start address of the virtual channel table 24. The virtual channel table 24 has a direct execution request flag 25. Actual channel number 26. Virtual channel status 27. Contains the end notification address 31. The operand address of the input/output activation instruction 28 indicates the beginning of the channel program 33. The channel program 33 includes an end notification address 30. in a part of the header. Channel number 29. address space identification number 34,
Contains channel command 35. Virtual machine identification number 23
When the input/output activation instruction 28 is executed during the execution of the virtual machine shown by , the microprogram that processes the input/output activation instruction 28 performs the processing shown in FIG.

First, step 41 to determine whether it is virtual machine mode or not.
), if the mode is not virtual machine mode, the process moves to conventional input/output startup processing. In the virtual machine mode, the virtual channel table 24 is set by the virtual channel table valid flag 22.
It is determined whether the virtual channel number is valid (step 42), and if it is not valid, a simulation request interrupt is performed, and if it is, it is determined whether the virtual channel number is valid (step 4).
3).

If it is not valid, the condition code CC is set to "3" (step 44), and the process ends. If valid, index the virtual channel table 24 by the virtual channel number,
Direct execution request flag 25. Virtual channel status 27
．． The actual channel number 26 is read (step 45). Then, it is determined whether the direct execution request flag 25 is on or not (step 46). If it is not on, a simulation request interrupt is performed, and if it is on, the virtual channel status 27
(Step 47), and if the interrupt is pending, set the condition code CC to "2" (Step 48).
If it is in operation, the condition code CC is set to "l" (step 49), and if it can be started, it is checked whether the actual channel number 26 is valid (step 50), and if it is not valid, a simulation request interrupt is performed.

If valid, check the real channel status (step 5)
1) If the interrupt is pending or in operation, a simulation request interrupt is performed, and if activation is possible, the virtual channel status and real channel status are updated to "in operation" (step 52), and the input/output processing device 18 (step 53). After this, the condition code CC will be changed to “
0'' (step 54).

[Effects of the Invention] As explained above, the present invention separates the shared channel and the exclusive channel by using the direct execution request flag, and input/output activation instructions to the shared channel are issued to the virtual computer activated by the simulation request interrupt as before. The monitor simulates this, and the input/output activation command to the dedicated channel directly activates the input/output processing device, eliminating the need for intervention by the virtual computer monitor, which has the effect of speeding up information processing in the virtual computer.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of an information processing apparatus according to the present invention, and FIGS. 2 and 3 are a block diagram and a flowchart when the present invention is configured by a microprogram and a table on a main memory. 1...Virtual channel memory, 2...Direct execution request flag, 3...Virtual channel status, 4...Real channel number, 5...Virtual channel memory valid display circuit, 6...Virtual computer Execution display circuit, 7...Simulation request interrupt generation circuit, 8...
Channel status control circuit, 9...Real channel status memory, 0...Virtual channel execution control circuit, 1...Virtual channel number register, 2...Virtual computer identification number register, 3...Condition code register , 4... Channel program address register, 15... Address space identification register, 16... Instruction register, 17... Instruction decoder, 18... Input/output processing device, 19... Selection circuit, 21 ...Virtual channel table pointer, 22...
Virtual channel table valid flag, 23... Virtual machine identification number, 24... Virtual channel table, 25... Direct execution request flag, 26... Real channel number, 27... Virtual channel status, 28. ...I/O start command, 29...Channel number, 30...End notification address, 31...End notification address, 32...Virtual computer control table, 33...Channel program, 34... Address space identification number, 35...Channel command.

Claims (1)

[Claims] 1. In an information processing device capable of running multiple operating systems simultaneously, a virtual channel memory that is addressed by a virtual channel number and stores a direct execution request flag, virtual channel status, and real channel number. means, virtual channel storage validity display means for indicating that the virtual channel storage means is valid; virtual machine execution display means for indicating that the virtual machine is being executed; The display means and the virtual channel storage enable display means are checked, and when the virtual computer is running and the virtual channel memory enable display means indicates invalid, when the direct execution request flag indicates indirect execution, and when the real channel A simulation request interrupt generating means for generating a simulation request interrupt when the real channel status corresponding to the number does not indicate that activation is possible, and a value corresponding to the status when the virtual channel status does not indicate that activation is possible. means for activating the input/output processing device when the virtual channel status and the real channel status indicate that it is possible to start, and updating the virtual channel status and the real channel status to "running"; An information processing device comprising means for setting a code.