JPH02177321A - Manufacture of semiconductor substrate - Google Patents

Manufacture of semiconductor substrate

Info

Publication number
JPH02177321A
JPH02177321A JP27874488A JP27874488A JPH02177321A JP H02177321 A JPH02177321 A JP H02177321A JP 27874488 A JP27874488 A JP 27874488A JP 27874488 A JP27874488 A JP 27874488A JP H02177321 A JPH02177321 A JP H02177321A
Authority
JP
Japan
Prior art keywords
substrate
oxygen atmosphere
single crystal
heat
temperature range
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP27874488A
Other languages
Japanese (ja)
Other versions
JPH0447456B2 (en
Inventor
Hideki Tsuya
英樹 津屋
Yukinobu Tanno
丹野 幸悦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Original Assignee
CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CHIYOU LSI GIJUTSU KENKYU KUMIAI filed Critical CHIYOU LSI GIJUTSU KENKYU KUMIAI
Priority to JP27874488A priority Critical patent/JPH02177321A/en
Publication of JPH02177321A publication Critical patent/JPH02177321A/en
Publication of JPH0447456B2 publication Critical patent/JPH0447456B2/ja
Granted legal-status Critical Current

Links

Abstract

PURPOSE:To reduce minute defects in an epitaxial film by heat-treating an Si single crystal substrate at specific temperature ranges respectively in two processes of dry oxygen atmosphere and wet oxygen atmosphere. CONSTITUTION:By a vapor phase reaction method, an Si single crystal film is epitaxially grown on an Si single crystal substrate. In this process, the Si substrate is heat-treated in advance in the temperature range of 650-1000 deg.C in dry oxygen atmosphere, and then it is done in the temperature range of 1100-1200 deg.C in wet oxygen atmosphere, and thereafter the Si single crystal film is epitaxially grown on this substrate. According to this method, minute defects consisting of deposit or dislocation occur inside the substrate, and by intrinsic gettering effect which absorbs minute defects and their unclei by the distorting field, minute defects in the epitaxial film can be reduced.

Description

【発明の詳細な説明】 本発明は半導体基板の製造方法に係り、とくに気相反応
法によるシリコン単結晶薄膜のエピタキシャル成長にお
いてエピタキシャル表面層にみられる微小欠陥を低減さ
せる製造方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method for manufacturing a semiconductor substrate, and more particularly to a method for reducing microdefects found in an epitaxial surface layer during epitaxial growth of a silicon single crystal thin film by a vapor phase reaction method.

シリコンエピタキシャル層はIC,LSI用基板として
、さらには超LSI用基板として不可欠なものであり、
バイポーラ・デバイス用として用いられている。このエ
ピタキシャル層には、例えば積層欠陥、転位、微小欠陥
(シャロー・ビット)等の結晶欠陥がみられる。これら
の結晶欠陥はデバイスの電気的特性を悪化させることは
よく知られている。これらの結晶欠陥を最小限1こ抑制
することが素子の歩留り向上に寄与することができる。
Silicon epitaxial layers are essential as substrates for ICs and LSIs, and even as substrates for VLSIs.
Used for bipolar devices. Crystal defects such as stacking faults, dislocations, and micro defects (shallow bits) are found in this epitaxial layer. It is well known that these crystal defects deteriorate the electrical characteristics of devices. Suppressing at least one of these crystal defects can contribute to improving the yield of devices.

結晶欠陥の抑制方法としては種々の方法が提案されてい
る。
Various methods have been proposed to suppress crystal defects.

現状ではエピタキシャル層の積層欠陥は、エピタキシャ
ル成長前のガスエツチングによりその欠陥密度を10個
1cm2以下とすることができ、転位に関しては、エピ
タキシャル成長時の均−加熱方法等の改善により同じく
その欠陥密度は10個lCm2以下となりつつある。今
ここで問題となるものはエピタキシャル表面層にみられ
る微小欠陥である。微小欠陥はデバイス工程を経るにつ
れ成長して大きな積層欠陥となり歩留低下の原因となる
。この微小欠陥密度は、従来の無処理ウェーハを用いた
エピタキシャル層には、106〜107個lCm2みら
れ、デバイス特性、例えば耐圧低下との相関が解明され
つつある。
Currently, the density of stacking defects in epitaxial layers can be reduced to 10 pieces or less 1 cm2 by gas etching before epitaxial growth, and as for dislocations, the defect density can be reduced to 10 pieces or less by improving the uniform heating method during epitaxial growth. It is becoming less than 1Cm2. The problem here is the micro defects found in the epitaxial surface layer. Micro defects grow as the device process progresses, becoming large stacking faults and causing a decrease in yield. This microdefect density is found to be 106 to 107 lCm2 in an epitaxial layer using a conventional untreated wafer, and its correlation with device characteristics, such as a decrease in breakdown voltage, is being clarified.

この微小欠陥を発生させる原因としては、拡散速度の大
きい重金属汚染によるものであろうと推定されている。
It is presumed that the cause of these microdefects is heavy metal contamination, which has a high diffusion rate.

重金属はエピタキシャル成長前処理によるウェーハ表面
の汚染によるものか、エピタキシャル成長時に周辺の装
置内壁から飛来するかは、今のところ明らかではない。
It is currently unclear whether the heavy metals are due to contamination of the wafer surface during epitaxial growth pretreatment, or whether they come flying from the inner walls of the surrounding equipment during epitaxial growth.

重金属のゲッタリング方法としては、基板裏面に、(1
)機械的歪層を形成する。(2)イオン注入により歪層
を形成する、(3)Si2N4膜を形成し、ミスフィツ
ト転位を導入する、(4)レーザによる歪層の形成等が
提案されている。これらの裏面処理によるゲッタリング
効果については、MOSデバイスでは、その有効性が確
認されているが、バイポーラデバイスではプロセスがよ
り複雑で、高温プロセスを繰り返していくと有効性が徐
々に失われていくともいわれている。
As a gettering method for heavy metals, (1
) forming a mechanically strained layer. Proposals include (2) forming a strained layer by ion implantation, (3) forming a Si2N4 film and introducing misfit dislocations, and (4) forming a strained layer by laser. The effectiveness of the gettering effect of these backside treatments has been confirmed in MOS devices, but the process is more complex in bipolar devices, and the effectiveness gradually disappears as high-temperature processes are repeated. It is also said that

本発明はシリコン単結晶基板を乾式酸素雰囲気中と湿式
酸素雰囲気中の二工程で熱処理することにより、内部に
析出物や転位からなる微小欠陥を発生させ、その歪場に
より微小欠陥又はその核を吸収するいわゆるイントリン
シック・ゲッタリング(IG)効果によりエピタキシャ
ル膜中の微小欠陥を低減化しようとするものである。
The present invention heat-treats a silicon single crystal substrate in two steps, one in a dry oxygen atmosphere and one in a wet oxygen atmosphere, to generate micro-defects consisting of precipitates and dislocations inside, and then use the resulting strain field to destroy the micro-defects or their nuclei. This is an attempt to reduce micro defects in the epitaxial film by the so-called intrinsic gettering (IG) effect.

本発明は例えば、気相′反応法によりシリコン単結晶基
板にシリコン単結晶薄膜をエピタキシャル成長させる工
程において、該基板をあらかじめ乾式酸素雰囲気中で6
50℃〜1000℃の温度範囲で熱処理したのち、湿式
酸素雰囲気中で11000C〜1200’Cの温度範囲
で熱処理する2種類の熱処理工程を連続して行い、特に
この後でエピタキシャル成長させることをvF徴とする
半導体基板の製造方法であIC効果の有効性については
、例えばG、 A。
For example, in the process of epitaxially growing a silicon single-crystal thin film on a silicon single-crystal substrate by a gas-phase reaction method, the substrate is pre-heated in a dry oxygen atmosphere for 60 minutes.
After heat treatment in the temperature range of 50°C to 1000°C, two types of heat treatment steps are successively performed in the temperature range of 11000°C to 1200'C in a wet oxygen atmosphere. Regarding the effectiveness of the IC effect in a method for manufacturing a semiconductor substrate, see, for example, G, A.

Rozgonyi et al: Appl、 Phy
s、 Lett、 vol、 32゜747〜749(
1978)の文献にみられるように、MOSデバイスの
ライフタイムの向上が報告されている。本発明者らはI
C効果がエピタキシャル層中の微小欠陥の低減化に特に
有効であると考えた。以下実施例に基づき詳細に説明す
る。
Rozgonyi et al: Appl, Phy
s, Lett, vol, 32°747-749 (
(1978), it has been reported that the lifetime of MOS devices has been improved. The inventors I
It was considered that the C effect is particularly effective in reducing micro defects in the epitaxial layer. A detailed explanation will be given below based on examples.

実施例1;エピタキシャル用の基板をあらかじめ乾式酸
素雰囲気中で、6008C〜1200℃の温度範囲で1
6〜64時間熱処理し、酸化膜を除去したのち、エピタ
キシャル成長させた。エピタキシャル膜中の微小欠陥を
評価するために、湿式酸素雰囲気中で、1140℃12
時間熱処理し、ジルトルエッチ液で30秒間エツチング
し、ノマルスキー干渉顕微鏡で観察した。その結果、乾
式酸素中で、700’C〜1000’Cの温度範囲で熱
処理した基板を用いてエピタキシャル成長させたエピタ
キシャル膜中の微小欠陥は、大幅に低減し、5X103
個1cm2以下であった。
Example 1: The epitaxial substrate was heated in advance in a dry oxygen atmosphere at a temperature range of 6008C to 1200C.
After heat treatment for 6 to 64 hours to remove the oxide film, epitaxial growth was performed. In order to evaluate micro defects in the epitaxial film, the temperature was set at 1140℃12 in a wet oxygen atmosphere.
The film was heat treated for a period of time, etched for 30 seconds using a Zirtle etching solution, and observed using a Nomarski interference microscope. As a result, micro defects in epitaxial films grown epitaxially using substrates heat-treated in dry oxygen at a temperature range of 700'C to 1000'C were significantly reduced, and 5X103
The size of each piece was 1 cm2 or less.

実施例2;種々の酸素濃度を有する基板について上記の
乾式酸素雰囲気中で熱処理し、内部欠陥の発生及び格子
間酸素量をエツチング及び赤外分光法で測定した。その
結果、格子間酸素の減少は出発ウェーハの酸素濃度及び
熱処理温度、時間に著しく依存することが分かった。こ
の格子間酸素の減少量は内部欠陥の析出量に比例するが
、エツチング観察の結果、1000℃以下ではそのよう
な相関が明らかにみられた。格子間酸素の減少量の測定
このように格子間酸素の減少率は、1)熱処理時間が長
いほど大きい、2)同一熱処理条件では出発ウェーハの
酸素濃度が高いほど大きい、3)特定の温度で減少率が
最大となる、等の特徴をもつ振舞を示すことが分かった
Example 2: Substrates having various oxygen concentrations were heat-treated in the above dry oxygen atmosphere, and the occurrence of internal defects and the amount of interstitial oxygen were measured by etching and infrared spectroscopy. As a result, it was found that the reduction in interstitial oxygen significantly depends on the oxygen concentration of the starting wafer and the heat treatment temperature and time. The amount of decrease in interstitial oxygen is proportional to the amount of precipitated internal defects, and as a result of etching observation, such a correlation was clearly seen at temperatures below 1000°C. Measurement of the amount of decrease in interstitial oxygen As described above, the rate of decrease in interstitial oxygen is 1) larger as the heat treatment time is longer, 2) larger as the oxygen concentration of the starting wafer is higher under the same heat treatment conditions, and 3) at a specific temperature. It was found that the reduction rate was the highest, and so on.

実施例3;次に上記の実施例2に示すように、乾式酸素
中で熱処理を施したウェーハの酸化膜を除去したのち、
湿式酸素中で1100℃〜1200℃で2時間熱処理し
格子間酸素の減少率及び内部欠陥の析出の様子を測定し
た。その結果、6506C〜1000℃の温度範囲で、
乾式酸素中で熱処理を施した基板を続いて、湿式酸素中
で熱処理すると、格子間酸素の減少率が更に著しく、ま
た内部欠陥の増大も顕著であることが分かった。第1表
に示した試料を更に湿式酸素中で、1140℃12時間
の熱処理を施した場合このように、適切な温度範囲であ
らかじめ乾式酸素中で熱処理を施したのち湿式酸素中で
熱処理を施すと、格子間酸素濃度の減少率は、第一処理
に比べて1桁以上も増大する場合のあることが分かった
Example 3: Next, as shown in Example 2 above, after removing the oxide film of the wafer that had been heat-treated in dry oxygen,
After heat treatment in wet oxygen at 1100° C. to 1200° C. for 2 hours, the reduction rate of interstitial oxygen and the state of precipitation of internal defects were measured. As a result, in the temperature range of 6506C to 1000C,
It was found that when a substrate heat-treated in dry oxygen was subsequently heat-treated in wet oxygen, the rate of decrease in interstitial oxygen was even more remarkable, and the increase in internal defects was also remarkable. When the samples listed in Table 1 are further heat-treated in wet oxygen at 1140°C for 12 hours, the result is that the samples are heat-treated in dry oxygen at an appropriate temperature range and then heat-treated in wet oxygen. It was found that the rate of decrease in interstitial oxygen concentration may increase by one order of magnitude or more compared to the first treatment.

第二処理は短時間でよいので、この二つの熱処理工程を
続けて行゛うことにより、全体として熱時間の短縮をは
かることが可能となった。例えば40%以上の減少率を
達成するのに、第一処理のみでは、試料Eで64時間も
要するのに対して試料Aでは、第−及び第二処理を施す
ことにより18時間で十分である。つまり、第二処理を
付は加えることにより、第一処理時間を大幅に短縮する
ことができる。
Since the second treatment only takes a short time, by performing these two heat treatment steps in succession, it became possible to shorten the heat time as a whole. For example, to achieve a reduction rate of 40% or more, it takes 64 hours for sample E with the first treatment alone, whereas 18 hours is sufficient for sample A with the second and second treatments. . In other words, by adding the second process, the first process time can be significantly shortened.

また13刈い710m3程度の酸素濃度が低いウェーハ
でも第二処理を付は加えることにより、17.1%の減
少率を達成することができIG効果が認められた。
Furthermore, by adding the second treatment to a wafer with a low oxygen concentration of about 710 m3 after 13 cuttings, a reduction rate of 17.1% could be achieved, and the IG effect was recognized.

実施例4;連続した第一、第二処理の有効性を確認する
ために、第一処理を施さずに、第二処理の湿式酸素中で
のみ熱処理を施しても格子間酸素濃度の減少がみられず
、また内部欠陥も発生しなかっな。
Example 4: In order to confirm the effectiveness of successive first and second treatments, the interstitial oxygen concentration did not decrease even if heat treatment was performed only in wet oxygen in the second treatment without performing the first treatment. No visible defects were observed, and no internal defects occurred.

実施例5;そこで上記の第一、第二処理の熱処理工程を
連続して行ったウェーハを用いてエピタキシャル成長を
行ったところ、IG効果が顕著にみられ、適切な熱処理
条件の組合せでは、エピタキシャル層中の微小欠陥密度
は5 X 103/cm2以下であった。
Example 5: Therefore, when epitaxial growth was performed using a wafer that had undergone the first and second heat treatment steps described above, a remarkable IG effect was observed, and with an appropriate combination of heat treatment conditions, the epitaxial layer The microdefect density inside was less than 5 x 103/cm2.

Claims (1)

【特許請求の範囲】[Claims] 気相反応性によりシリコン単結晶基板にシリコン単結晶
薄膜をエピタキシャル成長させる工程において、該基板
を乾式酸素雰囲気中で650℃から1000℃の温度範
囲で熱処理したのち、湿式酸素雰囲気中で1100℃〜
1200℃の温度範囲で熱処理を行い、この後で該基板
上にエピタキシャル成長させることを特徴とする半導体
基板の製造方法。
In the process of epitaxially growing a silicon single crystal thin film on a silicon single crystal substrate by vapor phase reactivity, the substrate is heat treated in a dry oxygen atmosphere at a temperature range of 650°C to 1000°C, and then heated in a wet oxygen atmosphere at a temperature of 1100°C to 1000°C.
A method for manufacturing a semiconductor substrate, comprising performing heat treatment in a temperature range of 1200° C. and then epitaxially growing the substrate.
JP27874488A 1988-11-04 1988-11-04 Manufacture of semiconductor substrate Granted JPH02177321A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27874488A JPH02177321A (en) 1988-11-04 1988-11-04 Manufacture of semiconductor substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27874488A JPH02177321A (en) 1988-11-04 1988-11-04 Manufacture of semiconductor substrate

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP14418379A Division JPS5667922A (en) 1979-11-07 1979-11-07 Preparation method of semiconductor system

Publications (2)

Publication Number Publication Date
JPH02177321A true JPH02177321A (en) 1990-07-10
JPH0447456B2 JPH0447456B2 (en) 1992-08-04

Family

ID=17601598

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27874488A Granted JPH02177321A (en) 1988-11-04 1988-11-04 Manufacture of semiconductor substrate

Country Status (1)

Country Link
JP (1) JPH02177321A (en)

Also Published As

Publication number Publication date
JPH0447456B2 (en) 1992-08-04

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