JPH021931U - - Google Patents

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Publication number
JPH021931U
JPH021931U JP8034088U JP8034088U JPH021931U JP H021931 U JPH021931 U JP H021931U JP 8034088 U JP8034088 U JP 8034088U JP 8034088 U JP8034088 U JP 8034088U JP H021931 U JPH021931 U JP H021931U
Authority
JP
Japan
Prior art keywords
signal
output
monostable multivibrator
transmission line
gate circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8034088U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8034088U priority Critical patent/JPH021931U/ja
Publication of JPH021931U publication Critical patent/JPH021931U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の原理構成を示す図、第2図は
本考案の実施例の構成を示すブロツク図、第3図
は第2図の動作波形図である。 1……デイジタル信号の信号源、2……信号源
1の次段となるD/A変換器、3……信号出力端
子、4……ゲート回路、5……リトリガ可能な単
安定マルチバイブレータ。
FIG. 1 is a diagram showing the principle configuration of the present invention, FIG. 2 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 3 is an operation waveform diagram of FIG. 2. 1... Signal source of digital signal, 2... D/A converter which is the next stage of signal source 1, 3... Signal output terminal, 4... Gate circuit, 5... Retriggerable monostable multivibrator.

Claims (1)

【実用新案登録請求の範囲】 デイジタル信号源1の出力をアナログ信号に変
換するD/A変換器2を介して出力信号端子3に
出力する信号伝送路において、 該伝送路の信号処理最終段と信号出力端子3間
にゲート回路4を具備し、 リトリガ可能な単安定マルチバイブレータ5を
前記デイジタル信号源1の次段2と並列に接続し
、 前記単安定マルチバイブレータ5出力により前
記ゲート回路4のゲート動作を制御させることを
特徴とする信号伝送路。
[Claims for Utility Model Registration] In a signal transmission line that outputs the output of a digital signal source 1 to an output signal terminal 3 via a D/A converter 2 that converts it into an analog signal, the signal processing final stage of the transmission line A gate circuit 4 is provided between the signal output terminals 3, a retriggerable monostable multivibrator 5 is connected in parallel with the next stage 2 of the digital signal source 1, and the gate circuit 4 is controlled by the output of the monostable multivibrator 5. A signal transmission path characterized by controlling gate operation.
JP8034088U 1988-06-17 1988-06-17 Pending JPH021931U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8034088U JPH021931U (en) 1988-06-17 1988-06-17

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8034088U JPH021931U (en) 1988-06-17 1988-06-17

Publications (1)

Publication Number Publication Date
JPH021931U true JPH021931U (en) 1990-01-09

Family

ID=31305169

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8034088U Pending JPH021931U (en) 1988-06-17 1988-06-17

Country Status (1)

Country Link
JP (1) JPH021931U (en)

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