JPH0219890A - drive circuit - Google Patents
drive circuitInfo
- Publication number
- JPH0219890A JPH0219890A JP63169430A JP16943088A JPH0219890A JP H0219890 A JPH0219890 A JP H0219890A JP 63169430 A JP63169430 A JP 63169430A JP 16943088 A JP16943088 A JP 16943088A JP H0219890 A JPH0219890 A JP H0219890A
- Authority
- JP
- Japan
- Prior art keywords
- drive circuit
- wiring
- input terminal
- liquid crystal
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Liquid Crystal (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は平板デイスプレィに用いて有効な高密度実装の
可能な駆動回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a drive circuit that can be effectively mounted in high density for use in flat panel displays.
従来の技術
近年、コンピュータを中心とする情報機器分野およびテ
レビジョン、ビデオテープレコーダ(VTR)などを中
心とする映像機器分野において、大容量の表示装置の需
要が高まっており、これらの表示装置として、液晶デイ
スプレィが特に注目され、この液晶デイスプレィを駆動
する駆動回路も、高密度の実装が要求されるようになっ
てきた。BACKGROUND OF THE INVENTION In recent years, demand for large-capacity display devices has been increasing in the field of information equipment, mainly computers, and the field of video equipment, mainly televisions and video tape recorders (VTRs). ,Liquid crystal displays have attracted particular attention, and the drive circuits that drive these liquid crystal displays are also required to be mounted in high density.
以下図面を参照しながら、従来の液晶パネルの駆動回路
について説明する。A conventional liquid crystal panel drive circuit will be described below with reference to the drawings.
第3図は従来の液晶パネルの駆動回路の入出力端子の構
成と実装時の配線の一例を示している。FIG. 3 shows an example of the configuration of the input/output terminals of a conventional liquid crystal panel drive circuit and the wiring at the time of mounting.
第3図に於て、31は駆動回路のLSI、32は液晶パ
ネルの電極を駆動する出力端子、33はLSIの電源や
制御信号の入力端子、34は出力端子の引出し線、35
は入力端子の引出し線である。−船釣に、大容量の液晶
パネルになると、電極数は数百本になり、駆動回路のL
SIの出力端子は60〜80本程度であるため、普通複
数個の駆動回路のLSIを使用する。従うて、各LSI
に共通に使用する電源や制御信号は第3図のように、ク
ロスオーバー配線をする必要がある。In FIG. 3, 31 is the LSI of the drive circuit, 32 is the output terminal for driving the electrodes of the liquid crystal panel, 33 is the input terminal for the LSI power supply and control signals, 34 is the output terminal lead line, 35
is the lead line of the input terminal. - When it comes to large-capacity liquid crystal panels for boat fishing, the number of electrodes is in the hundreds, and the drive circuit L
Since the SI has about 60 to 80 output terminals, an LSI with a plurality of drive circuits is normally used. Accordingly, each LSI
As shown in Figure 3, it is necessary to use crossover wiring for power supplies and control signals that are commonly used.
(例えば、LCDドツトマトリクスセグメントドライバ
・MSM5299BGS・データーブック:沖電気工業
株式会社)
そのため、現在では駆動回路のLSIはプリント基板上
に実装する方法が主流となっている。(For example, LCD dot matrix segment driver, MSM5299BGS, data book: Oki Electric Industry Co., Ltd.) Therefore, the current mainstream method is to mount the LSI of the drive circuit on a printed circuit board.
しかしながら、液晶パネルの大容量化、薄型化が進むに
つれ、高密度の実装が必要となり、駆動回路のLSIを
液晶パネルのガラス基板上に直接実装するチップオング
ラス実装(以下COG実装)が必要となってきた。However, as liquid crystal panels become larger in capacity and thinner, higher-density packaging becomes necessary, and chip-on-glass mounting (hereinafter referred to as COG mounting), in which the drive circuit LSI is directly mounted on the glass substrate of the liquid crystal panel, becomes necessary. It has become.
発明が解決しようとする課題
そのため、第3図の従来の構成の駆動回路ではクロスオ
ーバー配線が必要となり、実装が複雑になるという問題
点を有していた。Problems to be Solved by the Invention For this reason, the drive circuit having the conventional configuration shown in FIG. 3 requires crossover wiring, which has the problem of complicating implementation.
本発明は駆動回路において、上記課題を解決する効果的
な駆動回路を提供するものである。The present invention provides an effective drive circuit that solves the above problems.
課題を解決するための手段
上記目的を達成するために、本発明の駆動回路は、複数
個の駆動回路の各入力信号の内、上記各駆動回路毎に共
通に使用する入力信号の入力端子のパッドは、同一の信
号毎に複数個づつ具備し、さらに、同一信号の各入力端
子のパッド間は、低抵抗の導体で接続するものである。Means for Solving the Problems In order to achieve the above object, the drive circuit of the present invention provides an input terminal for an input signal that is commonly used for each of the drive circuits among the input signals of the plurality of drive circuits. A plurality of pads are provided for each of the same signals, and the pads of each input terminal of the same signal are connected by a low resistance conductor.
作用
共通に使用する入力信号の入力端子を複数個設けること
により、COG実装においても、クロスオーバー配線が
不要となり、かつ、実装時の配線抵抗も低くすることが
できる。By providing a plurality of input terminals for input signals that are used for common functions, crossover wiring is not necessary even in COG mounting, and wiring resistance during mounting can be reduced.
実施例
以下、本発明の一実施例について、図面を参照しながら
説明する。EXAMPLE Hereinafter, an example of the present invention will be described with reference to the drawings.
第1図は本発明の一実施例における駆動回路の構成を示
す概略図で、■はLSIチンプ、2は出力端子パッド、
3は入力端子パッド、4は共通入力端子パッド、5は導
体配線である。入力端子パッド4は各チップに共通した
電源や制御信号の入力端子で、チップの左右にそれぞれ
入力端子を設けることで、実装基板上でのクロスオーバ
ーを不要にし、チップ間の配線を容易にしている;さら
に低抵抗の導体で左右の入力端子を接続しているため、
ガラス基板上の配線のみで実装した場合と比較して、全
体の配線抵抗を低減できる。FIG. 1 is a schematic diagram showing the configuration of a drive circuit in an embodiment of the present invention, where ■ is an LSI chimp, 2 is an output terminal pad,
3 is an input terminal pad, 4 is a common input terminal pad, and 5 is a conductor wiring. The input terminal pad 4 is an input terminal for power and control signals that are common to each chip. By providing input terminals on the left and right sides of each chip, crossovers on the mounting board are unnecessary and wiring between chips is facilitated. Furthermore, since the left and right input terminals are connected with a low resistance conductor,
The overall wiring resistance can be reduced compared to mounting only with wiring on a glass substrate.
第2図は本発明の駆動回路を液晶パネルの駆動回路とし
て用いた場合の実装時の配線を示し、21は出力端子の
引出し線、22は共通入力端子の引出し線、23は入力
端子の引出し線である。Figure 2 shows the wiring at the time of mounting when the drive circuit of the present invention is used as a drive circuit for a liquid crystal panel, 21 is an output terminal lead line, 22 is a common input terminal lead line, and 23 is an input terminal lead line. It is a line.
第2図から明らかなように、クロスオーバー配線がなく
高密度に配線できることがわかる。また、チップ内での
共通入力端子間の配線は容易に低抵抗化が可能であるた
め、共通入力端子の引出し線22を短くすることにより
、実装配線の共通配線部の抵抗を低減することができる
。As is clear from FIG. 2, there is no cross-over wiring and high-density wiring can be achieved. Furthermore, since the resistance of the wiring between common input terminals within a chip can be easily reduced, the resistance of the common wiring part of the mounting wiring can be reduced by shortening the lead wire 22 of the common input terminal. can.
尚、第1図の実施例に示すパッド配置や数は一例にすぎ
ずこれに限られるものではない、また、第2図に示され
る実装配線も一例にすぎず、これに限られるものではな
い。Note that the pad arrangement and number shown in the embodiment of FIG. 1 are only an example and are not limited to this, and the mounting wiring shown in FIG. 2 is also only an example and is not limited to this. .
発明の効果
本発明は液晶パネルなどの高密度実装が必要な駆動回路
において、COG実装する際、クロスオーバー配線を不
要にし、かつ、共通信号部の配線抵抗を低減できるとい
う効果を得ることができるものである。特に共通信号は
電源が中心となるため、配線抵抗の低減は駆動回路の動
作を安定させるために、極めて大きな効果がある。Effects of the Invention The present invention can eliminate the need for crossover wiring when performing COG mounting in drive circuits that require high-density packaging such as liquid crystal panels, and can achieve the effects of reducing the wiring resistance of the common signal section. It is something. In particular, since the common signal is mainly the power supply, reducing the wiring resistance has an extremely large effect on stabilizing the operation of the drive circuit.
第1図は本発明の一実施例における駆動回路の概略図、
第2図は本発明の一実施例における駆動回路の実装配線
の概略図、第3図は従来の液晶パネルの駆動回路の実装
配線を示す概略図である。
■・・・・・・LSI、2・・・・・・出力端子パッド
、3・・・・・・入力端子パッド、4・・・・・・共通
入力端子パッド、5・・・・・・導体配線。
代理人の氏名 弁理士 粟野重孝 はか1名2−−一出
pか弗手ハi嫁
3−−、Xvfi煽も遍−ノいノ片FIG. 1 is a schematic diagram of a drive circuit in an embodiment of the present invention,
FIG. 2 is a schematic diagram showing the mounting wiring of a driving circuit in an embodiment of the present invention, and FIG. 3 is a schematic diagram showing mounting wiring of a driving circuit of a conventional liquid crystal panel. ■...LSI, 2...Output terminal pad, 3...Input terminal pad, 4...Common input terminal pad, 5... conductor wiring. Agent's name: Patent attorney Shigetaka Awano 1 person 2 -- Issei p or hitsude high wife 3 --, XVFI is also widely used.
Claims (2)
る駆動回路に於て、上記複数個の駆動回路の各入力信号
の内、上記各駆動回路毎に共通に使用する入力信号の入
力端子のパッドは、同一の信号毎に複数個づつ具備し、
同一信号の各入力端子のパッド間は、低抵抗の導体で接
続されていることを特徴とする駆動回路。(1) In a drive circuit that uses multiple chips mounted on one substrate, among the input signals of the plurality of drive circuits, the input signal commonly used for each of the drive circuits is The input terminal has multiple pads for each signal,
A drive circuit characterized in that pads of input terminals of the same signal are connected with a low resistance conductor.
であることを特徴とする請求項(1)記載の駆動回路。(2) The drive circuit according to claim (1), wherein the drive circuit is a drive circuit for driving a liquid crystal panel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63169430A JPH0752265B2 (en) | 1988-07-07 | 1988-07-07 | Drive circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63169430A JPH0752265B2 (en) | 1988-07-07 | 1988-07-07 | Drive circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0219890A true JPH0219890A (en) | 1990-01-23 |
| JPH0752265B2 JPH0752265B2 (en) | 1995-06-05 |
Family
ID=15886451
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63169430A Expired - Lifetime JPH0752265B2 (en) | 1988-07-07 | 1988-07-07 | Drive circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0752265B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5712493A (en) * | 1995-03-20 | 1998-01-27 | Kabushiki Kaisha Toshiba | Display device having driving circuits at the periphery of a substrate |
| US6787815B2 (en) * | 2002-01-18 | 2004-09-07 | Nec Compound Semiconductor Devices, Ltd. | High-isolation semiconductor device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55512U (en) * | 1978-05-27 | 1980-01-05 | ||
| JPS6041928U (en) * | 1983-08-30 | 1985-03-25 | シャープ株式会社 | Connection structure between liquid crystal display element and drive circuit board |
-
1988
- 1988-07-07 JP JP63169430A patent/JPH0752265B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS55512U (en) * | 1978-05-27 | 1980-01-05 | ||
| JPS6041928U (en) * | 1983-08-30 | 1985-03-25 | シャープ株式会社 | Connection structure between liquid crystal display element and drive circuit board |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5712493A (en) * | 1995-03-20 | 1998-01-27 | Kabushiki Kaisha Toshiba | Display device having driving circuits at the periphery of a substrate |
| US6787815B2 (en) * | 2002-01-18 | 2004-09-07 | Nec Compound Semiconductor Devices, Ltd. | High-isolation semiconductor device |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0752265B2 (en) | 1995-06-05 |
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