JPH02206984A - Encoding device for picture data - Google Patents

Abstract

PURPOSE:To improve the efficiency and to avoid propagation of an error by forming a prediction data from a preset model and a data of a representative picture element and applying ADRC coding to a difference between the predicted data and a true value. CONSTITUTION:A model such as a line, a plane or a curved face is set and a predicted data for each block is formed by an interpolation signal generating circuit 10 from the set model and a representative picture element. The representative picture element is used as a transmission data, and a difference (predicted error) between a no transmission data in the block and the predicted data is formed by a difference detection circuit 30. The difference is coded by the ADRC (dynamic range) and dynamic range information of the difference, a code signal and the data of the representative picture element are sent. Since the difference is coded in this way, the compression rate of the transmission data is improved and no propagation error takes place.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image data encoding device capable of compressing the amount of transmitted data.

[Summary of the invention]

In this invention, in an image data encoding device in which at least one representative pixel and non-transmission pixels are predetermined, which are transmitted in the original number of bits within a block composed of a predetermined number of pixels, the non-transmission pixels For dynamic It is equipped with an encoding circuit that encodes the difference value for each block based on range information and outputs a code signal with a smaller number of bits than the original number of bits, and includes representative data, dynamic range information, and a code signal from the encoding circuit. By transmitting the data, the amount of transmitted data can be efficiently compressed without causing propagation errors.

[Conventional technology]

DPCM is known that transmits a difference value between original data and predicted data in order to compress the amount of image data to be transmitted.

Although quantization of difference values is efficient, it has the problem of error propagation.

As a high-efficiency encoding method that does not cause error propagation, the applicant has proposed dynamic range adaptive encoding (ADRC).
) is proposed. For example, in Japanese Patent Application No. 59-266407, the dynamic range, which is the difference between the maximum and minimum values of a plurality of pixels included in a two-dimensional block, is determined.
An adaptive encoding device that performs encoding adapted to this dynamic range has been described. Also, patent application 1986-232
No. 789 describes an adaptive encoding device that performs encoding adapted to the dynamic range of a three-dimensional block formed from pixels of regions included in each of a plurality of frames. Furthermore, Japanese Patent Application No. 60-268817 discloses a variable length encoding method in which the number of bits changes depending on the dynamic range so that the maximum distortion caused when quantization is constant. .

Coding adapted to the dynamic range described above (ADRC
) is suitable for application to digital VTRs because it can significantly compress the amount of data to be transmitted. especially,
Variable length ADRC can increase the compression ratio.

[Problem to be solved by the invention]

In the case of fixed length ADRC, there is a problem of large quantization distortion when the dynamic range of the block is large. Furthermore, in the case of variable length ADRC in which the bit length changes depending on the dynamic range, the number of blocks to which a large number of bits are allocated increases, making compression of the amount of transmitted data insufficient.

Therefore, it is an object of the present invention to provide an image data encoding device that has both the advantage of high efficiency resulting from quantization of difference values and the advantage of ADRC in which errors are not propagated.

[Means to solve the problem]

In this invention, in an image data encoding device in which at least one representative pixel and non-transmission pixels are predetermined, which are transmitted in the original number of bits within a block composed of a predetermined number of pixels, the non-transmission pixels A prediction circuit 10 that forms prediction data from a plurality of representative pixels regarding
Detecting the dynamic range information of the difference value from the difference detection circuit 30 on a block-by-block basis, encoding the difference value on a block-by-block basis based on the dynamic range information, and outputting a code signal with a smaller number of bits than the original number of bits. Encoding circuits 31, 33, 34, and 35 are provided, and representative data, dynamic range information, and code signals from the encoding circuits are transmitted.

[Effect]

A model such as a straight line, plane, curved surface, etc. is set, and prediction data for each block is sent to the prediction circuit 1 from the set model and representative pixels.
The 0 representative pixel formed by 0 is taken as the transmission data, and the difference value (prediction error) between the non-transmission data and the predicted data in the block is formed by the difference detection circuit 30. This difference value is AD
It is encoded by RC, and dynamic range information of the difference value, code signal, and data of the representative pixel are transmitted. Since the difference value is encoded, the compression rate of the transmitted data is improved and there is an advantage that propagation errors do not occur.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings. In this invention, predicted data is formed by fitting changes in the image data of a block with a model such as a straight line (one-dimensional), plane (two-dimensional), or curved surface (two-dimensional), and the difference value between the predicted data and the true value is , that is, the residual is ADRC encoded.

In this embodiment, the residual after fitting in the plane as an example is ADRC encoded.

In Figure 1, the input terminal indicated by 1 has 8 samples.
The bits are supplied with digitized digital video data. A blocking circuit 2 converts the video data from a scanning line order to a block order. In this example, as shown in Figure 2, (4 lines x
4 pixels - 16 pixels) constitute one block. The pixel indicated by the black dot located at the left end of the first line of each block is the basic pixel (representative pixel) that is always transmitted.
It is. The respective values of the basic pixels are a and bSc.

d.

An interpolation signal generation circuit, denoted lO, uses the values of the basic pixels mentioned above to predict other non-transmitted pixels in the block. A prediction is made by fitting non-transmission pixels in a block with basic pixels in a plane.

In other words, the interpolation signal (predicted value) is obtained by the weighted average of the distances between the non-transmission pixel and the four basic pixels.For example, a pixel with a value indicated by The reciprocal is as follows, assuming that one line interval and one sample interval are each 1.

Therefore, the interpolated signal y corresponding to the original data X can be obtained by the following equation.

Interpolation signals for non-transmission pixels other than X are also obtained in the same way as for X.

In order to supply basic pixel data to the interpolation signal generation circuit 10, a 4H (H: line period) delay circuit 3, a 1-block delay circuit 4, and latch circuits 5, 6, 7, and 8 are provided. These latch circuits 5 to 8 are supplied with a block period latch pulse from a terminal 9, and data a to d of basic pixels at a predetermined position within the block are supplied to the latch circuits 5 to 8.
are incorporated into each. The output terminal taken out from the middle of the 4H delay circuit 4 has a delay amount of one block time with respect to the input side of the 4H delay circuit 40. When the latch circuit 5 takes in the basic pixel data d, the latch circuit 6 takes in the basic pixel data C one block before the basic pixel data d, and the latch circuit 7 takes in 4' of the basic pixel data d.
The basic pixel data b before H is taken in, and the basic pixel data a one block before the basic pixel data b is taken into the latch circuit 8. These basic pixel data are supplied to input terminals 11, 12, 13, and 14 of the interpolation signal generation circuit 10, respectively.

FIG. 3 shows an example of the interpolation signal generation circuit 10.

Basic pixel data a-d from input terminals 11-14 are supplied to multiplication circuits 16, 17, 18, and 19, respectively. Coefficient data read from the ROM 20.21.22.23 is supplied to the multiplication circuits 16-19. These R.O.
The coefficient data read from M20 to M23 is sent to the adder circuit 2.
8, and the output data of multiplication circuits 16 to 19 is also supplied to an addition circuit 27. The output signal of the adder circuit 27 and the output signal of the adder circuit 28 are supplied to a divider circuit 29, and the former is divided by the latter. Therefore, an interpolated signal is taken out to the output terminal 15 of the divider circuit 29.

The ROMs 20-23 generate coefficients corresponding to each non-transmission pixel in the block to be encoded. For example, R.O.
M20 generates coefficient data for basic pixel data a corresponding to each non-transmission pixel in the block. As shown in FIG. 2, addresses (1 to 15) are assigned to the 15 non-transmission pixels according to the transmission order of data within the block. The address counter 24 generates the above-mentioned addresses (1 to 15) from the sample clock from the terminal 25 and the block cycle clock from the terminal 26. ROM2
Coefficient data as shown below is stored in each address of 0.

Address Coefficient Address Coefficient For example, since the address of the above-mentioned non-transmission pixel X is 5, A is read out from the ROM 20 as coefficient data.

Coefficient data corresponding to the addresses (1 to 15) are also stored in other ROMs 21, 22, and 23 located between the basic pixels S, c, and d, respectively, other than the ROM 20.

The interpolation signal taken out at the output terminal 15 of the interpolation signal generation circuit 10, that is, the prediction data, is supplied to the subtraction circuit 30. The subtraction circuit 30 is supplied with pixel data (true value) from the 1-process delay circuit 4. The pixel data and the interpolation signal are synchronously supplied to the subtraction circuit 30.
As a result, the residual difference between the original data and the interpolated signal is obtained. This residual component is ADRC encoded.

The output signal of the subtraction circuit 30 is detected by the maximum value and minimum value detection circuit 3
1 and the delay circuit 32. The detection circuit 31 detects the maximum value MAX and minimum value MIN of the difference signal of each block. The delay circuit 32 has a maximum value MAX and a minimum value MI
Delay the data by the time to detect N. Subtraction circuit 33
(MAX-MIN) is calculated, and the dynamic range DR is obtained from the subtraction circuit 33. In the subtraction circuit 34, the minimum value MIN is subtracted from the difference signal from the delay circuit 32, and a difference signal from which the minimum value has been removed is obtained.

Output data of subtraction circuit 34 and dynamic range DR
is supplied to the quantization circuit 35. The quantization circuit 35 obtains a quantization code DT having a smaller number of bits than the original number of bits (8 bits), for example, 3 bits. The basic pixel data of the block from the latch circuit 8 is supplied to the delay circuit 36, and the basic pixel data PD, dynamic range DR, minimum value MIN, and quantization code DT from the delay circuit 36 are supplied to the framing circuit 37 and output. Transmission data is taken out to the terminal 38. As shown in FIG. 4, the framing circuit 37 forms transmission data in which basic pixel data PD, minimum value MIN, dynamic range DR, and quantization code DT are arranged byte serially. The dynamic range DR and minimum value MEN of the difference signal are clipped at 8 bits. Although not shown in FIG. 4, a synchronization signal is added to each predetermined length of transmission data, and the data is encoded with an error correction code if necessary.

The quantization circuit 35 performs quantization adapted to the dynamic range DR. In other words, 4, dynamic range DR (
2' = 8) The difference signal from which the minimum value has been removed is divided by the equally divided quantization step Δ, and the value obtained by rounding down the quotient to an integer is set as the quantization code DT. The quantization circuit 35 can be composed of a division circuit or a ROM.

The transmitted data is transmitted via a transmission line, for example, a magnetic recording/reproducing process. On the decoding side, ADRC is decoded,
Restore the difference signal. Interpolation is performed using this difference signal and basic pixel data.

What is ADRC encoded is not the original video data (,
Since it is a residual error when fitting on a plane, the dynamic range DR is sufficiently small, and quantization errors can be reduced.

Note that the present invention can also be applied to the case where a difference signal is encoded using variable length ADRC.

Furthermore, the fitting method may be determined in advance, and is not limited to a flat surface, but may also use a straight line, a curved surface, or the like. Furthermore, the difference signal between the interpolation signal and the original data formed by supplying basic pixel data to a digital low-pass filter may be ADRC encoded.

〔Effect of the invention〕

In this invention, prediction data is formed from a preset model and representative pixel data, and the difference value between the prediction data and the true value is ADRC encoded.

Since the dynamic range of the difference value is smaller than the dynamic range of the true value, efficient compression can be performed. Furthermore, since ADRC is used, there is an advantage that there is no error propagation.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is a route diagram used to explain the pixel arrangement, Fig. 3 is a block diagram of an example of an interpolation signal generation circuit, and Fig. 4 is an example of transmission data. This is a route map. Explanation of main symbols in the drawings 1: Digital video data input terminal, 0: Interpolation borrow code generation circuit, 30: Subtraction circuit for detecting the difference between predicted data and true value, 31: Maximum value, minimum value Detection circuit, 35: Quantization circuit.

Claims (1)

[Scope of Claims] An image data encoding device in which at least one representative pixel and non-transmitted pixels that are transmitted in the original number of bits are predetermined in a block composed of a predetermined number of pixels, A prediction circuit that forms prediction data from the plurality of representative pixels for non-transmission pixels, a difference detection circuit that detects the difference between the prediction data and the true value, and blocks dynamic range information of the difference value from the difference detection circuit. unit, encodes the difference value block by block based on the dynamic range information, and outputs a code signal with a smaller number of bits than the original number of bits. An image data encoding device characterized in that it transmits information and a code signal from the encoding circuit.