JPH0221783Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Technical Field of the Invention] The present invention relates to a gain control circuit configured using a balanced differential amplifier.

[Technical background of the invention]

Generally, as electronic circuits such as television receivers become integrated, it is desirable to eliminate loss and signal leakage, and to eliminate mutual interference between circuits.
This is particularly important in circuits using differential amplifiers, such as gain control circuits using balanced differential amplifiers.

FIG. 1 shows a gain control circuit using a conventional balanced differential amplifier. In this figure, the common emitters of differential transistors Q ₁ and Q ₂ are connected to a signal source a that generates a signal current such as a video signal or a color signal.
The bases of transistor Q 2 are connected to the DC voltage power supply +B via resistors R ₁ and R ₂ , and the base of transistor Q ₂ is connected to the variable resistor VR for gain control via resistor _{R 3 .} Collector is load resistance
It is connected to the DC power supply Vcc via RL ₁ and RL ₂ , the collector of the transistor Q ₁ is connected to the midpoint of the load resistors RL ₁ and RL ₂ , and the output signal v ₀ is taken out from the collector of the transistor Q ₂ . There is. variable resistance
One end of VR is connected to the DC power supply Vcc, the other end is grounded, and the control voltage is divided and extracted.

Now, when the gain control variable resistor VR is adjusted to the DC power supply Vcc side, a positive voltage difference ΔV with respect to the DC power supply +B is created between the differential bases of the transistors Q ₁ and Q ₂ due to the resistors R ₃ and R ₂ . Transistor Q ₂ resulting in ₁
The base potential of the transistor increases by ΔV ₁ , and the transistor
A large signal due to ΔV ₁ appears at the collector of Q ₂ . Also, when the control variable resistor VR is adjusted to the ground side, a negative voltage difference -ΔV 2 occurs between the differential bases of _the transistors _{Q 1 and} R ₂ with respect to the DC voltage source +B due to the resistors R 3 and R ₂ . As a result, the base potential of transistor Q ₂ drops by ΔV ₂ , and a small signal due to ΔV ₂ appears at the collector of transistor Q ₂ .

[Problems with background technology]

However, in the gain control circuit using _the conventional balanced differential amplifier shown in Fig. ₁ , when the current amplification factor is hfe, the current of signal source a is A base current of 1/hfe flows, and a leakage signal appears in the resistors R ₁ and R ₂ connected to each base. Then, this leakage signal is changed by the control variable resistor VR, and the transistor
It leaks to the collector of Q ₂ , and since the DC voltage source +B is actually configured with a circuit using an emitter follower, it leaks to the DC voltage source +B side due to the voltage drop caused by the resistors R ₁ and R ₂ . It was hot. As a countermeasure to this, it is possible to reduce the resistance values of resistors R ₁ , R ₂ and resistor R ₃ , but if the resistance values are reduced, the gain control sensitivity by the control variable resistor VR will deteriorate, and it will require a large amount of integration. The problem was that it became difficult to

[Purpose of invention]

SUMMARY OF THE INVENTION An object of the present invention is to provide a gain control circuit that can prevent a leakage signal from appearing at the base of a differential transistor of a gain control circuit using a balanced differential amplifier from a signal source.

[Summary of the idea]

This invention connects another differential amplifier in parallel to a gain control circuit using a balanced differential amplifier.
By making the signal phase of the signal source connected to the common emitter of the differential transistor of the first differential amplifier and the signal phase of the signal source connected to the common emitter of the second differential amplifier opposite in phase, The configuration is such that no leakage signal is generated at the base of the differential transistor of the first differential amplifier.

[Example of idea]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 2 is a circuit diagram of a gain control circuit according to the present invention.

In FIG. 2, the circuit is composed of a differential amplifier 1, a differential amplifier 2, etc. Differential amplifier 1 connects the bases of differential transistors Q ₁ and Q ₂ to DC voltage source +B via resistors R ₁ and R 2, and connects the bases of differential transistors Q 1 and Q ₂ to DC voltage source +B.
The base of Q ₂ is connected to the variable resistor VR for gain control via the resistor R ₃ , and the collector of the transistor Q ₂ is connected to the DC power supply Vcc via the load resistors RL ₁ and RL ₂ .
The collector of transistor Q ₁ is connected to load resistors RL ₁ and RL ₂
The common emitter is connected to the signal source a. The above variable resistor VR has one end connected to the DC power supply.
Connected to Vcc and the other end is grounded. On the other hand, in the differential amplifier 2, _a signal source (-a) that outputs a signal with the opposite phase of the signal source a is connected to the common emitters of the differential transistors Q ₃ and Q 4, and the collectors of the transistors Q ₃ and Q ₄ are connected to each other. Both are connected to the DC power supply Vcc, the base of the transistor _Q3 is connected to the base of the transistor _Q2 , and the base of the transistor _Q4 is connected to the base of the transistor _Q1 . In the circuit configured as described above, the output signal v ₀ is taken out from the collector of the transistor Q ₂ .

In such a configuration, if the gain control variable resistor VR is adjusted to the DC power supply Vcc side, the resistor
Due to R ₃ and R ₂ , a positive voltage difference ΔV ₁ with respect to the DC power supply +B appears at the common base of transistors Q ₂ and Q ₃ , the potential of the common base increases by ΔV ₁ , and a large signal is generated at the collector of transistor Q ₂ . Output.
In addition, when the control variable resistor VR is adjusted to the ground side, a negative voltage difference -ΔV ₂ with respect to the DC voltage source + _B appears at the common base of the transistors _{Q 2 and} Q ₃ due to the resistors R 3 and R 2, and the common The base potential drops by ΔV ₂ , and a small signal is output to the collector of transistor Q ₂ .

At this time, in the conventional circuit shown in FIG. 1, a base current of 1/hfe of the current of the signal source a flows through the bases of the differential transistors Q 1 and Q ₂ , and a leakage signal is generated _by the resistors R ₁ and R ₂ . However, in the circuit shown in FIG. 2, differential amplifier 1 and differential amplifier 2 are connected in parallel, and the signal source a of amplifier 1 and the signal source a of amplifier 2 are connected in parallel. Signal source-a
Since signal sources with opposite phases are used, base currents that cancel each other flow through the bases of transistors Q ₁ and Q ₄ and the bases of transistors Q ₂ and Q ₃ . No leakage signal appears due to R ₁ and R ₂ , and therefore no leakage signal occurs at the collector output of transistor Q ₂ . Therefore, resistance R ₁ ,
While the gain control sensitivity can be improved by increasing R ² and R ₃ , since the DC voltage source +B is actually configured with a circuit using an emitter follower, it can be integrated without any leakage to this circuit. This has the advantage of being easier.

FIG. 3 is a circuit diagram showing an example in which the gain control circuit shown in FIG. 2 is applied to, for example, a circuit of a television receiver.

In this figure, in addition to the circuit shown in FIG. 2, which includes a signal source a and a signal source -a having the opposite phase,
A circuit having the same configuration as this and including a signal source b and a signal source b of opposite phase is provided, and a video signal source a is provided.
The signal from the chroma signal source b and the signal from the chroma signal source b are controlled by the same control variable resistor VR.

That is, differential amplifiers 3 and 4 are provided corresponding to differential amplifiers 1 and 2 shown in FIG. 2, and transistors Q ₁ ,
Transistors Q ₅ , Q 6 , Q ₆ correspond to Q ₂ , Q ₃ , Q ₄ ,
Q ₇ , Q ₈ , load resistors RL ₃ , RL ₄ corresponding to load resistors RL ₁ , RL ₂ , transistors Q ₁ , Q ₄ , Q ₅ ,
_Q8 is used as a common base, while connected to the same DC voltage source +B via resistor _R1 , and transistors _Q2 ,
Q ₃ , Q ₆ , and Q ₇ are connected to the same control variable resistor VR via resistor R ₃ on a common base.
Connect to the same DC voltage source +B via R ₂ ,
Load resistors RL ₁ , RL ₃ and transistors Q ₃ , Q ₄ ,
The collectors of Q ₇ and Q ₈ are connected to the same DC power supply Vcc.

With this configuration, the transistors Q ₁ , Q ₂ , Q ₃ , Q ₄ , Q ₅ , Q ₆ , Q ₇ , Q ₈ of the balanced differential amplifier
No leakage signal occurs at the bases of the transistors Q ₂ and Q 6, and the video output v ₀₁ and chroma output controlled by the control variable resistor VR are connected to the collectors of the transistors Q 2 and Q ₆ .
v ₀₂ is obtained. Therefore, leakage signals from the bases of the transistors Q ₂ and Q ₆ do not enter the collectors of the transistors Q 2 and Q 6 .

Note that the configurations of the differential amplifiers 1, 2 or 3, 4 are not limited to those shown in the drawings, and modifications are possible. For example, in FIG. 2, the collector of transistor Q1 is coupled to the DC power supply Vcc via load resistor RL1, and the collector of transistor Q2 is coupled to load resistors RL1, RL.
Although the collectors of the transistors Q1 and Q2 may be coupled to the DC power supply Vcc through equal load resistances, respectively. Alternatively, the collector of transistor Q1 may be directly connected to DC power supply Vcc, and only the collector of transistor Q2 may be coupled to DC power supply Vcc via a load resistor.

In short, it is sufficient if a load resistor is connected to the collector of the transistor Q2 in order to obtain an output signal, and the collector of the transistor Q1 is connected to the DC power supply Vcc in a DC manner. The type of configuration to be adopted depends on the usage form of the output signal.

Furthermore, the transistors Q3 and Q4 have exactly the same configuration as the differential amplifier 1, that is, the second
In the example shown in the figure, the collector of transistor Q3 is connected to the DC power supply Vcc via load resistors RL1 and RL2, and the collector of transistor Q4 is connected to load resistor RL1.
By coupling the base currents of transistors Q1 and Q4 and transistors Q2 and Q3 to the DC power supply Vcc through the transistors, the magnitude of the base currents of transistors Q1 and Q4 and transistors Q2 and Q3 can be made completely equal and have opposite phases to each other, further increasing the canceling effect of leakage signals. be able to.

However, even if differential amplifiers 1 and 2 do not have exactly the same configuration as shown in Figure 2, if a certain degree of cancellation effect can be obtained, the amplitude of the leakage signal can be considerably reduced, and leakage to other parts can be reduced. can be prevented. Therefore, the collectors of transistors Q3 and Q4 may also be connected to the DC power supply Vcc in a DC manner.

[Effect of idea]

As described above, according to the present invention, another differential amplifier is connected in parallel to a gain control circuit using a balanced differential amplifier, and the signal source is connected to the common emitter of the first differential amplifier. Since signal sources with opposite phases are used as the signal sources connected to the common emitter of the second differential amplifier and the second differential amplifier, it is possible to prevent leakage signals from the signal sources from appearing at the bases of these differential amplifiers. be able to. Therefore, for example, by preparing two or more circuits with the above configuration and using the same DC power supply and the same variable resistance for gain control, it is possible to control the gain of two or more types of signals without causing them to interfere with each other, and eliminate unnecessary current. This has the effect that it is possible to realize a gain control circuit suitable for integration.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a conventional gain control circuit, FIG. 2 is a circuit diagram of a gain control circuit according to the present invention, and FIG. 3 is a circuit diagram showing an application example of the circuit shown in FIG. 2. 1, 2... Differential amplifier, Q ₁ , Q ₂ , Q ₃ , Q ₄ ...
Differential transistor, R ₁ , R ₂ , R ₃ ... Resistor, RL ₁ ,
RL ₂ ...Load resistance, +B, Vcc...DC power supply, VR
...Variable resistor for gain control, a...Signal source, -a...
...Reverse phase signal source.

Claims (1)

[Claims for Utility Model Registration] A first signal source, a second signal source that generates a signal having a negative phase relationship with the signal from the first signal source, and a device in which the first signal source has a common emitter. first and second transistors connected to the second signal source; third and fourth transistors whose emitters are commonly connected to the second signal source; and a common base of the first and fourth transistors;
and means for coupling the common bases of the second and third transistors to a first DC power source via a first resistor and a second resistor, respectively; means for supplying a control voltage for gain control through a resistor No. 3; means for DC coupling the collector of the first transistor to a second DC power supply; and means for connecting the collector of the second transistor to a load resistor. and means for DC-coupling the collectors of the third and fourth transistors to the second DC power supply via the collector of the second transistor. A gain-controlled signal is extracted, and a leakage signal from the first signal source appearing at the bases of the first and second transistors is extracted from the second signal source appearing at the bases of the fourth and third transistors. A gain control circuit characterized in that the gain control circuit is configured to cancel by a leakage signal from a signal source.