JPH0221928U - - Google Patents

Info

Publication number
JPH0221928U
JPH0221928U JP10066888U JP10066888U JPH0221928U JP H0221928 U JPH0221928 U JP H0221928U JP 10066888 U JP10066888 U JP 10066888U JP 10066888 U JP10066888 U JP 10066888U JP H0221928 U JPH0221928 U JP H0221928U
Authority
JP
Japan
Prior art keywords
amplifier
circuit
pulse frequency
output
image signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10066888U
Other languages
Japanese (ja)
Other versions
JP2563045Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988100668U priority Critical patent/JP2563045Y2/en
Publication of JPH0221928U publication Critical patent/JPH0221928U/ja
Application granted granted Critical
Publication of JP2563045Y2 publication Critical patent/JP2563045Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本考案によるパルス周波数変調回路の
実施例を示す回路図、第２図は従来のパルス周波
数変調器の回路図である。 １，７……クランプ回路、２，８……入力ドラ
イバ回路、３，９……パルス周波数変調器、４，
１０……信号入力部、５，１１……信号出力部、
６，１２……トランジスタ、１３，２０……増幅
器、１４，２１……差動増幅器、１５，１８，２
３……抵抗、１６，１９，２４……ダイオード、
１７，２２……コンデンサ。 FIG. 1 is a circuit diagram showing an embodiment of a pulse frequency modulation circuit according to the present invention, and FIG. 2 is a circuit diagram of a conventional pulse frequency modulator. 1, 7... Clamp circuit, 2, 8... Input driver circuit, 3, 9... Pulse frequency modulator, 4,
10... Signal input section, 5, 11... Signal output section,
6,12...Transistor, 13,20...Amplifier, 14,21...Differential amplifier, 15,18,2
3...Resistor, 16,19,24...Diode,
17, 22... Capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 画像信号を増幅器に入力し、前記増幅器出力を
差動増幅器で参照電圧と比較し、前記差動増幅器
出力を前記増幅器入力に接続することにより画像
信号の同期信号の先端をクランプするクランプ回
路と、前記クランプ回路の増幅器出力をトランジ
スタのベースに入力し、前記トランジスタのエミ
ツタ抵抗を介して同期信号がクランプされた画像
信号を取り出す入力ドライバ回路と、前記入力ド
ライバ回路より取り出された画像信号をパルス周
波数変調するパルス周波数変調器とからなるパル
ス周波数変調回路において、前記差動増幅器の反
転入力端子を前記入力ドライバ回路のトランジス
タのエミツタに接続するとともに前記差動増幅器
の出力に時定数回路を設けたことを特徴とするパ
ルス周波数変調回路。 a clamp circuit that inputs an image signal to an amplifier, compares the output of the amplifier with a reference voltage using a differential amplifier, and clamps the leading end of the synchronization signal of the image signal by connecting the output of the differential amplifier to the input of the amplifier; An input driver circuit inputs the amplifier output of the clamp circuit to the base of the transistor and takes out an image signal with a synchronization signal clamped through the emitter resistor of the transistor, and an input driver circuit that outputs the image signal taken out from the input driver circuit at a pulse frequency. In a pulse frequency modulation circuit comprising a pulse frequency modulator that performs modulation, an inverting input terminal of the differential amplifier is connected to an emitter of a transistor of the input driver circuit, and a time constant circuit is provided at the output of the differential amplifier. A pulse frequency modulation circuit featuring:
JP1988100668U 1988-07-29 1988-07-29 Pulse frequency modulation circuit Expired - Lifetime JP2563045Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988100668U JP2563045Y2 (en) 1988-07-29 1988-07-29 Pulse frequency modulation circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988100668U JP2563045Y2 (en) 1988-07-29 1988-07-29 Pulse frequency modulation circuit

Publications (2)

Publication Number Publication Date
JPH0221928U true JPH0221928U (en) 1990-02-14
JP2563045Y2 JP2563045Y2 (en) 1998-02-18

Family

ID=31328950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988100668U Expired - Lifetime JP2563045Y2 (en) 1988-07-29 1988-07-29 Pulse frequency modulation circuit

Country Status (1)

Country Link
JP (1) JP2563045Y2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54104268A (en) * 1978-01-24 1979-08-16 Vladimir Arekuseeeuitsuchi Zor Pulse voltage amplifier for correcting drift
JPS5847891A (en) * 1981-09-17 1983-03-19 松下電器産業株式会社 door mounting device
JPS614058A (en) * 1984-06-18 1986-01-09 Konishiroku Photo Ind Co Ltd Automatic developing machine for color photographic sensitive material
JPS62115923A (en) * 1985-11-15 1987-05-27 Hitachi Ltd Modulation frequency stabilizing circuit for pulse frequency modulator

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54104268A (en) * 1978-01-24 1979-08-16 Vladimir Arekuseeeuitsuchi Zor Pulse voltage amplifier for correcting drift
JPS5847891A (en) * 1981-09-17 1983-03-19 松下電器産業株式会社 door mounting device
JPS614058A (en) * 1984-06-18 1986-01-09 Konishiroku Photo Ind Co Ltd Automatic developing machine for color photographic sensitive material
JPS62115923A (en) * 1985-11-15 1987-05-27 Hitachi Ltd Modulation frequency stabilizing circuit for pulse frequency modulator

Also Published As

Publication number Publication date
JP2563045Y2 (en) 1998-02-18

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