JPH02223064A - Optical recording and reproducing device - Google Patents

Abstract

PURPOSE:To correctly and additionally record a pit on a next sector by finishing the output of an initial pulse when the counting number of a high frequency clock coincides with the rise time of the initial pulse and outputting a recording pulse in response to the initial pulse with the aid of a pattern detection signal. CONSTITUTION:The high frequency clock is started to be counted by the counter CT1 of an initial pulse rise generation part B4 in response to a synchronizing signal given from the synchronizing signal separation circuit DB of a data demodulation part B1. Simultaneously, the initial pulse is outputted from the comparison circuit HC2 of the generation part B4 when the number counted by the counter CT corresponds to an initial pulse time set by an initial pulse time set circuit 5G. Then, when an end pattern detection signal from an end pattern detection part B2 is inputted, the recording pulse is outputted in response to the initial pulse from the initial pulse rise generation part B4. Thus, even when a pit detection signal is not given to the data demodulation part B1, the first pit of a next sector is additionally recorded on a correct position because the synchronizing signal of the data demodulation part is generated in a former cycle.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention records data in the form of bits on a track of a recording medium using a spot light emitted from a semiconductor laser, and also records data in the form of bits on a track of a recording medium using a spot light emitted from a semiconductor laser. It relates to an optical recording and reproducing device that is configured to read bits and reproduce data by illuminating them with light or a spot light from another light source. Specifically, it is a device that is configured to read bits and reproduce data by illuminating them with light or a spot light from another light source. Concerning what to do.

(Prior Art) The format for recording data in the form of bits on the tracks of a card-shaped recording medium used in this type of optical recording/reproducing device (continuous write-once type) (t+ one mat) is shown in FIG. It is known what happens.

The continuous write-once format shown in the figure divides the data recorded on the track of the recording medium into multiple sectors.
In this example, it is divided into four sectors A-D, and each sector A-D is
It is composed of continuous spaces. In other words, in this continuous write-once format, as shown in FIG. Bit aPl of
Subsequently, each bit P2 .・・・
The first bit bP2 of . is continuously additionally recorded.

In such a continuous write format method, for example, when bit P2... of sector B is to be added next to sector A where bit pt... has already been recorded in one track, the bit P2... of sector B must be written from sector A to sector B. It is necessary to add bit P2 of sector B with good timing to bit P1 of sector A so that synchronization can be achieved correctly during continuous playback. Therefore, at the end of each sector A-D, there is a mark or pattern (
A plurality of bits arranged corresponding to the end-of-sector pattern (sector end pattern) are recorded, and when writing additionally, the first bit bP2 of sector B is set at a synchronized position from the last bit aP1 of the end-of-sector pattern of sector A. It is essential to add this information as well.

Fig. 5 is a circuit diagram of a recording circuit (part of which is also used as a reproducing circuit) provided in a conventional optical recording/reproducing apparatus for such a continuous write-once format, and Fig. 6 is a circuit diagram for explaining the operation of the circuit. This is a timing chart provided.

This recording circuit will be explained with reference to these figures, but in order to simplify the explanation, it is necessary to output recording data to be recorded in the form of bits on a track of a recording medium in the recording/reproducing apparatus. a semiconductor laser as a means for generating and recording bits on the track according to the recording data from the recording data output means; a means for detecting the recorded bits; and outputting a detection command signal for the end pattern of each sector. The means and means for outputting an operational high frequency clock are not shown.

Note that the black circles in FIG. 6 indicate bits previously recorded in the MFM[ii method, for example, the bits in sector A. In this case, the data in sector A is r 010100... from the bits marked with black circles as shown in the same figure.
” digital data. Furthermore, a white circle surrounded by a broken line indicates an unrecorded bit to be recorded in sector B next to sector A. In such bits, the bit detection signal S2 is now sent to the data demodulator B! in response to the detection of the bit marked with a black circle in sector A. given to. - As a result, the synchronization signal S3 is output from the synchronization signal separation circuit DB in the data demodulation section Bi. This synchronization signal separation circuit DB
is composed of a PLL (phase locked loop). The synchronizing signal S3 is also given to the data discriminating circuit DH within the data demodulating section BI. This data discrimination circuit DH determines that the data is rlJ when the bit detection signal S2 is input at the timing when the synchronization signal S3 is at a high level, and determines that the data is rOJ at other timings. At the same time, the data signal S4 is outputted to the end pattern detection section B2 as a result of the discrimination. Then, when the end pattern detection command signal S1 rises to a high level, the data signal S4 is serially input to the shift register SR in the end pattern detection section B2. This end pattern detection section B2 contains an end pattern (rllO'01111 as data).
J) is set in advance in the end pattern setting circuit O8 and the end pattern (comparison end pattern) included in the data signal S4 input to the shift register SR.
and the end pattern (set road warp pattern) set in the end pattern setting circuit O8, and if both pillar warp patterns match, the end pattern detection signal S is
Outputs 5.

The reference clock generating section B3 generates an MFM variable percentage (modffi).
ed is an abbreviation for frequency modulation, and in this recording circuit, the bit interval is
T,! .

There are three types, 5T and 2T, and the data is modulated at these three types of bit intervals. ) is used to continuously output a reference clock signal S8 corresponding to a writing reference interval of 0.5T in the form of bits so as to be synchronized with a previously recorded bit (recorded bit). . The reference clock generating section B3 starts a counting operation in response to the input of the end pattern detection signal S5, and includes a counter CT that counts the high frequency clock S6 generated within the device, and a count number (actual count number) of the counter CT. ) reaches a predetermined value (predetermined count number) corresponding to the recording interval of 0.5T in accordance with the set feed speed of the recording medium, so that the reference clock S8 can be outputted in advance. A comparison circuit that compares the set predetermined count number setting circuit KS, the actual count number of the counter CT, and the predetermined count number in the predetermined count number setting circuit SS, and outputs the reference clock S8 when the two match. It is composed of HCI. In this case, the counter CT is configured to be reset by being supplied with this reference clock S8.

This reference clock S8 is the recording pulse rise setting section K.
given to S. This recording pulse rise setting section KS
is a recording pulse S1 for driving the semiconductor laser to write a bit by driving the semiconductor laser.
0 rise time (applied from the second 510b of the recording pulse 510a in the figure). Specifically, the delay time of the reference clock S8, that is, Oa in the figure is entered. reference clocks S8b, S8c
The delay time is set in determining the rise timing of the recording pulse 5IObS10c, which is also marked with a circle, and which corresponds to the one connected by the arrow.

The initial pulse rising generation unit B4 generates the first pulse to be additionally recorded, that is, the final bit Pa of the end pattern among the unrecorded bits P2a, P2b, P2c, etc. marked with white circles indicated by the broken line in the figure. A pulse S10a used for additional recording of the next bit P2a is generated and output as an initial pulse rising signal S9. Therefore, this generating section B4 includes a counter CTI that starts counting the high frequency clock S6 at the same time as it is reset by the input of the bit detection signal S2, and a bit detection signal S
From the input of 2 to the rising edge of the initial pulse. The initial pulse time setting circuit SG, in which the count number corresponding to the time ts up to The comparator circuit CT2 outputs an initial pulse rising signal S9 when the two match each other.

When the end pattern detection signal S5 is output from the end pattern detection section B2, the gate circuit GC is opened, and the initial bit detection signal S2a corresponding to the last bit in the bit detection signal S2 is detected through the gate circuit GC. 39a in the pulse rising signal S9 is applied to the pulse width setting section PS via the gate circuit GC1, thereby producing the first recording pulse S1. of the pulse width tp for the semiconductor laser. Oa
is output as Then, this first recording pulse 5I
The next recording pulse (second and subsequent recording pulses) after Oa (first recording pulse) S10b, 5lOC, etc. are recording pulse rise setting section K based on the reference clock S8.
A signal 5ll (not shown) from S is sent to the pulse width setting section P.
S, and recording pulses 510b, 5lOc, . . . corresponding to the recording data S7 are outputted via a gate circuit GCI that opens and closes in response to the recording data S7.

As a result, each white circle mark P2a, P2b, P2 on the broken line
Each bit of the next sector is additionally recorded at the position indicated by C.

(Problem to be Solved by the Invention) In a recording/reproducing device having such a conventional recording circuit, there are scratches, dust, defects, etc. on the track of the recording medium, and the last bit of the end pattern of the sector is detected. In some cases, bits could not be added to the correct position for the next sector.

The present invention has been made in view of the above, and the PLL that constitutes the synchronization signal separation circuit of the data demodulation section is capable of removing the synchronization signal separation circuit from the synchronization signal separation circuit even if the bit detection signal is missing about 1.2 bits. There is no sudden change in the period of the synchronization signal that is output, and the synchronization signal is output at a short period, and
We focused on the fact that it is possible to determine that the end-of-sector pattern is an end-of-sector pattern even if there is a reading error of about 1.2 bits, and we use a synchronization signal to place the bits in the correct position in the next sector. The purpose is to enable additional recording.

(Means for Solving the Problems) In order to achieve such an object, in the optical recording/reproducing apparatus of the present invention, bits (recorded bits) previously recorded on a track of a recording medium corresponding to data are completed bit)
a data demodulation section including a synchronization signal separation circuit made up of a PLL that separates and outputs a synchronization signal in synchronization with the input of a bit detection signal that detects the bit detection signal; An end pattern detection section that outputs an end pattern detection signal corresponding to the pattern, a counter that starts counting the high frequency clock in response to a synchronization signal given from the synchronization signal separation circuit of the data demodulation section, and a rise time of the initial pulse. an initial pulse time setting circuit that is set to be output; and a comparison circuit that outputs an initial pulse when the count number from the counter matches the initial pulse rise time given from the initial pulse time setting circuit. a recording circuit including a pulse rising generating section, and outputting a recording pulse in response to an initial pulse from the initial pulse rising generating section when an end pattern detection signal is input from the turning pattern detecting section. It is characterized by

(Operation) In the above configuration, the synchronization signal separation circuit of the data demodulation section separates and outputs a synchronization signal synchronized with the input of the bit detection signal. On the other hand, the end pattern detection section outputs an end pattern detection signal corresponding to the end pattern of the sector in response to the data signal from the data demodulation section.

The counter of the initial pulse rising generation section starts counting the high frequency clock in response to the synchronization signal given from the synchronization signal separation circuit of the data demodulation section, and
When the count number of the counter corresponds to the initial pulse time set by the initial pulse time setting circuit, an initial pulse is output from the comparison circuit. Then, when an end pattern detection signal is input from the end pattern detection section, a recording pulse is output in response to an initial pulse from the initial pulse rise generation section.

Therefore, in the present invention, even if the last bit of the end pattern is not detected due to scratches or defects on the track of the recording medium, and the bit detection signal is no longer given to the data demodulator, the data demodulator is synchronized. The synchronization signal from the signal separation circuit is generated with the cycle of the previous synchronization signal when the bit has scratches and defects of about 1 or 2 bits, so in response to the synchronization signal, the synchronization signal is generated from the initial pulse rise generation part. The initial pulse of will allow the first bit of the next sector of the ending pattern to be additionally recorded in the correct position.

(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 1 is a schematic diagram of an optical recording/reproducing apparatus according to an embodiment of the present invention. The optical recording/reproducing apparatus of this embodiment shown in the figure has tracks T K 1 , , , of the recording medium RM.
T K 2 , . . . the first light projection system A1 for irradiating the recording spot light SPl onto the recording medium RM;
Trucks TKI, TK2. . . . A second light projection system A2 for irradiating the reproducing spot light SP2 onto the recording medium RM, and receiving the reflected light of the reproducing spot light SP2 from the recording medium RM and placing it on the track of the recording medium RM as an information unit. It consists of a light receiving system B for reproducing generated and recorded bits.

The first light projection system AI uses a semiconductor laser LD as a first light source, and forms the output light from the front of the semiconductor laser LD into parallel light using a collimating lens CLI, and converts the parallel light into parallel light. After passing through beam splitter BS and half mirror HM, track TK1. of recording medium RM is scanned by objective lens TL. TK2. ...Recording spot light SPI with a diameter of about 1 μm focused upwards
generate.

This recording spot light SPI is located on track TK1. of the recording medium RM. TK2. ... Bits are recorded by irradiating the top. This bit has a lower light reflectance than other parts of the recording medium, or the hole shape causes the emitted light to be scattered, causing the photodiode PD that monitors the reflected light to The amount of light received is reduced.

-3↑2υ The second light projection system A2 uses a light emitting diode LED as a second light source, and forms the output light of the light emitting diode LED into parallel light using a collimator lens CL2,
After this parallel light passes through the beam splitter BS and the half mirror HM in the first projection system AI, it is directed to the tracks TKI, TK of the recording medium RM by the objective lens TL.
2. ...The diameter is several μm to several lOμ when focused upward.
A reproduction spot light SP2 of about m is generated. This reproduction spot light SP2 is irradiated immediately after the irradiation position of the recording spot light SPI, but the amount of reflected light differs depending on whether it is located on a bit or not. It is now possible to determine the content of the data based on that bit.

The light receiving system B receives the reproduction spot light S reflected by the recording medium RM.
After the reflected light from P2 passes through the objective lens TL and is reflected by the half mirror HM, it is converged by the condensing lens SL and received by the photodiode PD.Based on this light reception signal, it is possible to determine whether there is a bit or not. It is now possible to determine the content of the data corresponding to the bit. The recording medium RM is caused to perform reciprocating linear motion in the direction of the arrow in FIG. 1 by the motor MT, thereby recording and recording data.
It is said that playback is possible.

FIG. 2 is a diagram of an internal recording circuit provided in the optical recording/reproducing apparatus of this embodiment, and FIG. 3 is a timing chart for explaining the operation of the circuit of FIG. 2. In FIGS. 2 and 3, parts that are the same as or correspond to those in FIGS. 5 and 6 according to the conventional example are given the same reference numerals, and explanations of the parts with the same or minus signs are omitted. do.

The present embodiment shown in FIG. 2 will be explained focusing on the configuration different from the conventional example.

In the recording circuit of this embodiment, the bit detection signal S2 is given as a count start signal to the counter CTI of the initial pulse rising generation section B4 of the conventional example. DB
The synchronizing signal S3 is given as the count start signal.

The rest of the configuration of the recording circuit of this embodiment is the same as that of the conventional example, so a description thereof will be omitted.

According to the recording circuit of this embodiment, even if there are scratches or defects on the tracks of the recording medium and bits are not reproduced correctly and the bit detection signal S2 is not provided to the data demodulating section B1,
The PLL that constitutes the synchronization signal separation circuit DB of the data demodulation section B1 outputs the synchronization signal S3 while maintaining the cycle of the previous synchronization signal S3 even if the bit detection signal S2 is missing about 1 to 2 bits. If the count start of the counter CTI of the initial pulse rise generator B4 is controlled based on the synchronization signal S3, the initial pulse S9 can be additionally recorded at the correct position of the first bit of the next sector.

(Effects of the Invention) As is clear from the above explanation, according to the present invention, even if the bit detection signal is missing due to scratches or defects on the track of the recording medium, the synchronization signal separation circuit of the data demodulation section Since the synchronizing signal is outputted at the previous cycle, the initial pulse can be outputted from the initial pulse rise generating section using the synchronizing signal. Therefore, the initial pulse can additionally record the first bit of the next sector at the correct position from the last bit of the end pattern of the sector.

[Brief explanation of the drawing]

1 to 3 relate to an embodiment of the present invention, FIG. 1 is a configuration diagram of an optical recording/reproducing device of the same embodiment, and FIG. 2 is an internal circuit diagram of an optical recording/reproducing device of the same embodiment. , FIG. 3 is a timing chart for explaining the operation of the optical recording/reproducing apparatus of the same embodiment. FIG. 4 is a diagram showing the format of the continuous additional recording method. 5 and 6 relate to a conventional example, FIG. 5 is an internal circuit diagram of the optical recording/reproducing apparatus according to the conventional example, and FIG. 6 is a timing chart for explaining the operation. B1...Data demodulation section, B2...End pattern detection section, B4...Initial pulse rising generation section.

Claims (1)

[Claims] (1) P that separates and outputs a synchronization signal in synchronization with the input of a bit detection signal that detects a previously recorded bit (recorded bit) corresponding to data on a track of a recording medium.
a data demodulation section including a synchronization signal separation circuit configured with a LL; an end pattern detection section that outputs an end pattern detection signal corresponding to an end pattern of a sector in response to a data signal from the data demodulation section; a counter that starts counting a high-frequency clock in response to a synchronization signal given from a synchronization signal separation circuit of the data demodulation section;
The initial pulse is output when the output initial pulse time setting circuit in which the rise time of the initial pulse is set and the count number from the counter match the initial pulse rise time given from the initial pulse time setting circuit. and a recording circuit including an initial pulse rising generating section having a comparison circuit, and responding to the initial pulse from the initial pulse rising generating section when an end pattern detection signal is input from the end pattern detecting section. What is claimed is: 1. An optical recording/reproducing device that outputs a recording pulse using a recording pulse. Optical recording and reproducing device.