JPH02224311A - Manufacture of laminated ceramic electronic part - Google Patents

Manufacture of laminated ceramic electronic part

Info

Publication number
JPH02224311A
JPH02224311A JP4331889A JP4331889A JPH02224311A JP H02224311 A JPH02224311 A JP H02224311A JP 4331889 A JP4331889 A JP 4331889A JP 4331889 A JP4331889 A JP 4331889A JP H02224311 A JPH02224311 A JP H02224311A
Authority
JP
Japan
Prior art keywords
electroplating
layer
internal electrode
electrode
laminated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4331889A
Other languages
Japanese (ja)
Inventor
Masaki Ishimori
正樹 石森
Kenji Kumamoto
憲二 熊本
Rei Eriguchi
玲 江里口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiheiyo Cement Corp
Original Assignee
Onoda Cement Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Onoda Cement Co Ltd filed Critical Onoda Cement Co Ltd
Priority to JP4331889A priority Critical patent/JPH02224311A/en
Publication of JPH02224311A publication Critical patent/JPH02224311A/en
Pending legal-status Critical Current

Links

Landscapes

  • Ceramic Capacitors (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)

Abstract

PURPOSE:To obtain a laminated type ceramic electronic part having almost no electric inert margin part by a method wherein, when an inner electrode and an outer electrode are connected, an insulating layer is formed after a selective electric plating treatment has been provided on the inner electrode layer exposed to a side face. CONSTITUTION:When an inner electrode 2 is connected every other layer to an outer electrode 6, the inner electrode layer 2 is removed every other layer by connecting an electric plating treatment when an insulating layer 13 is formed, and also a bump electrode is formed on the inner electrode which is desired to be connected to the outside electrode. Accordingly, the insulate layer 13 can be formed precisely and accurately even when the interval of the inner electrode becomes very thin as 70 micron or less, and the inner electrode 2 and the outer electrode 14 are connected every other layer without having a short circuit or a continuity failure. As a result, a high density and microminiature laminated ceramic electronic part, having almost no electric inert margin part, can be obtained.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明はセラミックス電子部品の中で積層構造を有する
電子部品、例えば積層型セラミックスコンデンサ、積層
型圧電アクチュエータ、Wt層型バリスタ等の製造方法
に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing ceramic electronic components having a laminated structure, such as a laminated ceramic capacitor, a laminated piezoelectric actuator, a Wt layered varistor, etc. .

[従来の技術] 積層型セラミックス電子部品は一般に第8図に記載する
ようにセラミックス層(21)と内部電極層(22)が
交互に積層されており、内部型8i!1(22)が1層
おきに外部電極(23)と電気的に接続された構造を有
している。第8図から分かるように、積層型セラミック
ス電子部品は内部?I! i (22)を1層おきに外
部環[i (23)と接続しなければならないため、セ
ラミックスの一部に内部電極のないマージン部分(24
)を設けて外部電極(z3)と内部電極(2z)が1層
おきに接続する構造になっている。
[Prior Art] A laminated ceramic electronic component generally has ceramic layers (21) and internal electrode layers (22) alternately laminated as shown in FIG. 8, and has an internal type 8i! 1 (22) has a structure in which every other layer is electrically connected to external electrodes (23). As you can see from Figure 8, is the multilayer ceramic electronic component internal? I! i (22) must be connected to the outer ring [i (23)] every other layer, so a margin part (24
) is provided so that the external electrode (z3) and the internal electrode (2z) are connected every other layer.

このような積層型セラミックス部品の構造は部品形状が
小さくなってくると、部品中に占める電気的に不活性な
マージン部分(24)の面積が増大し、有効な内部電極
(22)の面積が少なくなる。また、マージン部分をあ
る程度より小さくすることは製造時の位置合わせの技術
からして非常に困難であるため、電気的に不活性なマー
ジン部分く24)のほとんどない積層型セラミックス電
子部品の製造は非常に困難である。
In the structure of such a laminated ceramic component, as the component shape becomes smaller, the area of the electrically inactive margin portion (24) in the component increases, and the effective area of the internal electrode (22) increases. It becomes less. Furthermore, since it is extremely difficult to make the margin smaller than a certain level due to the alignment technology during manufacturing, it is difficult to manufacture multilayer ceramic electronic components that have almost no electrically inactive margin (24). Very difficult.

[発明が解決しようとする課題] これに対して、近年、電子機器の軽薄短小化技術の進歩
、ハイブリッドIC技術の進歩に伴いより小型、より高
密度の電子部品が求められている。
[Problems to be Solved by the Invention] On the other hand, in recent years, with advances in technology for making electronic equipment lighter, thinner, and smaller, and advances in hybrid IC technology, electronic components that are smaller and more dense are required.

従って、本発明の目的は積層型セラミックス電子部品を
製造する工程において、内部電極と外部電極を接続する
際に、側面に露出した内部電極層に選択的な電気メッキ
処理を施した後、絶縁体層を形成する積層型セラミック
ス電子部品の製造方法を提供するにある。特に、内部電
極間隔が70ミクロン以下の超小型の積層型セラミック
ス電子部品の製造方法として、70ミクロン以下の内部
Tri極間隔をもつ積層焼結体においても、内部電極層
を外部電極層と1層おきに接続することができ、内部電
極間隔70ミクロン以下の積層体において有効内部電極
が非常に大きく、電気的に不活性なマージン部分がほと
んど存在しない超小型、高密度のm層型電子部分が製造
できる製造方法として有効な方法を提供するにある。
Therefore, an object of the present invention is to perform selective electroplating on the internal electrode layer exposed on the side surface when connecting internal electrodes and external electrodes in the process of manufacturing multilayer ceramic electronic components. The present invention provides a method for manufacturing a laminated ceramic electronic component in which layers are formed. In particular, as a manufacturing method for ultra-small laminated ceramic electronic components with an internal electrode spacing of 70 microns or less, even in a laminated sintered body with an internal tri-electrode spacing of 70 microns or less, the internal electrode layer is one layer with the external electrode layer. The effective internal electrodes are extremely large in the stacked structure with an internal electrode spacing of 70 microns or less, and the ultra-small, high-density m-layer electronic part has almost no electrically inactive margin. The purpose is to provide an effective manufacturing method that can be manufactured.

[課題を解決するための手段] すなわち、本発明は内部電極層を1層おきに外部電極と
接続してなる積層型セラミックス電子部品の製造方法に
おいて、内部電極層を印刷したセラミックスグリーンシ
ートを、内部電極層が1層おきに相対する側面に露出す
るように所定枚数積層し、焼結して積層焼結体を得、得
られた積層焼結体の相対する側面に1層おきに露出して
いる各内部電極層を電気メッキ用外部電極により接続し
、まず、一方の該電気メッキ用外部電極を陽極とし、他
方の電気メッキ用外部電極を陰極として電気メッキ用外
部電極が不在の積層焼結体の一方の側面に電気メッキを
施すことにより陰極と接続されている内部電極に電気メ
ッキを施し且つ陽極と接続されている内部電極を除去し
て溝部を得、次に、該電気メッキ用外部電極の陽極と陰
極を交換して電気メッキ用外部電極が不在の積層焼結体
の他方の側面に電極メッキを施すことにより陰極と接続
されてい、る内部電極に電気メッキを施し且つ陽極と接
続されている内部電極を除去して溝部、を得、次に、得
られた溝部に絶縁体層を形成し、絶縁体層を有する側面
に対して垂直方向に積層焼結体を所定の寸法に切断し、
絶縁体を有する相対する側面の内部電極をIMおきに外
部電極と接続することを特徴とする積層型セラミックス
電子部品の製造方法に係る。
[Means for Solving the Problems] That is, the present invention provides a method for manufacturing a laminated ceramic electronic component in which every other internal electrode layer is connected to an external electrode, in which a ceramic green sheet on which internal electrode layers are printed, A predetermined number of internal electrode layers are stacked so that every other layer is exposed on opposing sides, sintered to obtain a laminated sintered body, and every other layer is exposed on opposing sides of the obtained laminated sintered body. First, one of the internal electrode layers is connected by an external electrode for electroplating, and one of the external electrodes for electroplating is used as an anode, and the other external electrode for electroplating is used as a cathode. By electroplating one side of the body, the internal electrode connected to the cathode is electroplated, and the internal electrode connected to the anode is removed to obtain a groove, and then a groove is formed for the electroplating. By replacing the anode and cathode of the external electrode and applying electrode plating to the other side of the laminated sintered body where there is no external electrode for electroplating, the internal electrode connected to the cathode is electroplated and the anode and The connected internal electrodes are removed to obtain a groove, and then an insulator layer is formed in the obtained groove, and the sintered body is laminated in a direction perpendicular to the side surface having the insulator layer to a predetermined size. Cut into
The present invention relates to a method of manufacturing a multilayer ceramic electronic component, characterized in that internal electrodes on opposing side surfaces having insulators are connected to external electrodes every IM.

また、本発明は内部電極材料として電気メッキ可能な金
属材料を使用し、電気メッキ溶液として内部電極材料と
同じ金属材料を含む電気メッキ溶液を用いる方法に係る
。
The present invention also relates to a method in which an electroplatable metal material is used as the internal electrode material, and an electroplating solution containing the same metal material as the internal electrode material is used as the electroplating solution.

更に、本発明は内部電極材料として銀の含有量が50モ
ル%以上の銀−パラジウムを使用し、電気メッキ溶液と
して銀電気メッキ溶液を使用する方法に係る。
Furthermore, the present invention relates to a method of using silver-palladium with a silver content of 50 mol % or more as the internal electrode material and using a silver electroplating solution as the electroplating solution.

更に、本発明は内部電極材料としてニッケル及び銅を使
用し、電気メッキ溶液としてそれぞれニッケル電気メッ
キ溶液及び銀電気メッキ溶液を使用する方法に係る。
Furthermore, the invention relates to a method using nickel and copper as internal electrode materials and using a nickel electroplating solution and a silver electroplating solution as the electroplating solutions, respectively.

[作 用] 以下、本発明の頂層型セラミックス電子部品の製造方法
を図を追って説明する。
[Function] Hereinafter, a method for manufacturing a top layer type ceramic electronic component of the present invention will be explained with reference to the drawings.

まず、電子セラミックスとして好適な性能を有するセラ
ミックスのグリーンシート(厚さ10〜100ミクロン
程度)に内部電極を印刷する。ここで、内部xjJii
層の印刷方法は慣用の方法のいずれによるものであって
もよい、内部電極層の厚さは通常5〜15ミクロン程度
である。また、内部電極層の材質は後の電気メッキ処理
時に電気メッキ溶液中で陽極反応で溶解し、陰極反応で
析出する金属であれば特に限定されるものではない。
First, internal electrodes are printed on a ceramic green sheet (about 10 to 100 microns thick) that has suitable performance as electronic ceramics. Here, internal xjJii
The layer may be printed by any conventional method, and the thickness of the internal electrode layer is typically on the order of 5 to 15 microns. Further, the material of the internal electrode layer is not particularly limited as long as it is a metal that dissolves in an anodic reaction and precipitates in a cathodic reaction in an electroplating solution during the subsequent electroplating process.

電気メッキ溶液として銀電気メッキ溶液を使用する場合
には、内部電極に使用する銀−パラジウム材料中の銀含
有量を50モル%以上とする必要がある。内部電極の銀
の含有量が50モル%未満の内部電極では銀電気メッキ
溶液を使用して電気メッキ処理を行っても絶縁が充分に
とれる寸法の溝部が形成されないために好ましくない。
When a silver electroplating solution is used as the electroplating solution, the silver content in the silver-palladium material used for the internal electrodes must be 50 mol% or more. Internal electrodes with a silver content of less than 50 mol % are not preferred because grooves with sufficient insulation dimensions cannot be formed even if electroplating is performed using a silver electroplating solution.

次に、内部電極層(2)を印刷したセラミックスのグリ
ーンシート(1)を所定の適当な大きさに切断し、加熱
圧着し、第1図に示すように内部電極層(2)が1層お
きに相対する側面に露出する形状の積層体を作製する。
Next, the ceramic green sheet (1) on which the internal electrode layer (2) has been printed is cut into a predetermined appropriate size and heat-pressed to form a single layer of the internal electrode layer (2) as shown in Figure 1. A laminate having a shape exposed on opposite sides at every other interval is produced.

得られた積層体を脱脂、焼成し、得られた積層焼結体の
内部電極が露出するように四側面を軽く研摩する。
The obtained laminate is degreased and fired, and the four sides of the obtained laminate sintered body are lightly polished so that the internal electrodes are exposed.

次に、第2図に示すように前記積層焼結体の内部電極層
(2)が1層おきに露出している相対する側面に銀ベー
ス1〜を焼き付けて電気メッキ用外部電極り3)とする
。
Next, as shown in FIG. 2, silver bases 1 to 1 are baked on the opposing sides of the laminated sintered body where every other internal electrode layer (2) is exposed, thereby forming external electrodes for electroplating (3). shall be.

次に、電気メッキ用外部電極(3)を設置した積層焼結
体に電気メッキ処理を施す。
Next, the laminated sintered body provided with the external electrode for electroplating (3) is electroplated.

第3図に示すような電気メッキ装置内に第2図に示す形
状を有する積層焼結体(4)を装填し、該積層焼結体の
電気メッキしたい一方の内部電極層側を電気メッキ溶液
に浸漬する。なお、予め、電気メッキ処理の不用な電気
メッキ用外部電極とその周辺及び他方の内部電極側は有
機値f[などで絶縁被覆(10)を施しておく必要があ
る(第4図参照)。
The laminated sintered body (4) having the shape shown in FIG. 2 is loaded into an electroplating apparatus as shown in FIG. Soak in. Note that it is necessary to apply an insulating coating (10) with an organic value f[, etc. to the external electrode for electroplating that does not require electroplating treatment, its surroundings, and the other internal electrode side in advance (see FIG. 4).

電気メッキ用外部電極の一方を正電圧、他方を負電圧に
なるように電源を接続して電気メッキ処理を行なう。正
電圧と接続している内部電極では、陽極反応が起こって
内部電極の溶解が生じて溝部が形成させ、負電圧と接続
している内部電極では112i%反応が起きて金属が析
出して突起電極が形成される。第5図は一方の側面を電
気メッキ処理した後の積層焼結体を示すものである。正
電圧と接続した電気メッキ用外部電極(3)に接続する
内部電極N(2)のみが除去されて溝部(11)が得ら
れ、負電圧と接続した電気メッキ用外部電極(3)に接
続する内部電極rg(2)には金属が析出して突起電極
(12)が形成される。
Electroplating is performed by connecting a power source so that one of the external electrodes for electroplating has a positive voltage and the other has a negative voltage. At the internal electrode connected to a positive voltage, an anodic reaction occurs and the internal electrode melts, forming a groove. At the internal electrode connected to a negative voltage, a 112i% reaction occurs and metal precipitates, forming a protrusion. Electrodes are formed. FIG. 5 shows the laminated sintered body after electroplating on one side. Only the inner electrode N (2) connected to the outer electrode for electroplating (3) connected to a positive voltage is removed to obtain a groove (11), which is connected to the outer electrode for electroplating (3) connected to a negative voltage. Metal is deposited on the internal electrode rg(2) to form a protruding electrode (12).

次に、電気メッキを施した側面を有機塗料などで絶縁被
覆処理した後、反対側の側面の絶縁、被覆を除去し、電
気メッキを施す。先に、正電圧を印加した電気メッキ用
外部電極(3)を負電圧に接続し、先に負電圧を印加し
た電気メッキ用外部電極(3)を正電圧に接続し、上述
と同様に処理し、突起電極及び溝部を得る。なお、突起
型i (12)の高さ及び溝部(11)の深さは電気メ
ッキの条件を選択することにより所定の寸法とすること
ができる。
Next, the electroplated side surface is coated with an insulating coating using organic paint, and then the insulation and coating on the opposite side surface is removed and electroplating is applied. First, connect the external electrode for electroplating (3) to which a positive voltage was applied to a negative voltage, connect the external electrode for electroplating (3) to which a negative voltage was applied to a positive voltage, and process in the same manner as above. Then, a protruding electrode and a groove are obtained. Note that the height of the protrusion type i (12) and the depth of the groove part (11) can be set to predetermined dimensions by selecting the electroplating conditions.

このようにして両側面に電気メッキ処理された積層焼結
体は1層おきに内部電極層(2)が所定の深さに除去さ
れ、溝部(11)が形成されており、更に、溝部のない
内部電極には突起電極が形成されている。次に、この溝
部(11)にエポキシ樹脂等の絶縁物質が含浸するよう
に絶縁被覆を施し、硬化させて絶縁体1 (13)を得
る。
In the laminated sintered body that has been electroplated on both sides in this way, every other internal electrode layer (2) is removed to a predetermined depth to form a groove (11). Projecting electrodes are formed on internal electrodes that are not present. Next, an insulating coating is applied to the groove portion (11) so that an insulating material such as epoxy resin is impregnated therein, and the insulating material is cured to obtain an insulator 1 (13).

次に、絶縁体11 (13)を有する側面を研摩して外
部型& (14)と接続したい内部電極の突起電極(1
2)を露出させる。その後、第6図に点線で示す切断ラ
イン(A)に沿って切断して必要な大きさの積層体を得
る。この積層体の外部電極(14)は内部T、極層(2
)の突起電極(12)が1層おきに露出している相対す
る側面にペースト、蒸着などで新たに形成し、エポキシ
樹脂などで外装すれば第7図に示すように積層型セラミ
ックス電子部品を得ることができる。
Next, the side surface with the insulator 11 (13) is polished and the protruding electrode (1) of the internal electrode that is to be connected to the external mold & (14) is polished.
2) Expose. Thereafter, the laminate is cut along the cutting line (A) indicated by a dotted line in FIG. 6 to obtain a laminate of a required size. The external electrode (14) of this laminate has an internal T, a polar layer (2
), the protruding electrodes (12) of every other layer are newly formed on the exposed opposing sides by paste, vapor deposition, etc., and then covered with epoxy resin, etc., to form a multilayer ceramic electronic component as shown in Figure 7. Obtainable.

本発明では積層型セラミックス電子部品を製造する工程
において、内部電極(2)を1層おきに外部i!1(6
)と接続する際に、絶縁体層(13)を形成するにあた
って内部電極層(2)を1層おきに電気メッキ処理によ
り除去し、また、外部電極と接続したい内部電極に突起
電極を形成することができるので、特に、内部電極間隔
が70ミクロン以下と非常に薄くなっても精度良く、ま
た正確に絶縁体層(13)を簡単に形成することができ
、内部電極(2)と外部電極(14)間において短絡ま
たは導通不良ということなしに内部電極(2)と外部電
極(14)を1層おきに接続することができる。
In the present invention, in the process of manufacturing a multilayer ceramic electronic component, every other layer of internal electrodes (2) is connected to the external i! 1 (6
), when forming the insulator layer (13), remove every other internal electrode layer (2) by electroplating, and also form a protruding electrode on the internal electrode to be connected to the external electrode. This makes it possible to form the insulating layer (13) with high precision and accuracy even when the internal electrode spacing is extremely thin, such as 70 microns or less, and to form the insulator layer (13) with high precision and accuracy. The internal electrodes (2) and external electrodes (14) can be connected every other layer without causing short circuits or poor continuity between the internal electrodes (14).

内部電極層(2)の除去は機械的な加工によることもで
きるが、部品の小型化、積層枚数の増加、内部電極層(
2)の薄層化が進むと、加工精度及び加工コストの問題
から実用的でなくなる。その点、本発明による電気メッ
キ処理による方法は内部電極材料と同じ金属材料を含有
する電気メッキ溶液を使用することで除去したい電極が
選択的に且つ同時に除去でき、接続したい内部電極上に
突起電極を設けることができ、しかも、内部電極層(2
)の数、厚みに工程数が依存しないので、工業的な利用
価値が高い。
The internal electrode layer (2) can be removed by mechanical processing, but it is also possible to reduce the size of parts, increase the number of laminated layers,
As 2) becomes thinner, it becomes impractical due to problems in processing accuracy and processing cost. On this point, the electroplating method according to the present invention uses an electroplating solution containing the same metal material as the internal electrode material, so that the electrodes to be removed can be removed selectively and simultaneously, and the protruding electrodes can be placed on the internal electrodes to be connected. Moreover, the internal electrode layer (2
) The number of steps does not depend on the number or thickness of the wafer, so it has high industrial value.

[実 施 例] 以下に実施例を挙げて本発明の積層型セラミック電子部
品の製造方法を更に説明する。
[Example] The method for manufacturing a laminated ceramic electronic component of the present invention will be further explained below with reference to Examples.

え11L まず、コンデンサ用材料として好適である(Pb、Ba
)(Mg、Nb、Zr、Ti)Os系セラミックス粉体
を、サンドミルで粉砕して1ミクロン以下の粒径にする
。この粉末にバインダー、分散剤、活性剤、消泡剤を加
えて真空脱泡したのち、ドクターブレード法を用いグリ
ーンシートを作製した。
E11L First, it is suitable as a material for capacitors (Pb, Ba
) (Mg, Nb, Zr, Ti)Os-based ceramic powder is ground with a sand mill to a particle size of 1 micron or less. After adding a binder, a dispersant, an activator, and an antifoaming agent to this powder and defoaming under vacuum, a green sheet was produced using a doctor blade method.

得られたグリーンシートの厚みは40ミクロンであった
。このシート上に、スクリーン印刷法を用いて内部電極
層(銀−パラジウム)を印刷した。
The thickness of the obtained green sheet was 40 microns. An internal electrode layer (silver-palladium) was printed on this sheet using a screen printing method.

次に、5X14s+mの大きさに切断後、30枚積層し
、加熱圧着し、脱脂し、1100”Cで焼成して積層焼
結体を得た。このとき積層焼結体の内部電極間隔は25
ミクロンであり、内部電極の厚みは5ミクロンであった
。この積層焼結体の西側面を軽く研摩し、内部電極層を
露出させた後、第2図に示すように銀ペーストを焼き付
けて電気メッキ用外部電極を形成した。この積層焼結体
の電気メッキ処理したい内部電極層側を銀電気メッキ溶
液中に浸漬し、電気メッキ処理を行なった。銀電気メッ
キ溶液中に浸漬して電気メッキ処理を行なった。
Next, after cutting to a size of 5 x 14 s + m, 30 sheets were stacked, heat-pressed, degreased, and fired at 1100"C to obtain a laminated sintered body. At this time, the internal electrode spacing of the laminated sintered body was 25
The thickness of the internal electrode was 5 microns. After lightly polishing the west side of this laminated sintered body to expose the internal electrode layer, a silver paste was baked on to form an external electrode for electroplating as shown in FIG. The internal electrode layer side of this laminated sintered body to be electroplated was immersed in a silver electroplating solution to perform electroplating. The electroplating process was performed by immersing it in a silver electroplating solution.

銀電気メッキ溶液には高純度化学製銀メッキ液S−,7
00E Cを使用し、液温2vで2分間の電気メッキ処
理を行なった。この結果、2分間で厚さ5ミクロンの内
部電極層が30ミクロンの深さで除去でき、突起電極の
高さは10ミクロンであった。この側面に絶縁処理を施
した後、反対側についても同様の操作により電気メッキ
処理を施した。
The silver electroplating solution is High Purity Chemical Silver Plating Solution S-, 7.
Electroplating was performed using 00E C for 2 minutes at a liquid temperature of 2V. As a result, the internal electrode layer with a thickness of 5 microns could be removed to a depth of 30 microns in 2 minutes, and the height of the protruding electrodes was 10 microns. After performing insulation treatment on this side surface, electroplating treatment was performed on the opposite side in the same manner.

次に、内部電極層を除去した後の溝部にエポキシ樹脂を
含浸するよう絶縁体層を形成し、軽く研摩し、第6図に
示すように切断後、新たな外部電極を形成し、エポキシ
樹脂で外装して縦2anXii3maX高さ1麟醜の積
層セラミックスコンデンサを得た。
Next, an insulating layer is formed by impregnating the groove with epoxy resin after the internal electrode layer has been removed, and is lightly polished. After cutting as shown in Figure 6, a new external electrode is formed, and the epoxy resin is applied to the groove. A multilayer ceramic capacitor with a length of 2mm x 3mm and a height of 1mm was obtained.

このようにして作製された積層コンデンサの電気特性を
調べたところ、第1表に示す結果が得られた。内部電極
材料中の銀の含有量が50モル%以上のものは絶縁抵抗
が10MΩ以上であり、充分に絶縁されていること、ま
た、コンデンサとしての機能も従来の方法により作製さ
れたコンデンサと何ら変わらないことが分がった。一方
、銀の含有量が50モル%未満のものは絶縁が充分でな
いことが分がっな。
When the electrical characteristics of the multilayer capacitor thus manufactured were investigated, the results shown in Table 1 were obtained. Internal electrode materials with a silver content of 50 mol% or more have an insulation resistance of 10 MΩ or more, are sufficiently insulated, and function as a capacitor no different from capacitors made by conventional methods. I found out that nothing has changed. On the other hand, it has been found that those with a silver content of less than 50 mol % do not have sufficient insulation.

第−」−一1− 80/20  0.25   2   100M以上7
0/30  0.25   2   100M以上60
/40  0.25   2   50M以上5015
0  0.27   3   108以上40/60 
  −一−−短絡 30/70  −−−一   −短緒 まず、圧電アクチュエータ用材料として好適であるP 
b(Z r、T i ) 03に第3成分として複合へ
ロブスカイト化合物を加え、ストロンチウムで変性した
セラミックス粉体を、サンドミルで粉砕して1ミクロン
以下の粒径にする。この粉末にバインダー、分散剤、活
性剤、消泡剤を加えて真空脱泡した後、ドクターブレー
ド法を用いてグリーンシートを作製した。
No. 1-1 80/20 0.25 2 100M or more 7
0/30 0.25 2 100M or more 60
/40 0.25 2 50M or more 5015
0 0.27 3 108 or more 40/60
-1--Short circuit 30/70--1 -Short introduction First, P is suitable as a material for piezoelectric actuators.
A composite helobskite compound is added as a third component to b(Z r, T i ) 03, and the strontium-modified ceramic powder is ground in a sand mill to a particle size of 1 micron or less. After adding a binder, a dispersant, an activator, and an antifoaming agent to this powder and defoaming it under vacuum, a green sheet was produced using a doctor blade method.

得られたグリーンシートの厚みは55ミクロンであった
。このシート上にスクリーン印刷法を用いて内部電8i
iNi(銀−パラジウム、Ag/Pd−70/30)を
印刷した0次に、7X14mmの大きさに切断後、70
枚績層し、加熱圧着し、脱脂し、1140℃で焼成して
積層焼結体を得た。このとき積N焼結体の内部電極間隔
は35ミクロンであり、内部電極の厚みは5ミクロンで
あった。
The thickness of the obtained green sheet was 55 microns. On this sheet, an internal battery 8i was printed using a screen printing method.
After printing iNi (silver-palladium, Ag/Pd-70/30) and cutting it into a size of 7 x 14 mm, 70
The sheets were laminated, heat-pressed, degreased, and fired at 1140°C to obtain a laminated sintered body. At this time, the interval between the internal electrodes of the N-sized sintered body was 35 microns, and the thickness of the internal electrodes was 5 microns.

この焼結体の四側面を軽く研摩して内部電極層を露出さ
せた後、第2図に示すように銀ペーストを焼き付けて電
気メッキ用外部電極を形成した。このm層焼結体を電気
メッキ装置に入れ、5分間の電気メッキ処理を行なった
。この結果、5分間で厚さ5ミクロンの内部を極層が2
5ミクロンの深さで除去でき、突起電極が10ミクロン
の高さに析出した0次に、反対側についても同様の操作
により内部電極層を除去し、突起電極を形成した。
After lightly polishing the four sides of this sintered body to expose the internal electrode layer, a silver paste was baked on to form external electrodes for electroplating as shown in FIG. This m-layer sintered body was placed in an electroplating device and electroplated for 5 minutes. As a result, in 5 minutes, the polar layer covered the inside of 5 microns by 2 times.
The inner electrode layer could be removed to a depth of 5 microns, and a protruding electrode was deposited at a height of 10 microns.The internal electrode layer was removed by the same operation on the opposite side to form a protruding electrode.

次に、内部電極層を除去した後の溝部にエポキシ樹脂を
含浸し、硬化させた絶縁体層を形成し、軽く研摩し、第
6図に示すように切断後、新たな外部電極を形成し、エ
ポキシ樹脂で外装して縦3−―×横3mmX高さ51の
積層型圧電アクチュエータ素子を得た。
Next, the groove after removing the internal electrode layer is impregnated with epoxy resin to form a hardened insulator layer, lightly polished, and cut as shown in Figure 6 to form a new external electrode. A laminated piezoelectric actuator element measuring 3 mm in length, 3 mm in width, and 51 mm in height was obtained by covering with epoxy resin.

このようにして作製された圧電アクチュエータ素子の絶
縁抵抗を調べたところ100MΩ以上あり、充分に絶縁
されていること、また、変位を測定したところ24Vで
2ミクロン変位し、充分変位することが分かった。
When we examined the insulation resistance of the piezoelectric actuator element produced in this way, it was found to be over 100MΩ, indicating that it was sufficiently insulated.Also, when we measured the displacement, it was found that it was displaced by 2 microns at 24V, which was sufficient displacement. .

[発明の効果] 以上説明したように、本発明により70ミクロン以下の
内部電極間隔をもつ積層焼結体においても、内部電極層
を外部電極層と1層おきに接続することができ、内部電
極間隔70ミクロン以下の積層体において有効内部電極
の面積が非常に大きく、電気的に不活性なマージン部分
がほとんど存在しない超小型、高密度の積層型セラミッ
クス電子部品が製造できる。
[Effects of the Invention] As explained above, according to the present invention, even in a laminated sintered body having an internal electrode interval of 70 microns or less, every other internal electrode layer can be connected to an external electrode layer, and the internal electrode In a laminate with a spacing of 70 microns or less, the area of effective internal electrodes is extremely large, and an ultra-small, high-density laminate ceramic electronic component can be manufactured with almost no electrically inactive margin portions.

また、内部電極材料としては電気メッキ可能な銅、ニッ
ケルの金属を使用してmM焼結体を作製し、それぞれ銅
、ニッケルの・電気メッキ溶液を使用すれば本発明が実
施できることは明らかである。
Furthermore, it is clear that the present invention can be carried out by fabricating an mM sintered body using electroplatable copper and nickel metals as internal electrode materials, and using copper and nickel electroplating solutions, respectively. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はセラミックスグリーンシートを積層し、真空加
熱圧着を行なって作製した積層体を示す図であり、第2
図は電気メッキ用外部電極を形成した後の積層焼結体を
示す図であり、第3図は電気メッキ装置を示す図であり
、第4図は電気メッキ処理を行なうときのfi!焼結体
を示す図であり、第5図は電気メッキ処理を行なった後
の積層焼結体の断面を示す図であり、第6図は電気メッ
キ処理を行なった後の積層焼結体及び切断箇所を示す図
であり、第7図は新たな外部電極を形成した後の積層焼
結体を示す図であり、第8図は従来の積層型セラミック
ス電子部品を示す図である。 図中、1・・・セラミックス層、2・・内部電極層、3
・・・電気メッキ用外部電極、4・・・積層焼結体、5
・・・電気メッキ用電源、6・・・電流計、7・・・電
気メッキ溶液、8・・・電気メッキ槽、9・・・空気撹
拌機、10・有機塗料等による絶縁被覆、11・・・溝
部、12・・・突起電極、13・・・絶縁体、14・・
・外部電極、21・・・セラミックス層、22・・・内
部電極層、23・・・外部電極、24・・・マージン部
分、A・・・切断ライン。 第2図 第6図
Fig. 1 is a diagram showing a laminate produced by laminating ceramic green sheets and performing vacuum heat compression bonding;
The figure shows the laminated sintered body after forming external electrodes for electroplating, FIG. 3 shows the electroplating apparatus, and FIG. 4 shows the fi! FIG. 5 is a diagram showing a cross section of the laminated sintered body after electroplating, and FIG. 6 is a cross-sectional view of the laminated sintered body after electroplating. FIG. 7 is a diagram showing a laminated sintered body after forming a new external electrode, and FIG. 8 is a diagram showing a conventional laminated ceramic electronic component. In the figure, 1... Ceramic layer, 2... Internal electrode layer, 3
...External electrode for electroplating, 4...Laminated sintered body, 5
... Power source for electroplating, 6. Ammeter, 7. Electroplating solution, 8. Electroplating tank, 9. Air agitator, 10. Insulating coating with organic paint, etc., 11. ...Groove, 12...Protruding electrode, 13...Insulator, 14...
- External electrode, 21... Ceramic layer, 22... Internal electrode layer, 23... External electrode, 24... Margin portion, A... Cutting line. Figure 2 Figure 6

Claims (5)

【特許請求の範囲】[Claims] 1. 内部電極層を1層おきに外部電極と接続してなる
積層型セラミックス電子部品の製造方法において、内部
電極層を印刷したセラミックスグリーンシートを、内部
電極層が1層おきに相対する側面に露出するように所定
枚数積層し、焼結して積層焼結体を得、得られた積層焼
結体の相対する側面に1層おきに露出している各内部電
極層を電気メッキ用外部電極により接続し、まず、一方
の該電気メッキ用外部電極を陽極とし、他方の電気メッ
キ用外部電極を陰極として電気メッキ用外部電極が不在
の積層焼結体の一方の開面に電気メッキを施すことによ
り陰極と接続されている内部電極に電気メッキを施し且
つ陽極と接続されている内部電極を除去して溝部を得、
次に、該電気メッキ用外部電極の陽極と陰極を交換して
電気メッキ用外部電極が不在の積層焼結体の他方の側面
に電極メッキを施すことにより陰極と接続されている内
部電極に電気メッキを施し、且つ陽極と接続されている
内部電極を除去して溝部を得、次に、得られた溝部に絶
縁体層を形成し、絶縁体層を有する側面に対して垂直方
向に積層焼結体を所定の寸法に切断し、絶縁体層を有す
る相対する側面の内部電極を1層おきに外部電極と接続
することを特徴とする積層型セラミックス電子部品の製
造方法。
1. In a method for manufacturing a laminated ceramic electronic component in which every other internal electrode layer is connected to an external electrode, a ceramic green sheet on which internal electrode layers are printed is exposed on a side surface where every other internal electrode layer faces each other. A predetermined number of sheets are laminated and sintered to obtain a laminated sintered body, and each internal electrode layer exposed every other layer on the opposing sides of the obtained laminated sintered body is connected by an external electrode for electroplating. First, one of the external electrodes for electroplating is used as an anode and the other external electrode for electroplating is used as a cathode, and by applying electroplating to one open surface of the laminated sintered body where no external electrode for electroplating is present. electroplating the internal electrode connected to the cathode and removing the internal electrode connected to the anode to obtain a groove,
Next, the anode and cathode of the external electrode for electroplating are replaced and electrode plating is applied to the other side of the laminated sintered body where the external electrode for electroplating is absent, so that the internal electrode connected to the cathode is electrically plated. A groove is obtained by plating and removing the internal electrode connected to the anode. Next, an insulator layer is formed in the obtained groove, and the layer is laminated and fired in a direction perpendicular to the side surface having the insulator layer. 1. A method for producing a multilayer ceramic electronic component, which comprises cutting a compact into predetermined dimensions, and connecting internal electrodes on opposite sides having insulating layers to external electrodes every other layer.
2. 内部電極の材料として電気メッキ可能な金属材料
を使用し、電気メッキ溶液として内部電極材料と同じ金
属材料を含む電気メッキ溶液を用いる請求項1記載の方
法。
2. 2. The method according to claim 1, wherein an electroplatable metal material is used as the material of the internal electrode, and an electroplating solution containing the same metal material as the internal electrode material is used as the electroplating solution.
3. 内部電極の材料として銀の含有量が50モル%以
上の銀−パラジウムを使用し、電気メッキ溶液として銀
電気メッキ溶液を使用する請求項2記載の方法。
3. 3. The method according to claim 2, wherein silver-palladium having a silver content of 50 mol % or more is used as the material for the internal electrodes, and a silver electroplating solution is used as the electroplating solution.
4. 内部電極の材料としてニッケル及び銅を使用し、
電気メッキ溶液としてそれぞれニッケル電気メッキ溶液
及び銅電気メッキ溶液を使用する請求項2記載の方法。
4. Using nickel and copper as internal electrode materials,
3. A method as claimed in claim 2, characterized in that the electroplating solutions are a nickel electroplating solution and a copper electroplating solution, respectively.
5. 積層型セラミックス電子部品が積層型セラミック
スコンデンサ、積層型圧電アクチュエータ素子または積
層型バリスタである請求項1ないし4のいずれか1項記
載の方法。
5. 5. The method according to claim 1, wherein the multilayer ceramic electronic component is a multilayer ceramic capacitor, a multilayer piezoelectric actuator element, or a multilayer varistor.
JP4331889A 1989-02-27 1989-02-27 Manufacture of laminated ceramic electronic part Pending JPH02224311A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4331889A JPH02224311A (en) 1989-02-27 1989-02-27 Manufacture of laminated ceramic electronic part

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4331889A JPH02224311A (en) 1989-02-27 1989-02-27 Manufacture of laminated ceramic electronic part

Publications (1)

Publication Number Publication Date
JPH02224311A true JPH02224311A (en) 1990-09-06

Family

ID=12660460

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4331889A Pending JPH02224311A (en) 1989-02-27 1989-02-27 Manufacture of laminated ceramic electronic part

Country Status (1)

Country Link
JP (1) JPH02224311A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4410504A1 (en) * 1993-03-26 1994-09-29 Murata Manufacturing Co Method for the production of a multilayer (laminated) ceramic electronic component (subassembly)
US5597494A (en) * 1993-03-26 1997-01-28 Murata Manufacturing Co., Ltd. Method of manufacturing multilayer ceramic electronic component
JP2005039200A (en) * 2003-06-27 2005-02-10 Kyocera Corp Capacitor and its mounting structure
JP2016178315A (en) * 2012-02-20 2016-10-06 エプコス アクチエンゲゼルシャフトEpcos Ag Multilayer device and method for producing multilayer device
CN109994597A (en) * 2017-12-29 2019-07-09 苏州攀特电陶科技股份有限公司 Multilayer piezoelectric ceramic actuator and preparation method thereof

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4410504A1 (en) * 1993-03-26 1994-09-29 Murata Manufacturing Co Method for the production of a multilayer (laminated) ceramic electronic component (subassembly)
US5597494A (en) * 1993-03-26 1997-01-28 Murata Manufacturing Co., Ltd. Method of manufacturing multilayer ceramic electronic component
DE4410504B4 (en) * 1993-03-26 2005-03-24 Murata Mfg. Co., Ltd., Nagaokakyo Method for producing a multilayer ceramic electronic component
JP2005039200A (en) * 2003-06-27 2005-02-10 Kyocera Corp Capacitor and its mounting structure
JP2016178315A (en) * 2012-02-20 2016-10-06 エプコス アクチエンゲゼルシャフトEpcos Ag Multilayer device and method for producing multilayer device
CN109994597A (en) * 2017-12-29 2019-07-09 苏州攀特电陶科技股份有限公司 Multilayer piezoelectric ceramic actuator and preparation method thereof

Similar Documents

Publication Publication Date Title
US5380341A (en) Solid state electrochemical capacitors and their preparation
US9275804B2 (en) Ceramic electronic component and method for producing the same
EP2313900B1 (en) Substrate with embedded patterned capacitance
JP2020188144A (en) Electronic component packaging structure and manufacturing method therefor
EP0395018A2 (en) Stack-type piezoelectric element and process for production thereof
CN116884769A (en) Electronic component and method for manufacturing electronic component
JP2022040762A (en) Multilayer ceramic electronic component and manufacturing method thereof
KR970009771B1 (en) Multilayer Capacitor and Manufacturing Method Thereof
JP2016031991A (en) Ceramic electronic part and method for manufacturing the same
EP0167392A2 (en) Method of producing electrostrictive effect element
CN102568818A (en) Inner electrode of glass-ceramic stacked capacitor and preparation method of the inner electrode
DE19542365A1 (en) Process for producing a multilayer ceramic electronic component
CN219269209U (en) electronic components
US20100254067A1 (en) Method of making electronic ceramic components with mesh electrode
JP2011134832A (en) Stacked ceramic capacitor and method of manufacturing the same
JP3544569B2 (en) Multilayer ceramic capacitors
JPH10290031A (en) Multilayer piezoelectric actuator and method of manufacturing the same
JPH0256826B2 (en)
JP3934983B2 (en) Multilayer electronic component and manufacturing method thereof
CN115938801B (en) Ceramic electronic components
JP2024096116A (en) Multilayer Capacitor
JP2000306763A (en) Multilayer ceramic capacitor and manufacturing method thereof
JP2003109839A (en) Manufacturing method of laminated electronic part
JP2002110451A (en) Laminated electronic component and method of manufacturing the same
JP2018014407A (en) Manufacturing method of multilayer ceramic electronic component