JPH02224486A - Still picture reproducing device: - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a still image reproducing device, and more specifically to a still image reproducing device using a magnetic disk as an image recording medium.

[Prior Art] Conventionally, still image playback devices that use magnetic disks as image recording media sample playback image signals for special playback such as multi-screen display, and to protect the medium during long playback. The data is digitized and temporarily stored in a frame memory, and thereafter, the data stored in the frame memory is used to perform special playback displays or long-time playback displays. For example, in the case of the NTSC system, the sampling frequency of the reproduced image signal is often a frequency 4f, c, which is four times the color recovery carrier frequencies f, c. There is a relationship between the chromatic carrier frequency f, c and the horizontal synchronization frequency f: f*c=455/2 ・fH =3,579.545Hz, and therefore, 4fsc=91Of+4=14,318, It is 180Hz.

By the way, since the reproduced image signal includes a time axis fluctuation component, that is, a jitter component, caused by rotational fluctuations of the magnetic disk during recording and reproduction, the reproduced image signal is sampled at a frequency of 4 fsc to create a frame. If the image data stored in the frame memory is stored in a memory and read out at the same frequency of 4 f sc, the jitter component will be fixed, which will cause deterioration in the quality of the reproduced image.

In order to avoid such problems, conventional playback devices have adopted a configuration as shown in FIG. 2.

10 is a magnetic disk as an image recording medium, 12 is a playback head, 14 is a preamplifier, 16 is an FM demodulation circuit, 18
20 is a de-emphasis circuit, 20 is a synchronization separation circuit, 22 is a phase synchronization circuit that forms a signal phase-synchronized with the reproduced horizontal synchronization signal separated by the synchronization separation circuit 20, and 24 is a de-emphasis circuit using the output signal of the phase synchronization circuit 22. 18 is an A/D converter that digitizes the output, 26 is a frame memory, 28 is a digital image processing circuit, and 30 is a D/D converter.
A converter, 32 is a video encoder, and 34 is a video output terminal. 35 is a system control circuit that centrally controls the entire system.

The phase synchronization circuit 22 is composed of a known PLL circuit, 36 is a 14 MHz voltage controlled oscillator, 38 is a 1/910 frequency dividing circuit, and 40 is an output signal of the frequency dividing circuit 38 and a synchronization separation circuit 2.
This is a phase comparison circuit that compares the phase of the reproduction synchronization signal of the output of 0.

The operation of the conventional example shown in FIG. 2 will be briefly explained. A recording signal on the magnetic disk 10 is converted into an electric signal by a reproducing head 12, amplified by a preamplifier 14, and demodulated by an FM demodulation circuit 16. The de-emphasis circuit 18 performs de-emphasis processing corresponding to the emphasis processing during recording, and outputs a reproduced image signal. The synchronization separation circuit 20 separates a composite synchronization signal, a vertical synchronization signal, and a horizontal synchronization signal from the reproduced image signal. The system control circuit 35 uses these synchronization signals to control the frequency f sc,'! f Forms a reference signal for MC.

The reproduced horizontal synchronization signal separated by the synchronization separation circuit 20 is also applied to the phase comparison circuit 40 of the phase synchronization circuit 22. The phase comparator circuit 40 compares the phases of the signal obtained by dividing the output of the voltage controlled oscillator 36 to 1/910 by the frequency dividing circuit 38 and the reproduced horizontal synchronization signal, and controls the voltage controlled oscillator 36 so that these signals are phase-synchronized. do. As a result, the voltage controlled oscillator 3
The output f3 of No. 6 becomes a signal phase-synchronized with the reproduced horizontal synchronization signal.

The A/D converter 24 has a phase synchronization circuit 22 (specifically,
At the timing of the output f8 of the voltage controlled oscillator 36), the reproduced image signal output from the de-emphasis circuit 18 is digitized, and the output data is written into the frame memory 26. The image data written in the frame memory 26 is subjected to predetermined image processing by the image processing circuit 28, and then read out by a timing signal with a frequency of 4f from the system control circuit 35. The signal is converted into an analog signal by a video encoder 32, and is applied to a video device (not shown) from a video output terminal 34.

With the above configuration, it is possible to absorb jitter components generated during recording and reproduction.

[Problems to be Solved by the Invention] However, in the conventional example described above, during field playback of a still image, the horizontal synchronization signal is divided into half of the horizontal period (
Hereinafter, it will be written as 0.5H. ), the phase synchronization in the phase synchronization circuit 22 will be significantly shifted for each vertical period. This causes a problem in that the image becomes distorted at the top of the screen at the beginning of the vertical period.

Therefore, it is an object of the present invention to provide a still image reproducing device that solves such problems.

[Means for Solving the Problems] A still image reproducing device according to the present invention is a still image reproducing device that reproduces recorded images on a rotary image recording medium, and includes a synchronization system that separates a horizontal synchronization signal from a reproduced image signal. a separating means, a sampling signal forming means for forming a sampling signal of a reproduced image signal, a frequency dividing means for dividing the frequency of the sampling signal to approximately twice the horizontal synchronization frequency, an output of the frequency dividing means, and the synchronization separation means. The present invention is characterized by comprising a phase comparing means for comparing the phases of the horizontal synchronizing signal separated by the means and controlling the sampling signal forming means so that these signals are phase-synchronized.

[Function] With the above means, the sampling signal is always phase-synchronized with the reproduction horizontal synchronization signal during field reproduction. Therefore, the image disturbance that occurs in the conventional example is completely eliminated.

[Example] Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 shows a block diagram of an embodiment of the present invention. The same components as in FIG. 2 are given the same reference numerals. 50 is a phase-locked circuit replacing the phase-locked circuit 22;
is a frequency dividing circuit with a frequency division ratio of 1/455. The phase comparator circuit 40 and voltage controlled oscillator 36 are the same as in the conventional example.

The process from forming the reproduced image signal (output of the de-emphasis circuit 18) from the recording signal of the magnetic disk 10 to separating the synchronization signal by the synchronization separation circuit 20 is the same as in the conventional example.

In the phase locked circuit 50, a frequency dividing circuit 52 divides the output of the voltage controlled oscillator 36 by 1/455. The output frequency of the frequency dividing circuit 52 is approximately twice that of the horizontal synchronizing signal. Phase comparison circuit 4
0 compares the phases of the reproduced horizontal synchronizing signal and the output of the frequency dividing circuit 52, and controls the voltage controlled oscillator 36 so that they are phase-synchronized.

As a result, the output f of the voltage controlled oscillator 36 is always phase-synchronized with the reproduced horizontal synchronizing signal even during field reproduction.

The A/D converter 24 digitizes the reproduced image signal at the timing of the output f of the phase synchronization circuit 50, and the output data is written into the frame memory 26. Thereafter, the process proceeds in the same manner as in the conventional example, and a video signal can be obtained from the output terminal 34.

With this video signal, there is no image disturbance at the top of the screen as in the conventional example.

To summarize the above, the phase of the signal obtained by dividing the sampling signal of the reproduced image signal to a frequency approximately twice the horizontal synchronizing frequency and the reproduced horizontal synchronizing signal is compared, and the voltage controlled oscillator 36 By controlling this, it is possible to obtain a sampling signal that is always phase-synchronized with the reproduced horizontal synchronizing signal even during field reproduction.

In the above embodiment, the sampling frequency of A/D conversion is 910fH#4f, c=14.3MHz, but in this case, the highest frequency of the signal is about 7MHz. If the required signal band is lower than 7MHz,
It is clear that the sampling frequency is not 910f, but may be a lower frequency, for example 600f. In this case, the highest frequency of the signal will be approximately 4.7 MHz, but the memory capacity of frame memory 26 can be reduced accordingly. Conversely, if a wide signal band is desired, a higher sampling frequency may be used.

[Effects of the Invention] As can be easily understood from the above explanation, according to the present invention, it is possible to obtain a sampling signal that is always phase-synchronized with the reproduction horizontal synchronization signal even during field reproduction, and image disturbances at the top of the reproduction screen can be prevented. The problem will be completely resolved.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of the configuration of an embodiment of the present invention, and FIG. 2 is a block diagram of the configuration of a conventional example. 10: Magnetic disk 12: Playback head 16: FM demodulation circuit 18: 20: Synchronization separation circuit 22.50:
Phase synchronized circuit 24? A/D converter 26: Frame memory 28: Digital image processing circuit 30:
D/A converter 32: Video encoder 34: Video output terminal 35 System control circuit 36: IT voltage control oscillator 38, 52: Frequency divider circuit 40: Phase comparison circuit

Claims (1)

[Claims] A still image reproducing device for reproducing images recorded on a rotary image recording medium, comprising: a synchronization separating means for separating a horizontal synchronizing signal from a reproduced image signal; a sampling signal forming means for forming a sampling signal of the reproduced image signal; A frequency dividing means for dividing the frequency of the sampling signal to approximately twice the horizontal synchronization frequency, and a phase comparison between the output of the frequency dividing means and the horizontal synchronization signal separated by the synchronization separation means, and these are phase synchronized. 1. A still image reproducing device comprising: phase comparison means for controlling said sampling signal forming means.