JPH02224585A - Screen display device - Google Patents

Abstract

PURPOSE:To attain ease of observation of a displayed character by providing a framing register and also A framing size variable means varying the framing size of a display pattern according to a value stored in the framing size. CONSTITUTION:A display control register 6 is provided with a framing register 61 storing a prescribed value designating the size of frame formed by a blinking circuit 21 and a framing size variable means 131 is provided to a display control circuit 13. When a value to be stored in the register 61 and an address representing the address of the register 61 from the externally mounted control circuit such as a microcomputer are inputted to an input control circuit 3 sequentially in terms of serial signals, a prescribed value designating the framing size is stored in the register 61. Thus, the means 131 is operated and the size of the frame of the pattern displayed corresponding to the designated value is varied. That is, the size of the frame of the displayed character is varied freely and the displayed character is easily observed.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a screen display device that displays characters and patterns such as channel numbers in broadcast images displayed on a display device such as a cathode ray tube. .

[Prior Art] FIG. 4 shows an example of the configuration of a conventional screen display device of this type. In FIG. 4, 1 is a display oscillation circuit to which the oscillation output of the π-type LC oscillation circuit 1a is supplied; 2 3 is a timing generator that generates various timings using the signal oscillated by the display oscillation circuit 1, and 3 is an external control circuit such as a microcomputer (not shown) for controlling the output of the second timing generator 2 and this screen display device. Each input terminal 3a to 3c
4 is a data control circuit, and 5 is an address control circuit.

7 is a display data memory for storing control data;
Consists of M. 8 is a display character memory for storing characters and patterns to be displayed in the font configuration shown in FIG.
Consists of OM. 6 is a display control register that latches commands such as display control among the outputs of the input control circuit 3; 9 is a horizontal and vertical synchronizing signal of the image signal supplied to terminals 9a and 9b, or internally generated horizontal and vertical synchronizing signals; 11 is a display position detection circuit for detecting the display position of characters, patterns, etc. on the display device; 13 is a display control circuit; The screen display device which controls the display of the output of the display character memory 8 in accordance with the display command of the display control register 6 is composed of the above-mentioned circuits, and the output of the display control circuit 13 is connected to the video mixer. 17, and a composite video signal is output from this video mixer 17 via a CVIDEO terminal 17a. Also,
The display control circuit 13 outputs R, G, H color signals and the like through terminals 13a to 13f. 10 is an H counter, 14 is a shift register, and 15 is an oscillation element circuit 15
an oscillation circuit for generating a synchronizing signal to which the oscillation output of a is supplied, 1
Reference numeral 6 is a timing generator for generating a synchronization signal, and reference numeral 21 is a blinking circuit that performs processing such as enclosing the outer periphery of a pattern such as a character 9 figure with a pattern of a specific color.

Next, the operation will be explained. The input control circuit 3 processes control data input from a microcomputer or the like through terminals 38 to 3c, latches commands such as display control to a display control register 6, and displays character codes, etc., which are display contents. It is stored in the data memory 7. During display, the character code stored in the display data memory 7 accesses the display character memory 8 as output data, and the display character font output from the display character memory 8 is input to the display control circuit 13. Here, the display data memory 7 is composed of a total of (a+b)·C bits, where one word is (a+b) bits and the number of characters to be displayed is C. On the other hand, it is assumed that one display character memory 8 has one font composed of (jXm) bits, and there are n characters of the types. Also, the timing when 1 display is determined is that the synchronization signal from the image signal is transferred to the synchronization signal switching circuit 9.
This synchronizing signal is counted by the H counter 10, and based on this count value, the display position detection circuit 11 determines the position of the displayed character on the display device. The display control circuit 13 synchronizes the display character output with an external video signal, controls the display according to the contents of the display control register 6, outputs it, and supplies it to the video mixer 17.

Note that the synchronizing signal generation oscillation circuit 15 is the oscillation element circuit 1
5a, it is possible to generate a synchronization signal of the NTSC system or PAL system, and this switching is performed by a signal from the N/P terminal 15b, thereby outputting oscillation of 4 fsc or 2 fsc, and the timing generator 16 for generating the synchronization signal.
Since a synchronizing signal is generated at , it is possible to display on the TV screen even when there is no signal. However, fsc is a color subcarrier, which is 3.58 MHz in the NTSC system and 4.43 M) (z in the PAL system).

In addition, the video mixer 17 allows NTSC and P
It is possible to generate an AL type composite video signal and to superimpose it onto an external composite video signal. The composite video signal has character level (LECHA), external composite video input (CV I N), and blanking level (LEBK).
), background carrier color signal input (R8IN), color burst input (CBIN), and sync chip level are switched and synthesized by an analog switch and output from the CVIDEO terminal 17a.

[Problems to be Solved by the Invention] However, in conventional screen display devices, the size of the border of displayed characters is always constant, and the displayed characters may be difficult to see due to the balance between the background color and the color of the displayed characters. There was a problem.

This invention was made to solve the above-mentioned problems, and its purpose is to make displayed characters easier to see.

[Means for Solving the Problems] An image display device according to the present invention includes a border reregister for storing a predetermined value specifying the size of a border formed by a blinking circuit, and a border register that stores a predetermined value that specifies the size of a border formed by a blinking circuit. The present invention is characterized in that it is provided with a border size variable means that changes the size of the border according to the value.

[Operation] When a predetermined value is held in the border register, the border size variable means changes the thickness of the displayed border based on the value stored in the border register.

[Embodiment] An embodiment of the present invention will be described below with reference to FIGS. 1 to 3. Note that the same components as those in the prior art are given the same numbers and their explanations are omitted. FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, 61 is a border register in the display control register 6 that stores a predetermined value, and 131 is a border register that displays information according to the value in the border register register 1. This is a border size variable means provided in the display control circuit 13 for changing the size of the border of a character to be bordered, that is, the number of display dots surrounding the outer periphery of a pattern to be bordered. Further, 18 is a video signal generation circuit that generates each internal video signal, and 19 is a port output terminal 19a.
~19 This is a port output control circuit that outputs R, G, and B color signals or port output signals from f.

Next, the operation will be explained. When the address indicating the address of border register row 1 and the value to be stored in border register row 1 are sequentially input to the input control circuit 3 as serial signals from an external control circuit such as a microcomputer, the border register row 1
A predetermined value specifying the border size is stored within.

When a predetermined value is stored in the border register 1, the border resizing variable means 131 in the display control circuit 13 operates to change the size of the border of the displayed pattern in accordance with the specified value. let

FIG. 2 is a detailed configuration diagram of this border size variable means. In the figure, 131A is an inverter, 131B is an A
The ND circuit and 131C are an OR circuit.

In a configuration like 2, when a pulse signal with a predetermined width is output from the blinking circuit 18 to the signal line 132, the '1' or 1 stored in the edge and register register 1
The select function operates according to the digit of 0' and the OR circuit 1
From 31C to wide BLNK signal or small width BL
The NK signal is selectively output.

Figure 3 is a diagram showing the relationship between the size of the border of the pattern such as characters displayed at this time and the pulse width of the BLNK signal.As shown in the figure, the size of the border changes depending on the width of the BLNK signal. It has become.

Therefore, if the pulse width of the BLNK signal is changed according to the border size variable means 131 as shown in FIG. 2, the border size of the displayed character will change based on the position stored in the border register row 1. .

[Effects of the Invention] As explained above, according to the present invention, a border reregister is provided and a border resizing means is provided which changes the border size of the display pattern according to the value stored in the border register, so that only one display is possible. The size of the border of the characters can be freely changed, which has the effect of making the displayed characters easier to see.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is a detailed block diagram of a specific example of the border size variable means in Fig. 1, and Fig. 3 shows the border size and BLN of displayed characters.
FIG. 4 is a diagram showing the relationship between K signals, FIG. 4 is a diagram showing the configuration of a conventional screen display device, and FIG. 5 is a diagram showing the configuration of fonts in a conventional display character memory. DESCRIPTION OF SYMBOLS 1... Display oscillation circuit, 2... Timing generator, 3... Input control circuit, 4... Data control circuit, 5... Address control circuit, 6... Display control register, 7... ... Display data memory, 8... Display character memory, 9... Synchronization signal switching circuit, 11... Display position detection circuit, 13... Display control circuit, 17...
Video mixer 21... blinking circuit, 61...
...Edge re-register, 131...Edge size variable means, 131A...Inverter, 131B...A
ND circuit, 131C...OR circuit. In the drawings, the same reference numerals indicate the same or corresponding components. Agent Masuo Oiwa (and 2 others) Figure 3 Procedures Amendment t (Voluntary) 1990 2 J? 7

Claims (1)

[Scope of Claims] A screen display device that displays characters or patterns on a display device such as a cathode ray tube includes an oscillation circuit that generates signals that serve as reference for various timings, and various timings based on the oscillation signals of the oscillation circuit. A timing generator that generates a signal, an input control circuit that accepts and processes a control signal from an external control circuit such as a microcomputer, a synchronization signal switching circuit that inputs a synchronization signal for a video signal to be displayed on the display device, and A display position detection circuit that counts synchronization signals to detect the display position of the display device, and control data such as characters, pattern codes, blinking information, etc. that are processed by the input control circuit and are to be displayed on the display device. a display data memory for storing; a display character memory for storing fonts of characters displayed as the display contents;
A video mixer that mixes a predetermined display signal with the video signal in order to display display contents at a predetermined position of the display device using a position detection signal from the display position detection circuit; It is equipped with a display control register that holds input data, a blinking circuit that outputs blinking information that surrounds the outer periphery of the display pattern with a pattern of a specific color, and a predetermined value that specifies the size of the border. What is claimed is: 1. A screen display device comprising: a border register for storing a border; and border size variable means for changing the size of a displayed border based on the value stored in the border register.