JPH02226535A - Timing signal generation circuit for magneto-optical disk - Google Patents

Abstract

PURPOSE:To perform the signal coupling of a sum signal and a differential signal by obtaining the optimum switching timing by enabling a timing by a clock from a crystal oscillator to be compared by synchronizing with an actual operating timing of a disk in the prediction of the timing by the clock. CONSTITUTION:The start point of a switching signal DATAENA is predicted by a start point decoder which analyzes the output of a counter 2 to count the clock from the crystal oscillator 1 at the front edge of a data part. A window generator 9 generates a window by a signal (b), and secures a margin not shifting to the next sector. Also, the end point of the signal DATAENA is predicted by a sector timing counter 11 operated by the clock locked at a PLL, and following action (A-C) can be performed based on the before and behind relation of the timing of the signal (a) and the window (b). In the case of (A), latch output (c) is outputted setting the signal DATAENA as a trailing edge. In the case of (B), the trailing edge of the signal DATAENA is outputted at the trailing edge of the signal (b). In the case of (C), the trailing edge of the signal DATAENA is outputted at the trailing edge of the signal (b).

Description

DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a timing signal generation circuit for a continuous format of a magneto-optical disk in an optical disk tester.

The sector format of a magneto-optical disk formatted according to the continuous format of the ISO standard is the third format.
It is as shown in the figure.

The preformat section of a magneto-optical disk irradiates light onto pits (holes) on the disk and reads signals based on the amount of scattered light.

On the other hand, in the data section, a signal is written by magnetizing the magnetized film of the disk, and the opening angle of the reflected light changes due to the magnetization (the rotation angle of the open plane that changes due to the magnetic Kerr effect: this opening rotation angle corresponds to the amount of light).

Normally, the reflected light from the disk is received by two photodiodes in the optical head section through a 1/2 wavelength plate and a beam splitter. As shown in Fig. 4, each amplifier IV is
The sum signal obtained by adding the outputs of the two photodiodes derived in the adding circuit RADD, and the sum signal obtained by adding the outputs of the two photodiodes derived in the above-mentioned amplifier IV in order to reduce in-phase component noise caused by fluctuations in light amount.
A difference signal obtained by calculating the difference between the outputs of the two photodiodes by a subtraction circuit SUB is obtained.

The preformat section is determined using a sum signal, and the data section is determined using a difference signal.

When the readout signal is extracted through one RF (high frequency) line, the sum signal of the preformat section and the difference signal of the data section are alternately switched using the switch SW and the preamplifier is used, as shown in Fig. 4. It is necessary to lead to A. Here, as shown in FIG. 5, the switching signal D A to be used is
i' A E N A was conventionally predicted from a sector timing counter using RDCLK generated from sector data, but if the counter count value becomes incorrect due to a scratch on the disk, the next switching signal will also become incorrect. The correct playback signal cannot be read out. As a result, the counter could not be preset, resulting in a permanent lock state. This hinders accurate measurements as an optical disk tester, and improvements have been desired.

<Prior Art> FIG. 6 is a block diagram of main parts showing an example of a conventional timing gate generation circuit for a magneto-optical disk. The sector timing counter 2 uses PLL (Pase Lock) from data.
It operates with a clock created by ed Loop),
It constantly monitors the current byte of the sector. The control circuit 1 includes various synchronization signals in the sector,
That is, SM (sector mark detection signal), AM (address mark detection signal), CRCOK (signal output when the ID section is read and the calculation is correct), 5YNC.
(data synchronization pattern detection signal) and R8YNC (data resynchronization pattern detection signal), generates a counter load signal in synchronization with the generation of these pulses, and automatically gives an initial value to counter 2 to normalize it. It is supposed to be done.

The value of counter 2 is commonly input to decoders 3 and 4. The decoder 3 analyzes the value, detects the start point of the preformat section, and outputs No. 01081, and the decoder 4 analyzes the input value, detects the end point of the preformat section, and outputs the HIGH signal. do. The flip-flop 5 operates on the RDCLK, and receives a switching signal D that is set by the output of the decoder 3 (HIGH signal) and reset by the output of the decoder 4 (HIGH signal).
Outputs A 'I' A E N A.

Note that since the counter 2 repeatedly monitors the timing of one sector by itself, it automatically predicts the timing of the next sector if the above-mentioned loading is not performed.

<Problem to be solved by the invention> However, since the counter operates with a clock created by a PLL from data, the PLL may be damaged due to scratches etc.
If l, deviates, the subsequent clock frequency is not guaranteed. Therefore, in that case, reloading using a set pulse is required.

In addition, as shown in Figure 7, when R8YNC, etc. are detected more than necessary due to a data write failure and a counter load occurs, the predicted timing is ahead of the actual disk timing and the next sector is preformatted. The pattern in the area may no longer be a sum signal, making it impossible to detect SM and AM. In such a situation,
The timing remains deviated and the counter progresses without getting a chance to be set, resulting in a deadlock state in which synchronization is permanently impossible.

A counter using a data synchronized clock using a PLL as described above is necessary for the timing gate signal of a song that must be controlled in synchronization with the actual data, but D A 'I' A E N A is also used for this purpose. This is one of the reasons for the problem.

As a method to deal with this, we have our own counter based on a reference clock created using a crystal resonator, and
A method of creating an A 'I' A E N A signal has been proposed, but if we try to cope with higher disk rotational speeds in the future, there will be problems such as the loss of margin for the discrepancy between the predicted timing and the actual disk timing. A crucial issue will be brought into focus.

It is an object of the present invention to generate accurate switching signals for sum and difference signals without relying solely on counter prediction, and to maintain the sum signal even when the rotational speed of the disk is increased. An object of the present invention is to provide a timing signal generation circuit for a magneto-optical disk that can accurately generate switching timing between the difference signal and the difference signal.

Means for Solving the Problems In order to achieve the above object, the present invention provides a method for alternately connecting the preformat section and the data section of a magneto-optical disk formatted according to the continuous format i of the ISO standard. This is a timing signal generation circuit that generates the switching signals necessary to guide the signal to the amplifier, and includes a crystal oscillator that generates the reference clock and the ability to selectively output initial values depending on the type of magneto-optical disk. an initial value controller; a counter that is loaded with an initial value given by the initial value controller and counts down with a clock from the crystal oscillator; and a counter that analyzes the output value of this counter to detect the starting point of the preformat section. a point decoder, a counter load timing decoder that analyzes the output value of the counter and outputs a sector mark detection prediction signal indicating the timing of the next sector appearance; and a counter load timing decoder that analyzes the output value of the counter and outputs a window start point and a window end point. a window start point decoder and a window end point decoder that detect points; a window generator that generates a window signal that is set by the output of the window start point decoder and reset by the output of the window end point decoder; A PLL that obtains a clock from read data, a sector counter that monitors the clock of this PLL and counts sectors, and an output that analyzes the output of this sector counter and outputs a HIGH signal when it detects the end point of a sector. an end point decoder; a latch that latches the output of the end point decoder; and a count select gate that determines the output of the window generator, the output of the end point decoder, and the output of the latch and outputs a signal to reset the output latch. , an output latch that outputs a switching signal that is set by the output of the start point decoder and reset by the output of the count select gate.

In the present invention, a switching signal is set at the data section start point detected by the start point decoder, and the switching signal is set at the data section start point detected by the start point decoder, and the sector end point generation timing detected by the sector counter and end point decoder and the data obtained by the window generator are set. The switching signal is reset by the signal obtained by determining the generation timing of a wind signal of a predetermined width generated at the rear of the section.
- to be done.

<Example> Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 is a main part configuration diagram showing an embodiment of a timing generation circuit for a magneto-optical disk according to the present invention.
1 is a crystal oscillator that generates a reference clock, and 2 is a counter that counts sector timing, which counts down from the loaded initial value using the reference clock and monitors the current number of sectors. It is something that exists.

3 is an initial value controller that specifies the type of magneto-optical disk (I
I (type: byte type or 512 byte type: this information is given from the higher order) Numerical value 1000 or 512
is output to counter 2.

5 is a counter load timing decoder, and counter 2
The sector mark detection signal S of the next sector is determined by analyzing the output value of
The timing at which M appears is predicted, and a sector mark detection prediction signal is output at the time of appearance.

A starting point decoder 6 analyzes the output of the counter 2 and detects the starting point of the data portion.

7 is a window start point decoder that analyzes the output of the counter 2 and detects the start point of the window signal; 8 is a window end point decoder that analyzes the output of the counter 2 and detects the end point of the window signal.

Note that this window signal is output at the end of the data section.

9 is a wind generator composed of flip-flops,
It is set by the output of the window start point decoder 7 and reset by the output of the window end point decoder 8.

10 is a PLL that creates a clock from the given serial data, 11 is a sector counter that monitors sectors by counting the output clock of the PLL, and 12 is a sector counter that analyzes the output of the sector counter to detect the end point of the sector (detection). 13 is a latch that latches the output pulse of the end point decoder, and 14 is a count select gate.

I5 is an output latch that outputs the D A 'I' A h N A signal (switching signal between sum signal and difference signal), which is set by the output of the start point decoder 6 and reset by the output of the count select gate 4. .

The counter 2 performs counting using the clock from the crystal oscillator 1, and uses either the sector mark SM given by the initial value controller 3 via the gate 4, or the next sector mark predicted by the counter load timing decoder 5 when the SM cannot be detected. Loaded on time.

The loaded value is a count number with a length of IK bytes or 512 bytes corresponding to the data size (set from the top).

When a window is generated by the window generator 9, the output latch 15 is simultaneously activated by the output of the starting point decoder 6 to determine the leading edge of the DA'T'AENA signal.

The count select gate 14 determines the timing of appearance of the output of the end point decoder 12, the output of the latch 13, and the output of the window generator, and generates a reset signal for the output latch. More specifically, ■As in normal operation, if the output of the end point decoder occurs during the period of the window signal from the window generator, the output of the latch is output as '&amp;; If the timing predicted from the disk is early, or if the sector counter advances in the data section, and the output of the end point decoder occurs before the wind signal from the window generator, the output of the latch is stored. If the latch output is LOW at the trailing edge of the wind signal from the wind generator, such as when the timing predicted from the actual disk is slow, the latch output is output at the trailing edge of the wind signal. In this case, a signal that becomes HIGH at the trailing edge of the window signal is output.

The operation in such a configuration will be described next with reference to time chart 1 shown in FIGS. 2(a) to 2(c). D
The starting point of the ATAENA signal is at the counter 2, which counts the clock (clock from the crystal oscillator), at the leading edge of the data area, since the pre-mat area is much smaller than the data area and has less error with the disk data. The prediction is made by the starting point decoder 6 which analyzes the output of .

The window generator 9 generates a window like the signal shown in FIG. 2, and generates a window at both the leading edge and the trailing edge so that the data does not shift to the next sector at the trailing edge (actually, the middle part of the buffer area). The width is set to ensure a margin, and the width is such that it does not embed the end of the appropriate data.

In addition, the sector timing counter 11, which operates with a clock locked by the PLL, controls the D A 'I'
The end point of the A EN A signal is predicted, and the timing relationship between the timing signal a and the window b is shown in Figure 2 (
Signal C in Figure 1, which moves as shown in a) or c), is the decoded output at the end point latched by the latch 13.

In the case of Figure 2 (A), if the normal signal a enters the window, the latch output C is output as the trailing edge of the D A T' AE N A, and as shown in Figure 2 (B), the latch output C is output as the trailing edge of the DATA If the expected timing is early, or if the sector timing counter advances in the data section due to a scratch, etc., the signal a will appear before the window, and in this case, the signal a will be output while the signal is HIGH. C is HIGH
DA 'I' A E N A trailing edge is output at the trailing edge of the signal.

In the same figure (c), when the timing predicted from the actual disk is slow, it is monitored that the signal C is LOW at the trailing edge of the signal, and the signal C is LOW at the trailing edge of the signal.
Generates NA trailing edge.

If the SM is not found in the next sector, the counter load timing decoder 5 predicts the SM position in the next sector, and the counter 2 automatically reloads to follow the count.

<Effects of the Invention> As described above in detail, according to the present invention, it is possible to synchronize and compare the timing prediction based on the clock from the crystal oscillator with the actual operating timing of the disk.
It is possible to realize an optical disk tester that can perform signal combination of a sum signal and a difference signal by obtaining an appropriate switching timing.

[Brief explanation of the drawing]

FIG. 1 is a main part configuration diagram showing an embodiment of a timing signal generation circuit for a magneto-optical disk according to the present invention, FIG. 2 is a time chart for explaining the operation, and FIG. 3 is a diagram of sectors on a magneto-optical disk. 4 is a diagram showing the format, FIG. 4 is a circuit that switches between a sum signal and a difference signal, FIG. 5 is a diagram showing switching timing in the format, FIG. 6 is a block diagram showing an example of a conventional timing signal generation circuit, and FIG. The figure is a time chart for explaining timing deviation. DESCRIPTION OF SYMBOLS 1...Crystal oscillator, 2...Counter, 3...Initial value controller, 4...Gate, 5...Counter load timing decoder, 6...Starting point decoder, 7
... Wind start point decoder, 8 ... Wind end point decoder, 9 ... Wind generator, 10 ... PL
L, 11... Sector counter, 12... End point decoder, 13... Latch, 14... Count select gate, 15... Output latch.

Claims (1)

[Scope of Claims] A timing signal generation circuit that generates a switching signal necessary for alternately connecting a preformat section and a data section of a magneto-optical disk formatted according to the continuous format of the ISO standard and guiding them to an amplifier. a crystal oscillator that generates a reference clock, an initial value controller that can selectively output an initial value depending on the type of magneto-optical disk, and a crystal oscillator that is loaded with the initial value given by the initial value controller. A counter that counts down with a clock from an oscillator, a start point decoder that analyzes the output value of this counter to detect the start point of the preformat section, and a start point decoder that analyzes the output value of the counter and determines the timing of the appearance of the next sector. a counter load timing decoder that outputs a sector mark detection prediction signal indicating a sector mark detection prediction signal; a window start point decoder and a window end point decoder that analyze the output value of the counter and detect a window start point and a window end point; A window generator that generates a window signal that is set by the output of the decoder and reset by the output of the window end point decoder, a PLL that obtains a clock from the read data on the magneto-optical disk, and a PLL that monitors the clock of this PLL and selects sectors. an end point decoder that analyzes the output of the sector counter and outputs a HIGH signal when the end point of a sector is detected; a latch that latches the output of the end point decoder; and the window generator. (1) If the output of the end point decoder occurs during the period within the window signal from the window generator, as in normal operation, the latch (2) If the timing predicted from the actual disk is earlier, or if the sector counter advances in the data section, the output of the end point decoder may be faster than the window signal from the window generator. (3) If the timing predicted from the actual disk is slow, the output of the latch is memorized and the output of the latch is output at the trailing edge of the wind signal. If the latch output is LOW at the trailing edge of the window signal, a count select gate outputs a signal that goes HIGH at the trailing edge of the window signal; 1. A timing signal generation circuit for a magneto-optical disk, comprising an output latch that outputs a switching signal that is reset by the output of the magneto-optical disk.