JPH0223057B2 - - Google Patents

Description

[Detailed Description of the Invention] (A) Technical Field of the Invention The present invention relates to an equalization processing method, particularly a data transmission system in which equalization processing is performed in an automatic equalizer every time a terminal device communicating with a center device is switched. In case the automatic equalizer enters a divergent state, when the equalization process of the automatic equalizer reaches a stable state, the tap coefficient at that point is saved according to instructions from the signal transmission quality detection circuit. The present invention relates to an equalization processing method in which the previously saved tap coefficients are restored to their original values based on an instruction from a signal transmission quality detection circuit when a divergence state occurs.

(B) Technical Background and Problems In a data transmission system in which a center device and multiple terminal devices are linked via a multipoint circuit, for example, after the center device receives data from terminal device A, the terminal device When attempting to receive data from terminal device B, the adaptive automatic equalizer in the center device equalizes the data so that it can correctly receive the data from terminal device B. In such a system, the automatic equalizer may become undesirably divergent when communicating with a certain terminal device. We need to release the divergent state.

(C) Object and Structure of the Invention The present invention aims to make it possible to easily take measures when the divergence state as described above occurs. data configured such that the terminal devices are connected via a multipoint line, and the center device is equipped with an automatic equalizer and performs equalization by the automatic equalizer upon reception from each of the terminal devices. In the transmission system, the center device includes a comparison circuit that compares the value of the data received through the automatic equalizer with a predetermined eye pattern value, and an output from the comparison circuit to perform the automatic, etc. a tap coefficient memory for setting tap coefficients for the converter; a signal transmission quality detection circuit for checking the transmission quality of the received data based on the output from the comparison circuit; An evacuation buffer is provided for evacuation based on instructions from the quality detection circuit, and the contents of the tap coefficient memory are saved to the evacuation buffer based on instructions from the signal transmission quality detection circuit during a stable state during data reception. Then, when the automatic equalizer enters a divergent state while receiving the data, the contents of the save buffer are set in the tap coefficient memory based on instructions from the signal transmission quality detection circuit. It is characterized by what it did. This will be explained below with reference to the drawings.

(D) Embodiments of the Invention FIG. 1 shows an embodiment of a data transmission system to which the present invention is applied, FIG. 2 shows an embodiment of the configuration of a modem section of the terminal device shown in FIG. 1, and FIG. 1 shows a main part configuration of an embodiment of the present invention.

In FIG. 1, 1 is a center device, 2A, 2
B, ... are terminal devices, 3 is a down line including a control line,
4 represents an uplink including a data line. Conventionally, in a system having the configuration as shown in FIG. 1, an automatic equalizer is provided in the receiving section in the center device 1, and each time it is necessary to receive data from each terminal device, the center device 1 receives data from the corresponding terminal device. The automatic equalizer performs equalization according to the terminal device.

FIG. 2 shows an embodiment of the configuration of the modem section of the terminal device shown in FIG. Reference numerals 3 and 4 in the figure correspond to those in FIG. 1, 6 is a pre-equalizer that supplements the function of the above-mentioned automatic equalizer, 7 is a roll-off circuit, 8 is a modulator, and 9 is the demodulator, 10 is the roll
11 is an automatic equalizer, 12 is a carrier automatic phase adjuster, 14A is a modem section of the terminal device 2A, and 15 is a scramble circuit for transmitting data.
Scramble processing for SD, 1
6 is a code conversion unit, 17 is a summation processing circuit, 18 is a data point setting circuit, 19 is a reception judgment circuit, and 20 is a difference processing circuit, which performs processing corresponding to the inverse processing of the above-mentioned summation processing circuit 17. 21 is an inverse code converter which performs a process corresponding to the inverse process of the above-mentioned code converter 16; 22 is a descrambling circuit which corresponds to the inverse process of the above-described scramble circuit 15. those that perform processing;
RS is request-to-send signal, CS is clear-to-send signal, SD is send data, RD
is received data, CD is carrier detect signal,
23 represents a signal quality detection circuit, and 24 represents a switch section.

The modem section 14A of the terminal device 2A demodulates the data sent from the center device 1, and the demodulation result is introduced to the carrier automatic phase adjuster 12 via the roll-off circuit 10 and the adaptive automatic equalizer 11. I'm scared. The output from the regulator 12 is
The determination is made by the reception determination circuit 19. The determination result is then passed through the difference processing circuit 20, the inverse code converter 21, and the descrambling circuit 22 to the received data.
Becomes RD.

FIG. 3 shows the configuration of main parts of the present invention, and the symbols 11, 12, 19, and 23 in the figure correspond to those in FIG. 2, and 25
26 is a comparison circuit, 26 is a tap coefficient memory which stores the tap coefficients of the automatic equalizer, and the tap coefficients are changed according to the comparison result by the comparison circuit 25, 27 is a switch, and 28 is a save buffer. It represents.

Automatic equalizer 11 shown in FIG. 2 or 3
For example, when it comes to the stage of receiving data from the terminal device 2A after receiving data from the terminal device 2B shown in FIG. Equalized so that In this case, depending on which of the eyes in a predetermined eye pattern the output value from the carrier automatic phase adjuster 12 is closest to, in the reception determination circuit 19, the reception that issued the output value is determined. The value of the data is determined. This determined value is
5, the tap coefficient is adjusted so that the error between the output value and the determined value is smaller for each data, and the automatic equalizer 11 is supplied to the terminal device 2A.
is equalized so that it can receive data correctly. In this state, true data from the terminal device 2A is received, but even during this time, the tap coefficient is changed based on the error from the comparator circuit 25, so that the error is reduced. I will adjust it to.

However, for example, if the received data is received with the above-mentioned error extremely increased due to some reason, the judgment by the reception judgment circuit 19 will not be correct, and for this reason automatic equalization will be performed. the tap coefficients supplied to the device 11 are altered in an undesired manner;
The automatic equalizer 11 ends up in a so-called divergent state. In such a case, it is necessary to perform equalization processing again.

In the case of the present invention, an evacuation buffer 28 is provided in order to avoid the trouble of performing the equalization process again. That is, as mentioned above, when it comes to receiving data from the terminal device 2A, for example,
When equalization is performed using the training pattern as described above, this state is detected by the signal quality detection circuit 2.
3 is detected, and the tap coefficient at the time when the equalization is completed is saved in the save buffer 28 via the switch 27. As described above, when the automatic equalizer 11 becomes undesirably divergent, the signal quality detection circuit 23 detects this divergent state and stores the tap coefficients saved in the save buffer 28 in the tap coefficient memory. 26 to forcibly perform overwriting. As a result, the divergence state of the automatic equalizer 11 is returned to the state at the time of initial equalization completion. If the above-mentioned divergence state does not occur when receiving data from the terminal device 2A, for example, the terminal device 2A
When receiving data from N, the terminal device 2A
Evacuation buffer 28 when receiving data from
It can be assumed that the contents saved in the file will be deleted.

(E) Effects of the Invention As explained above, according to the present invention, even if the automatic equalizer enters a divergent state, it can be easily recovered.

[Brief explanation of drawings]

FIG. 1 shows an embodiment of a data transmission system to which the present invention is applied, FIG. 2 shows an embodiment of the configuration of a modem section of the terminal device shown in FIG. 1, and FIG. 3 shows an outline of an embodiment of the present invention. Part composition is shown. In the figure, 1 is a center device, 2 is a terminal device, 2A is a modem section of the terminal device 2, 11 is an automatic equalizer, 12
is a carrier automatic phase adjuster, 19 is a reception judgment circuit, 23 is a signal quality detection circuit, 25 is a comparison circuit,
26 represents a tap coefficient memory, and 28 represents a buffer for saving.

Claims (1)

[Claims] 1 A plurality of terminal devices are connected to a center device via a multipoint line, and the center device is equipped with an automatic equalizer when receiving from each of the terminal devices, and the automatic equalizer performs equalization. In the data transmission system configured to perform the above, the center device includes a comparison circuit that compares the value of the data received via the automatic equalizer with a predetermined eye pattern value, and a a tap coefficient memory for setting tap coefficients for the automatic equalizer according to the output; a signal transmission quality detection circuit for checking the transmission quality of the received data according to the output from the comparison circuit; A save buffer is provided for saving the contents of the memory based on instructions from the signal transmission quality detection circuit, and the contents of the tap coefficient memory are saved based on instructions from the signal transmission quality detection circuit in a stable state during data reception. is saved in the save buffer, and when the automatic equalizer enters a divergent state while receiving the data, the contents of the save buffer are tapped as described above based on instructions from the signal transmission quality detection circuit. An equalization processing method characterized in that the coefficients are set in the coefficient memory.