JPH0223066A - Inverter control system - Google Patents

Abstract

PURPOSE:To suppress abnormal rising of a voltage by passing a deviation between the detection voltage of a DC capacitor and a first signal voltage obtained by feeding the detection voltage through a primary delay element through a proportional integrating/differentiating element, and switching it using its output. CONSTITUTION:An inverter control system connects an AC side terminal 4a to a power system 1 through an interconnection reactor 2, and controls a voltage type inverter 4 in which a DC side terminal 4b is connected to an initially charged DC capacitor 5. The control switches a changeover switch 21 to its side (d), immediately after the interconnection, to obtain a deviation between the detection voltage eD of the capacitor 5 and a first signal voltage eY1 obtained through a primary delay element 22 from the voltage eD by a subtractor 24, and further switches the inverter 4 according to the second signal voltage eU1 fed through a proportional integrating/differentiating element 23. After a predetermined period of time is elapsed, the switch 21 is shifted to its side (a) to be controlled.

Description

[Detailed Description of the Invention] [Field of Industrial Application] This invention is for controlling the voltage of a DC capacitor for storing DC energy to a constant level in a voltage type inverter used in a harmonic current suppressor or a reactive power compensator. The present invention relates to an inverter control method.

[Conventional technology]

For example, a conventional harmonic current suppression device is shown in FIG.
, a grid voltage ■, and a grid interconnection reactor 2 and a grid interconnection switch 3 having an impedance jXs in a power grid 1 with a grid voltage ■.
are connected in series to the AC side terminal 4a of the voltage type inverter 4, and to the DC side terminal 4a of the voltage type inverter 4.
A DC capacitor 5 is connected to b, and this DC capacitor 5
is connected to the power system 1 via a rectifier 7 and a switch 8.

This harmonic current suppressing device turns on the switch 8 in advance to initially charge the DC capacitor 5 to set the voltage E0 to the set value E.
By setting the voltage to about 90% of +1, turning off the switch 8, and then turning on the interconnection switch 3, the voltage type inverter 4 and the power grid I are interconnected.

In this interconnected state, a control circuit (not shown) controls on/off the switch elements of the voltage type inverter 4 depending on the harmonic components of the current flowing through the load 6, so that the load 6 can be connected to the power grid 1. A compensation current is injected into the power system 1 to cancel the harmonic current flowing into the power system 1, thereby preventing the harmonic current from flowing into the power system 1.

In the case of such a harmonic current suppression device, if the phase difference between the grid voltage V3 and the output voltage ■1 (component of the same frequency as the grid voltage V) of the voltage-type inverter 4 is φ (r a d), then the power The active power P flowing into the voltage type inverter 4 from the system 1 is given by P = (Vs '' / (11 circuits, 5 DC capacitors)
It is necessary to control the voltage E0 of the DC capacitor 5 to a constant set value ED8 by controlling the switching elements of the voltage type inverter 4 on and off based on the voltage ED.

For this reason, the above control circuit specifically has a configuration as shown in FIG. That is, this control 31 circuit is
Setting value all corresponding to the above-mentioned constant setting value EDll
The deviation 13x between l+ and the capacitor voltage detection voltage eD output from the voltage detection circuit (not shown) that detects the voltage E0 of the DC capacitor 5 is determined by the subtraction circuit M311, and fJI
The deviation (+X) output from the i calculation circuit 11 is passed through the proportional-integral-differential index (pH) element 12, and the proportional-integral-differential type li:
12 output vX and the output v of the harmonic detection circuit (not shown)
H and is added by the adder circuit 13, and the output VA of the adder circuit 13 is
is converted into a square wave voltage v0 by the pulse width modulation circuit 14, and by controlling the switching elements of the voltage type inverter 4 on and off using this square wave voltage v0, the voltage E0 of the DC capacitor 5 can be set to a constant value as described above. A compensation current is controlled to the value ED11 and is injected into the power system 1 to cancel the harmonic current flowing from the load 6 into the power system 1, thereby preventing the harmonic current from flowing into the power system 1.
There is ζ.

[Problem to be solved by the invention]

In this conventional example, when the voltage-type inverter 4 is connected to the power grid 1, a step response is performed regarding the control of the voltage E of the DC capacitor 5. Therefore, when the voltage-type inverter 4 is connected to the power system 1 at time t0, immediately after the connection is made. voltage E0 by step response to
increases from the initial value Eo+ toward the set value EDI+ as shown by the solid line in FIG. Based on the phase difference between the output voltage V1 of the voltage type inverter 4 and the output voltage V1 of the voltage type inverter 4, the increase in voltage Eo due to the active power P flowing from the power system 1 to the voltage type inverter 4 is added, and the voltage E0 is shown by the solid line. As a result, the constant value F, 1llI will be exceeded and the value will rise significantly. As a result, there is a problem in that a breaker or the like provided at the DC side terminal 4b to protect the voltage type inverter 4 trips due to overvoltage and no compensation operation is performed.

In order to solve the above-mentioned overvoltage trip problem, by increasing the capacity of the DC capacitor 5, the effective power P due to the phase difference φ between the grid voltage V and the output voltage ■ of the voltage type inverter 4 can be reduced. It is also possible to consider a method of suppressing fluctuations in voltage Ell due to inflow and outflow to prevent overvoltage trips. However, with this method, the DC capacitor 5
Since the number of DC capacitors 5 and the shape of the DC capacitors 5 increase, there is a problem that the installation space increases, and it is not preferable to make the diameter of the DC capacitor 5 thicker.

Therefore, an object of the present invention is to provide an inverter control method that can prevent an abnormal rise in the voltage of a DC capacitor when a voltage type inverter is connected to a power system without increasing the capacity of the DC capacitor. That's true.

[Means to solve the problem]

Immediately after interconnection, the impark control method of this invention
A capacitor voltage detection voltage corresponding to the voltage of the DC capacitor is passed through a first-order delay element, and the deviation between the first signal voltage and the capacitor voltage detection voltage is passed through a proportional-integral-differential equation,
The voltage-type inverter is switched in accordance with the second signal voltage output from this proportional-integral-differential compiler, and after a predetermined period of time has passed and the phase difference between the grid voltage and the output voltage of the voltage-type inverter disappears, the set value or The deviation between the third signal voltage obtained by passing the set value through the first-order delay element and the capacitor voltage detection voltage is passed through the proportional-integral-differential circuit, and the voltage type is determined according to the fourth signal voltage output from the proportional-integral-differential circuit. It is characterized by switching inverters.

[For production]

According to the configuration of the present invention, immediately after interconnection, the deviation between the first signal voltage obtained by passing the capacitor voltage detection voltage corresponding to the voltage of the DC capacitor through the first-order delay element and the capacitor voltage detection voltage is calculated by proportional integral differentiation. Since the voltage-type inverter is switched in accordance with the second signal voltage output from the proportional-integral-differential-differential voltage source, immediately after interconnection,
The deviation between the first signal voltage and the capacitor voltage detection voltage becomes negative and acts in the direction of lowering the voltage of the DC capacitor. Therefore, even if the phase of the output voltage of the voltage type inverter lags behind the system voltage and active power flows from the power system to the voltage type inverter and the voltage of the DC capacitor is about to rise abnormally, this can be suppressed. Moreover, at this time, since the step response has not yet started, there is no rise in the voltage of the DC capacitor due to the step response, and an abnormal rise in the voltage of the DC capacitor immediately after interconnection can be sufficiently suppressed.

Then, after a predetermined period of time has passed and the phase difference between the grid voltage and the output voltage of the voltage-type inverter disappears, the set value or the third ftT obtained by passing the set value through the first-order delay element is
The voltage type inverter is switched according to the fourth signal voltage outputted from the proportional-integral-differential signal through the proportional-integral-differential signal. When the transient phase difference between the inverter output voltage and the grid voltage is eliminated and the DC capacitor voltage does not rise due to the phase difference,
The voltage of the DC capacitor will approach the set value. Therefore, even at this time, an abnormal rise in the voltage of the DC capacitor can be suppressed.

〔Example〕

A first embodiment of the present invention will be described based on FIGS. 1, 2, and 4. This inverter control method
As shown in the figure, interconnection reactor 2 is connected to power grid l.
This control method controls a voltage type inverter 4 in which the AC side terminal 4a is connected to the AC side terminal 4a and the DC side terminal 4b is connected to the initially charged DC capacitor 5. That is, as shown in FIG. 1, in this inverter control method, immediately after interconnection, the voltage E of the DC capacitor 5 is adjusted by switching the selector switch 21 to the b side.

The subtracter 24 calculates the deviation ez between the first signal voltage e□ obtained by passing the capacitor voltage detection voltage e corresponding to the first-order delay element 22 through the first-order delay element 22 and the capacitor voltage detection voltage e. The voltage-type inverter 4 is switched in accordance with the second signal voltage 41UI that is passed through the proportional-integral-differential cable 23 and output from the proportional-integral-differential cable 23, and after a predetermined period of time, the grid voltage V and the voltage-type inverter 4 are switched. After the phase difference φ with the output voltage ■1 disappears, by switching the changeover switch 21 to the a side, the third signal voltage evt obtained by passing the set value eDl through the first-order delay circuit B22 and the capacitor voltage detection voltage The deviation e2□ from eD is passed through the proportional-integral-differential cable 23, and the voltage type inverter 4 is switched in accordance with the fourth signal voltage euZ output from the proportional-integral-differential cable 23.

In this inverter control method, immediately after interconnection, the first signal voltage ey+ obtained by transmitting the capacitor voltage detection voltage e0 corresponding to the voltage E of the DC capacitor 5 to the first-order delay element 22 and the capacitor voltage detection voltage eo The deviation ``21'' from the subtracter 24 is obtained by the subtracter 24, the deviation cz1 outputted from the subtracter 24 is passed through the proportional-integral-differential index 23, and according to the second signal voltage eL11 output from the proportional-integral-differential index 23. Since the voltage type inverter 4 is switched, immediately after interconnection, the deviation eel between the first signal voltage e□ and the capacitor voltage detection voltage e becomes negative and acts in the direction of lowering the voltage E0 of the DC capacitor 5.

For this reason, the phase of the output voltage V of the voltage type inverter 4 lags with respect to the system voltage V, and active power P flows from the power system 1 into the voltage type inverter 4, causing the voltage ED of the DC capacitor 5 to abnormally rise. This will also be suppressed. However, at this time, the step response has not yet started, so the DC capacitor 5 due to the step response
voltage E.

There is no rise in voltage El of DC capacitor 5 immediately after interconnection.
This means that an abnormal increase in l can be sufficiently suppressed.

After a predetermined period of time has passed and the phase difference φ between the system voltage V and the output voltage ■ of the voltage-type inverter 4 disappears, the third signal voltage obtained by passing the set value ellII through the first-order delay element 22 is evt and capacitor voltage detection voltage e6
The deviation ezt from Therefore, the transient phase difference φ between the output voltage v1 of the voltage type inverter 4 and the grid voltage V, which starts immediately after grid connection, is canceled and the phase difference φ becomes J.
,% When the voltage EIl of the DC capacitor 5 no longer increases, the voltage E of the DC capacitor 5 increases.

will approach the set value EDII. Therefore, at this time as well, y due to the abnormality of the voltage EIl of the DC capacitor 5 is suppressed. In this case, the set value e□
Since the voltage is also supplied to the subtracter 24 through the first-order delay signal Jg22, there is a difference between the capacitor voltage detection voltage C0 and the set value '3111 when the selector switch 22 is switched from the b side to the a side. Even if the input to the first-order lag element 22 changes in a stepwise manner, the voltage on the output side of the -th-order lag element 22 changes gradually. Overshoot can also be suppressed.

Note that the signal voltage e output from the proportional-integral-differential index 23
Urr eg□ is added to the harmonic detection voltage vN in the adder 25, and the output of the adder 25 is converted into a square wave voltage vP in the pulse width modulation circuit 27, and this square wave voltage V
, thus the on/off of the switching elements of the voltage type inverter 4 is controlled j11 as in the conventional example.

FIG. 2 shows the voltage eIl+ev1* in the example.
3 is a time chart showing temporal changes in eVl. In FIG. 2, time 1. The connection is made at time t□, and the selector switch 22 is turned on.
is switched from the b side to the a side. In addition, the dashed-dotted line shows the change in voltage e9 in the case of the conventional example.

A second embodiment of the invention will be described based on FIG.

The control method of this voltage type inverter is based on a set value e. Instead of inputting the signal voltage C□ passed through the −th order delay element 22 to the subtracter 24, the set value e□ is input directly to the subtracter 24.

According to this embodiment, the effect of the first embodiment of being able to suppress the overshading of the voltage Eo due to the step response when switching the changeover switch 22 cannot be expected, but other effects are not as good as those of the first embodiment. It is similar to

〔Effect of the invention〕

According to the inverter control method of the present invention, immediately after interconnection, the deviation between the first signal voltage obtained by passing the capacitor voltage detection voltage corresponding to the voltage of the DC capacitor through a first-order delay element and the capacitor voltage detection voltage is proportional to The voltage-type inverter is switched according to the second signal voltage output from the proportional-integral-differential converter, and the phase difference between the grid voltage and the output voltage of the voltage-type inverter disappears after a predetermined period of time. After that, the set value or the set value is passed through the first-order delay element and the 11.1 difference between the third signal voltage and the capacitor voltage detection voltage is passed through the proportional integral derivative. Since the voltage-type inverter is switched according to the fourth signal voltage output from the voltage-type inverter, the voltage of the DC capacitor can be prevented from abnormally rising when the voltage-type inverter is connected to the power grid without increasing the size of the DC capacitor. Be able to do it.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of the first embodiment of the present invention, FIG. 2 is a time chart showing changes in voltage at each part of FIG. 1, and FIG. 3 is a block diagram showing the configuration of the first embodiment of the invention. FIG. 4 is a block diagram of the harmonic current suppressing device, FIG. 5 is a block diagram of its control circuit, and FIG. 6 is a time chart showing changes in voltage at each part of FIG. 5. l...power system, 2...grid interconnection reactor, 5...
DC capacitor, 4... Voltage type inverter, 22...
・-Next lag element, 23...Proportional-integral-differential index diagram

Claims (1)

[Scope of Claims] An inverter control method that controls a voltage type inverter whose AC side terminal is connected to the power grid via a grid reactor and whose DC side terminal is connected to an initially charged DC capacitor, Immediately after interconnection, the capacitor voltage detection voltage corresponding to the voltage of the DC capacitor is passed through a first-order delay element, and the deviation between the first signal voltage and the capacitor voltage detection voltage is passed through a proportional-integral-differential index. The voltage type inverter is switched in accordance with the second signal voltage output from the proportional-integral-differential element, and after a predetermined time has elapsed, the set value or the third signal voltage obtained by passing the set value through the first-order delay element and the above-mentioned An inverter control method that switches the inverter according to the deviation from the capacitor voltage detection voltage.