JPH02236742A - Cpu abnormality detection circuit - Google Patents

Abstract

PURPOSE:To comprise a GATE ARRAY incorporated in a WATCH DOG TIM ER detection circuit by sending a signal representing the fact that a CPU is abnormal when a counter counts a time longer than a constant pulse cycle sent from the CPU. CONSTITUTION:The circuit is comprised of the counter 2 which counts the time 1 longer than the constant cycle sent from the CPU, and a reset circuit 3 which resets the count of the counter 2. A CPU abnormality detection circuit 1 receiving the pulse S1 of constant cycle from the CPU 4 counts the counter only for the time T1 from the trailing edge of a reset pulse S3 which resets the counter 2. When the next WATCH DOG TIMER pulse S1 is received, the counter 2 is reset, and the counter is counted for the timer T1 again. When no WATCH DOG TIMER pulse S1 arrives, the counter 2 is counted for the time(T1) longer than the cycle of the pulse S1, and a CPU abnormality detecting signal S2 is sent out. Thereby, it is possible to comprise the GATE ARRAY incorporated in the WATCH DOG TIMER detection circuit.

Description

[Detailed description of the invention] [Industrial application field] The present invention is based on CPU (CENTRAL PROCES).
This article relates to the monitoring of CPU abnormalities (SING UNIT), and particularly to the CPU abnormality detection circuit that monitors CPU abnormalities. [Prior art] Conventionally, a CPU abnormality detection circuit (WATCH DOG TI
The MER detection circuit (MER detection circuit) is a smoothing circuit composed of a resistor and a capacitor, and monitors the CPU depending on whether it receives periodically determined pulses sent out by the CPU.

[Problem to be solved by the invention]

Conventional WATCH DOG TIME on the above-mentioned machine
The R detection circuit requires an external resistor and capacitor, and cannot form a GATE ARRAY with a built-in WATCH DOG TIMER detection circuit. [Means for Solving the Problems] The CPU abnormality detection circuit of the present invention includes a counter that counts a time longer than a constant pulse period sent out by the CPU;
the counter is reset by a pulse sent by the CPU, and when the counter counts a time longer than the period of the pulse, the C
Indicates that the PU is abnormal. It is configured to send out a signal. [Example] Next, the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a timing chart.

The CPU abnormality detection circuit of the present invention includes a counter 2 that counts a time T1 that is longer than a constant pulse period sent out by the CPU, and a reset circuit 3 that resets the count of the counter 2.

The CPU abnormality detection circuit 1, which receives a pulse S1 of a constant period from the CPU 4, rotates the Tl counter for a time longer than the constant pulse period sent out by the CPU 4 from the fall of the reset pulse S3 that resets the counter 2. Next WATC
When receiving the H DOG TIMER pulse S1, the counter 2 is reset by the pulse (S3) and the counter is turned again for the time T1, WATCH DOG
When the TIMER pulse Sl stops coming, the counter 2 finishes rotating for a time (T1) longer than the period of the pulse Sl. At that time, counter 2 outputs CPU abnormality detection signal S2.
Send out. That is, it is determined that the CPU is not sending a periodically determined pulse (S1) to the CPU abnormality detection circuit 1, and a CPU abnormality detection signal S2 is sent.

〔Effect of the invention〕

As explained above, the present invention can be applied to the conventional WATCH D
Since no external parts required for the OG TIMER detection circuit are required, it is possible to configure a GATE ARRAY with a built-in WATCH DOGTIMER detection circuit.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a timing chart. 1... CPU abnormality detection circuit, 2... Counter, 3... Reset circuit, 4...
...CPU.

Claims (1)

[Claims] It has a counter that counts a time longer than a certain pulse period sent out by a CPU, and a reset circuit that resets the counter by the pulse sent out by the CPU, and the counter counts a time longer than the period of the pulse. A CPU abnormality detection circuit, characterized in that the CPU abnormality detection circuit sends out a signal indicating that the CPU is abnormal.