JPH0224627U - - Google Patents

Info

Publication number
JPH0224627U
JPH0224627U JP10122488U JP10122488U JPH0224627U JP H0224627 U JPH0224627 U JP H0224627U JP 10122488 U JP10122488 U JP 10122488U JP 10122488 U JP10122488 U JP 10122488U JP H0224627 U JPH0224627 U JP H0224627U
Authority
JP
Japan
Prior art keywords
receiver
delay time
pass filter
low
compensator
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10122488U
Other languages
Japanese (ja)
Other versions
JP2533020Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1988101224U priority Critical patent/JP2533020Y2/en
Publication of JPH0224627U publication Critical patent/JPH0224627U/ja
Application granted granted Critical
Publication of JP2533020Y2 publication Critical patent/JP2533020Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

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  • Filters That Use Time-Delay Elements (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例の補償器のブロツク
構成図、第２図は本考案の補償器を適用した一例
のダイバーシテイ受信システムの要部のブロツク
図、第３図は一般的なスペースダイバーシテイ受
信システムのブロツク図である。 １，１Ａ…アンテナ、２，２Ａ…フイーダー、
２′，２Ａ′…高周波入力端子、３…主受信機、
３Ａ…ダイバーシテイ受信機、４…信号合成器、
５…受信出力端子、６，６Ａ…周波数変換部、７
，７Ａ…中間周波部、８，８Ａ…復調部、１０…
遅延時間補償器、１１…入力端子、１２…出力端
子、１３１，１３２，…，１３ｎ…低域通過ろ波
器、１４１，１４２，…，１４ｎ…伝送線路、１
５ｘ…接栓、ａｘ，ｂｘ，ｃｘ，ｄｘ…端子。 Fig. 1 is a block diagram of a compensator according to an embodiment of the present invention, Fig. 2 is a block diagram of the essential parts of an example of a diversity receiving system to which the compensator of the present invention is applied, and Fig. 3 is a general block diagram of a compensator according to an embodiment of the present invention. FIG. 1 is a block diagram of a space diversity receiving system. 1, 1A... antenna, 2, 2A... feeder,
2', 2A'...high frequency input terminal, 3...main receiver,
3A...Diversity receiver, 4...Signal combiner,
5...Reception output terminal, 6,6A...Frequency conversion section, 7
, 7A... intermediate frequency section, 8, 8A... demodulation section, 10...
Delay time compensator, 11... Input terminal, 12... Output terminal, 13 1 , 13 2 ,..., 13 n ... Low pass filter, 14 1 , 14 2 ,..., 14 n ... Transmission line, 1
5 x ...connection, ax , bx , cx , dx ...terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 主受信機とダイバーシテイ受信機の信号を合成
又は切替えるスペースダイバーシテイ受信システ
ムにおいて、所要の絶対遅延時間特性を有する少
なくとも１つの低域通過ろ波器と、この低域通過
ろ波器を短絡又は開放する接続端子とを備え、一
方の受信機の信号遅延に対応して、該遅延時間に
一致するように接続構成して他方の受信機に介挿
するように構成したことを特徴とする絶対遅延時
間補償器。 In a space diversity reception system that combines or switches signals from a main receiver and a diversity receiver, at least one low-pass filter having a required absolute delay time characteristic and this low-pass filter are short-circuited or A connection terminal that opens and is configured to correspond to a signal delay of one receiver and to be connected to match the delay time and inserted into the other receiver. Delay time compensator.
JP1988101224U 1988-07-30 1988-07-30 Absolute delay time compensator Expired - Lifetime JP2533020Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1988101224U JP2533020Y2 (en) 1988-07-30 1988-07-30 Absolute delay time compensator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1988101224U JP2533020Y2 (en) 1988-07-30 1988-07-30 Absolute delay time compensator

Publications (2)

Publication Number Publication Date
JPH0224627U true JPH0224627U (en) 1990-02-19
JP2533020Y2 JP2533020Y2 (en) 1997-04-16

Family

ID=31330024

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1988101224U Expired - Lifetime JP2533020Y2 (en) 1988-07-30 1988-07-30 Absolute delay time compensator

Country Status (1)

Country Link
JP (1) JP2533020Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002030006A1 (en) * 2000-09-29 2002-04-11 Matsushita Electric Industrial Co., Ltd. Wireless receiving device and method of detecting branch-to-brance delay difference in wireless receiving device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5580932A (en) * 1978-12-14 1980-06-18 Fujitsu Ltd Detecting system for absolute delay time difference
JPS55156433A (en) * 1979-05-25 1980-12-05 Fujitsu Ltd Space diversity system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5580932A (en) * 1978-12-14 1980-06-18 Fujitsu Ltd Detecting system for absolute delay time difference
JPS55156433A (en) * 1979-05-25 1980-12-05 Fujitsu Ltd Space diversity system

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2002030006A1 (en) * 2000-09-29 2002-04-11 Matsushita Electric Industrial Co., Ltd. Wireless receiving device and method of detecting branch-to-brance delay difference in wireless receiving device
US6832079B2 (en) 2000-09-29 2004-12-14 Matsushita Electric Industrial Co., Ltd. Radio receiving apparatus, and method for detecting a delay differential between branches in the apparatus

Also Published As

Publication number Publication date
JP2533020Y2 (en) 1997-04-16

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