JPH02246604A - Offset adjustment circuit for multi-stage differential amplifier - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention is used in a part of a timing extraction circuit that extracts clock information from received data in an optical communication device, a coaxial cable communication device, etc. The present invention relates to an offset adjustment circuit for a multistage differential amplifier that limits and amplifies the output signal of an extraction filter.

In optical communication devices, clock information is re-extracted from received data so that the receiving side has a retiming function. As part of this clock signal extraction operation, limiter amplification is performed to amplify the output signal of the clock component extraction filter to a predetermined waveform.

Limiter amplifiers used therein have been integrated into ICs in recent years, and generally have a configuration in which differential amplifiers are connected in multiple stages. Therefore, in order to make the most of the performance of the amplifier for small input signals, it is necessary to perform offset adjustment (also referred to as offset compensation) of the amplified output signal.

[Conventional technology]

3 and 4 show conventional offset adjustment circuits.

In FIG. 3, the offset adjustment is performed manually, and the first stage differential amplifier 72a of the differential amplifiers 72 connected in multiple stages is
A received signal is inputted from one input terminal of the circuit, and a separately set offset adjustment signal, that is, a variable bias voltage, is inputted from the other input terminal.

In Figure 4, offset adjustment is performed using a feedback circuit, which treats the clock waveform as a sine waveform, detects its average value, compares it with a reference value, and feeds it back to the input section to compensate for the error amount. It is multiplied by . That is, an offset detection circuit 73 is connected to one signal line in the middle of the amplifier circuit, and its output signal (average value of the waveform) is compared with a reference value by a comparator 74, so that the detected signal matches the reference value. In addition, a feedback signal is input to one input terminal of the first-stage differential amplifier 72a.

[Problem to be solved by the invention] However, since the offset adjustment circuit shown in Fig. 3 manually adjusts the offset of the output signal, each time the offset amount changes, the adjustment must be repeated individually. It's complicated.

The offset adjustment circuit shown in FIG. 4 performs appropriate offset adjustment when an offset simply occurs in a sine waveform or a signal waveform without duty shift. However, when waveform distortion with duty shift occurs in high-speed waveforms, the following problems occur.

That is, when waveform distortion as shown in FIGS. 5(A) and 5(B) occurs in the outputs on both sides of the differential amplifier with duty shifts in the same direction, the output waveform on the offset detection side will be the 5th waveform. The output waveform on the other side is adjusted to compensate for the offset as shown in Figure (C), but the output waveform on the other side is the same as when the offset was increased, as shown in Figure 5 (D). It becomes.

In this way, since the offset adjustment circuit shown in Fig. 4 detects a sine waveform, it has the disadvantage that if there is waveform distortion, the operation will be inconsistent.Also, since it is vulnerable to waveform distortion, the waveform cannot be cut by a limiter. It is necessary to detect the signal from around the middle stage of the amplifier circuit before the signal is detected, and it is not possible to control offsets and the like that occur in the circuits at the later stages.

The present invention eliminates such drawbacks of the conventional method and can always perform optimal offset control even when there is waveform distortion.
It is an object of the present invention to provide an offset adjustment circuit for a multistage differential amplifier that can accurately respond to high-speed waveforms.

[Means to solve the problem]

To achieve the above object, the offset adjustment circuit of the multistage differential amplifier of the present invention, as shown in FIG. In a limiter amplifier circuit that amplifies the signal to a predetermined waveform, in which a plurality of differential amplifiers 2 are connected in multiple stages, the average value of each output waveform is calculated from both output terminals of the final stage differential amplifier 2. A pair of offset detection means 3 to detect and each offset detection means 3 described above
The present invention is characterized in that a comparing means 4 is provided for comparing the detection outputs from the amplifier and feeding back the output signal to the input terminal of the first-stage differential amplifier 2 so that both detection values are averaged.

[Effect]

The average value of each output waveform is detected by the offset detection means 3 from the outputs on both sides of the final stage differential amplifier 2, and these detected values are compared by the comparison means 4, and both detected values are averaged. It is controlled by feedback.

〔Example〕

Examples will be described with reference to the drawings.

FIG. 2 shows an embodiment in which differential amplifiers are connected in four stages. 1 is a clock component extraction filter, such as a SAW filter, which inputs received data, extracts a clock component from it, and outputs it.

2 is a differential amplifier, which is connected in four stages in the order of 2a to 2d. Reference numerals 21 and 22 denote a pair of amplifying transistors and a load resistor provided in each differential amplifier 2, and in each differential amplifier 2, transistors with the same characteristics and resistors with the same resistance value are used. Clock component extraction filter l
The output from the differential amplifier 2a is connected to be input to the base of one transistor 21 of the first stage differential amplifier 2a.

In each differential amplifier 2, the input terminal is the base of the amplification transistor 21, and the output is obtained by receiving the amplitude coming out from the load resistor 22 by the emitter follower circuit 6 in a so-called ECL format. It is input to the differential amplifier 2 in the next stage. 61 is an amplification transistor of each emitter follower circuit 6.

Two sets of emitter followers are connected to the final stage differential amplifier 2d, and the output terminal of one of the emitter followers 6d serves as the output terminal of the limiter amplifier, from which a pair of clock signals having an inverted relationship are output. is output. Further, the other emitter follower 20 is formed as an offset detection circuit 3 for detecting the average value of each of the two output waveforms of the final stage differential amplifier 2d. 31 is a resistor, 32 is a capacitor for smoothing voltage, and this CR circuit detects and outputs the average value of the signal waveform. Therefore, in each of the two output waveforms, if there is a variation in duty due to an offset of the sine waveform or waveform distortion, this will result in a variation in the output of the offset detection circuit 3.

The Ryokawa force (detection value) of the offset detection circuit 3 is input to a comparator 4 formed by, for example, an operational amplifier.

Then, the output signal from the comparator 4 is fed back to one of the input terminals of the first-stage differential amplifier 2a so that the rain detection values are averaged.

In the circuit of the above embodiment configured in this manner, the clock component extraction signal input to the first stage differential amplifier 2a is amplified by the differential amplifier 2 and emitter follower circuit 6 of each stage. Then, in the subsequent stages (for example, the third and fourth stages), limiter amplification is performed to cut the waveform of the output value above the negative weight.

Furthermore, if a waveform offset occurs, the comparator 4 is activated by the detection output from the offset detection circuit 3, and the output signal from the comparator 4 performs feedback control to compensate for the offset.

For example, as shown in FIGS. 5A and 5B, if the output waveforms on both sides of the final stage differential amplifier 2d are distorted in the same direction, the two offset detection circuits 3 Since the detection output values of are equal, the 51st m(E) and (F
), the output waveforms do not vary together. Therefore, it is possible to prevent the conventional phenomenon in which the offset increases when there is waveform distortion.

Note that the output waveform of the final stage differential amplifier 2d in the above embodiment is subjected to limiter amplification, so it is actually as shown in FIG.
Although the waveform is not close to a sine wave like E) and (F), but is close to a rectangular wave, in order to make the comparison with the conventional example easier to understand, the same sine waveform as the conventional example is used for explanation.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the present invention, FIG. 2 is a block diagram of an embodiment, FIGS. 3 and 4 are block diagrams of conventional examples, and FIG. 5 is a diagram showing output waveforms. [Effects of the Invention] According to the offset adjustment circuit of the multistage differential amplifier of the present invention, even if waveform distortion such as duty shift occurs,
Since there is no increase in the duty shift as in the conventional case, it is possible to appropriately respond to high-speed waveforms that inevitably cause waveform distortion and output a fairly accurate locked waveform. Since it is resistant to waveform distortion, the waveform in the limiter region can also be subject to offset detection.Therefore, the output of the final stage can be fed back to perform optimal control for all stages. It has excellent effects such as: In the figure, 1... Clock component extraction filter, 2... Differential amplifier, 3... Offset detection means, 4-... Comparison means.

Claims (1)

[Claims] A limiter amplifier circuit that amplifies the output signal of a clock component extraction filter (1) into a predetermined waveform in order to extract clock information from received data, the circuit comprising a plurality of differential amplifiers (2). are connected in multiple stages, and a pair of offset detection means (3) detects the average value of each output waveform from both output terminals of the final stage differential amplifier (2).
), and comparison means (3) which compares the detection outputs from each of the offset detection means (3) and feeds back the output signal to the input terminal of the first stage differential amplifier (2) so that both detection values are averaged. 4) An offset adjustment circuit for a multistage differential amplifier, characterized by comprising: