JPH02250574A - Picture receiving signal processing circuit - Google Patents

Abstract

PURPOSE:To project the screens of plural channels at one time by outputting simultaneously the channel selection control signal which is sent to a channel selection controller part from a field signal processing part and the composite video signal switch control signal which is supplied to a composite video signal which part and applying the time division processes to both control signals for each field. CONSTITUTION:A channel selection control signal 7a received from a field signal processing part 7 and a composite video signal switch control signal 7b are outputted at one time and undergo the time division control for each field with not execution of the interlaced scanning. That is, a channel selection controller part 6 is controlled by the signal 7a and produces a tuning voltage control signal to perform the double channel control at a tuner part 2. At the same time, a composite video signal 3a is switched by the signal 7b. As a result, two channel pictures can be projected on a CRT 5.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image reception signal processing circuit, and more particularly to an image reception signal processing circuit for receiving a plurality of channel images in a television receiver.

[Conventional technology]

Conventionally, such an image reception signal processing circuit has a function of receiving only one channel image.

FIG. 5 is a block circuit diagram of an image reception signal processing circuit showing an example of such a conventional technique.

As shown in FIG. 5, the conventional image reception signal processing circuit is
Functionally, it includes a tuner section 2 that selects one channel from the radio waves input from the antenna 1, a high frequency signal processing section 3 that obtains a composite video signal 3a, a composite video/deflection signal processing section 4, and a CRT 5. and a channel selection controller section 6 that controls the tuner section 2.

In such a signal processing circuit, only one channel image selected by the tuner unit 2 is displayed on the CRT 5.

[Problem to be solved by the invention]

The conventional image reception signal processing circuit described above is a circuit that processes an image signal of only one channel and displays the result as one screen on a CRT. Therefore, there is a drawback that screens of channels other than the projected image cannot be viewed at the same time.

An object of the present invention is to provide an image reception signal processing circuit that allows screens of multiple channels to be viewed simultaneously.

[Means to solve the problem]

The image reception signal processing circuit of the present invention extracts a field signal for time division on a field-by-field basis from a composite video signal from a high-frequency signal processing section or a deflection signal from a composite video/deflection signal processing section, and processes the extracted field. a field signal processing section that generates a channel selection control signal and a composite video signal switching control signal to the selection controller section according to a signal; and a composite video signal switching section that switches the composite video signal according to the composite video signal switching control signal from the field signal processing section. Equipped with a
The tuning control signal is configured to simultaneously output a tuning control signal to the tuning controller section that controls the tuning channel of the tuner section and the switching control signal.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of an image reception signal processing circuit showing an embodiment of the present invention.

As shown in FIG. 1, in addition to the block circuit of the conventional example described above, this embodiment extracts a field signal contained in a composite video signal 3a output from a high frequency signal processing section 3, and a field signal processing unit 7 which generates a channel selection control signal 7a and a composite video signal switching control signal 7b; and a field signal processing unit 7 which is controlled by the composite video switching control signal 7b and outputs a composite video signal 3a to the composite video/deflection signal processing unit 4. (1)
This is because a composite video signal switching unit 8 is provided for switching between the side (2) and the side (2) where the video signal is output to the outside. That is, in this embodiment, the channel selection control signal 7a and the composite video signal switching control signal 7b from the field signal processing unit 7 are output simultaneously, and time-division control is performed for each field, and interlaced scanning is performed in rows. In short, the tuning control signal 7a controls the tuning controller unit 6, which creates a tuning voltage control signal to control the two channels in the tuner unit 2, and at the same time controls the composite video by the switching control signal 7b. This is for switching the signal 3a.

As a result, in this embodiment, two channel images can be displayed on the CRT 5.

FIGS. 2(a) to (c) are a CRT screen diagram, an image signal waveform diagram, and a field signal waveform diagram during the image signal processing shown in FIG. 1, respectively, and FIGS. 3(a) and (b) are 2A and 2B are a CRT screen diagram and an image signal waveform diagram, respectively, during normal image signal processing in FIG. 1; FIG.

As shown in FIGS. 2(a) to (C), in this embodiment, the field signals V (n,), V (n+1)
The two fields defined by are divided into two channels and used here, and field A is shown here. That is, one odd field n and one even field n+1 constitute one frame.

Further, as shown in FIGS. 3(a) and 3(b), one frame consisting of field A and field B is displayed on the CRT 5 during normal image signal processing in this embodiment.

Next, the overall operation of the image reception signal processing circuit will be further explained in FIGS. 1, 2(a) to 2(c) and 3(a).
) and (b).

First, the radio waves input from the antenna 1 shown in FIG. 1 are tuned to one broadcasting station (channel) by the tuner section 2.
The high frequency signal processing section 3 obtains a composite video signal 3a shown in FIG. 2(b).

Next, the field signal shown in FIG. 2(C) is extracted by the field signal processing section 7 from the field signals V(n>, V(n+1>) contained in the composite video signal 3a.

In this field signal processing section 7, the output signal for each odd (or even) field shown in FIG.
or an even number) field so that only one channel can be received, the channel selection control signal 7a is sent to the channel selection controller section 6, and at the same time, the switching control signal 7b is sent to the composite video signal switching section 8, and the (1) side and displays the odd (or even) field screen on the CRT 5 via the composite video/deflection signal processing unit 4. On the other hand, for the even (or odd) field, the composite video is switched at the same time as selecting another channel. Part 8 (2
) side for external output.

Therefore, the displayed screen is not the usual interlaced scanning screen shown in FIG. 3(a), but a non-interlaced scanning screen as shown in FIG. 2(a).

FIG. 4 is a block diagram of an image reception signal processing circuit showing another embodiment of the present invention.

As shown in FIG. 4, in this embodiment, the input signal for creating the field signal shown in FIG. 2(C) is supplied from the composite video/deflection signal processing section 4 to the field signal processing section 7. be. This processing circuit has the advantage that the circuit configuration is simple because the synchronization separation circuit and the field oscillation circuit are built into the composite video/deflection signal processing section 4.

〔Effect of the invention〕

As explained above, the image reception signal processing circuit of the present invention includes a field signal processing section and a composite video signal switching section, and transmits a channel selection control signal from the field signal processing section to the channel selection controller section and the composite video signal. CRT
Even when the video is being displayed on the screen, composite video signals of other channels can be simultaneously extracted.

[Brief explanation of drawings]

FIG. 1 is a block diagram of an image reception signal processing circuit showing an embodiment of the present invention, and FIGS. 2(a) to (C) are CRT screen diagrams and image signal waveforms during image signal processing shown in FIG. 1, respectively. The figure and field signal waveform diagrams, Figures 3 (a) and (b), respectively, are of the CRT during normal image signal processing in Figure 1.
A screen diagram and an image signal waveform diagram, FIG. 4 is a block diagram of an image reception signal processing circuit showing another embodiment of the present invention, and FIG. 5 is a block diagram of an image reception signal processing circuit showing a conventional example. DESCRIPTION OF SYMBOLS 1... Antenna, 2... Tuner section, 3... High frequency signal processing section, 3a... Composite video signal, 4... Composite video/deflection signal processing section, 5... CRT, 6.・・・
Tuning controller section, 7... field signal processing section,
7a...Tuition selection control signal, 7b...Composite video signal switching control signal, 8...Composite video signal switching unit.

Claims (1)

[Claims] A field signal for time division is extracted for each field from the composite video signal from the high frequency signal processing section or the deflection signal from the composite video/deflection signal processing section, and the extracted field signal is used to control channel selection to the selection controller section. A field signal processing section that generates a signal and a composite video signal switching control signal, and a composite video signal switching section that switches the composite video signal in accordance with the composite video signal switching control signal from the field signal processing section, and the tuner section selects a channel. An image reception signal processing circuit that simultaneously outputs a channel selection control signal and the switching control signal to the channel selection controller section that controls a channel.