JPH02265201A - Chip component - Google Patents
Chip componentInfo
- Publication number
- JPH02265201A JPH02265201A JP1086269A JP8626989A JPH02265201A JP H02265201 A JPH02265201 A JP H02265201A JP 1086269 A JP1086269 A JP 1086269A JP 8626989 A JP8626989 A JP 8626989A JP H02265201 A JPH02265201 A JP H02265201A
- Authority
- JP
- Japan
- Prior art keywords
- film
- electrode
- melting point
- solder
- chip component
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Details Of Resistors (AREA)
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
【発明の詳細な説明】
産業上の利用分野
本発明は電子機器の経量化、薄形化、小形化に寄与する
電子回路部品の一種であるチップ部品に5Aするもので
ある。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is directed to a 5A chip component, which is a type of electronic circuit component that contributes to the reduction in weight, thickness, and size of electronic equipment.
従来の技術
従来、この種のチップ部品は、第4図に示すような構成
であった。第4図は従来例として角板形チップ抵抗器の
断面図を示しており、1けガラス波受、摸、27dアル
ミナ系絶縁基板、3は抵抗体。2. Description of the Related Art Conventionally, this type of chip component has had a structure as shown in FIG. FIG. 4 shows a cross-sectional view of a square plate type chip resistor as a conventional example, where 1 is a glass wave receiver, a 27D alumina insulating substrate, and 3 is a resistor.
4は銀糸電極漠、6′はニッケル漠、6は五気メ、ツキ
法で析出させたはんだまたはスズ膜であり、特開昭64
−26458号公服、実公昭65−21282号公報、
実公昭55−21283号公報、特公昭68−1084
3号公報および実開昭60−192401号公報等にも
関連技術が記載されている。4 is a silver thread electrode, 6' is a nickel electrode, and 6 is a solder or tin film deposited by the five-metal method.
-26458 official uniform, Utility Model Publication No. 65-21282,
Utility Publication No. 55-21283, Special Publication No. 68-1084
Related techniques are also described in Publication No. 3 and Japanese Utility Model Application No. 192401/1983.
発明が解決しようとする課題
このような従来の構成では、第4図の注んだまだはスズ
、模6がメツキ膜であり1表面が第6図の最外層電極の
断面図でその表面状嬢を示すように粗面になっており、
表面積が非常に大になっている。このためそれらの膜は
異物の吸蔵や吸着がしやすくなり、長期間保存した場合
には電極表面が酸化等の化学変化を起し、プリント基板
への実装はんだ付時に・はんだ付不良を発生させる可能
性が大であるという問題点があった。Problems to be Solved by the Invention In such a conventional configuration, the poured part in Fig. 4 is tin, the pattern 6 is a plating film, and the surface is shown in the cross-sectional view of the outermost layer electrode in Fig. 6. It has a rough surface that indicates a lady.
The surface area is extremely large. For this reason, these films tend to absorb and absorb foreign substances, and when stored for a long period of time, the electrode surface undergoes chemical changes such as oxidation, which can cause soldering defects when soldering to a printed circuit board. The problem was that the possibility was high.
本発明はこのような問題点を解決するもので。The present invention solves these problems.
チップ部品の電極部表面積を小にし、しかも平滑化して
はんだ濡れ性の改善と長期の保存に対してはんだ付のは
須性を向とさせることを目的とするものである。The purpose of this is to reduce the surface area of the electrode part of a chip component and to make it smoother, thereby improving solder wettability and making it easier to solder for long-term storage.
課題を解決するための手段
この問題点を解決するだめに本発明I/i、五極部の最
外層電極膜に低儀点金4メツキ膜を使用し。Means for Solving the Problem In order to solve this problem, in the present invention I/i, a low-grade gold 4-plated film is used as the outermost electrode film of the pentode portion.
北記′11極部の低融点金属メツキ貞の下地はこの低融
哉金蝿メツキ膜よりも融点が高く、シかもこの低融点金
属メツキ漢と親和性の良い材料で構成され、かつと記低
蝕截金・罵メツキ膜電極材料の1融点よりも高温で熱処
理がほどこされ、成極部の最外層部が再溶融合@漢で被
覆されしかも表面粗さが0〜0.6μmとした構造を有
するものである。The base material of the low melting point metal plating in the northernmost part has a higher melting point than this low melting point metal plating film, and is also composed of a material that has good affinity with this low melting point metal plating film, and is The structure is heat-treated at a temperature higher than the melting point of the electrode material, and the outermost layer of the polarized part is coated with re-melting fusion@Kan, and the surface roughness is 0 to 0.6 μm. It is something that you have.
作用
この構成によれば、亀甑最外層部の電極膜表面の徂さが
小であるので1表面積は小さくなっており、従来のチッ
プ部品のメツキ膜そのままの状態と比較して極めて表面
積が小さくなり、しかも表面が平滑であるので保存中に
異物の付着やガスの吸着が極端に少なくなるので、はん
だ濡れ性およびはんだ付は信頼性の向上につながること
となる。Function: According to this configuration, the width of the electrode film surface of the outermost layer of the turtle shell is small, so the surface area is small, and the surface area is extremely small compared to the state where the plating film of the conventional chip component is intact. Moreover, since the surface is smooth, adhesion of foreign matter and adsorption of gas during storage are extremely reduced, leading to improved solder wettability and reliability of soldering.
実施例
以下1本発明の一処施例について添付図面を参照しなが
ら説明する。Embodiment One embodiment of the present invention will be described below with reference to the accompanying drawings.
第1図は本発明の一実施例による角板形チップ抵抗器の
斜視図であり、第2図は第1図のA−B線より見た断面
図である。これら第1図および第2図におりで、従来列
と同一箇所には同一番号を付して説明は省略する。FIG. 1 is a perspective view of a square plate-shaped chip resistor according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along line A--B in FIG. 1. In these FIGS. 1 and 2, the same parts as in the conventional column are given the same numbers, and explanations thereof will be omitted.
第1図および第2図において、7ははんだまたはスズ膜
で、はんだまたはスズ膜をニッケル、漠5北に電気メツ
キ法で析出させた後、そのはんだまたはスズの融侭より
も高い温度で熱処理がほどこされ1表面が平滑化処理形
成された金属膜であり、その表面粗さは非常に小さくな
っている。In Figures 1 and 2, 7 is a solder or tin film, and after the solder or tin film is deposited on nickel by electroplating, it is heat-treated at a temperature higher than the melting temperature of the solder or tin. It is a metal film that has been subjected to a smoothing treatment on one surface, and its surface roughness is extremely small.
このように本発明のチップ抵抗器が従来例と異なるとこ
ろは、電極部の最外層電極膜に低融点金1メツキ膜を使
用し、その電填材料の:融点よりも高温で熱処理をほど
こし、電極部の最外層部が再溶融金属膜で彼受された構
造を有し、しかもその表面粗さが小さくなっている点で
ある。As described above, the chip resistor of the present invention is different from conventional examples in that a low-melting point gold plating film is used for the outermost electrode film of the electrode part, and heat treatment is performed at a temperature higher than the melting point of the electrical filling material. The outermost layer of the electrode part has a structure in which it is covered with a remelted metal film, and its surface roughness is reduced.
ここで、低1へ金4メツキ漠の下池(ここではニッケル
漢5)はこの低七へ金属メツキ、漠よりも融へか高く、
シかもこの低Ma金1メフキ漠と親和性の良A金駕材料
で構成されていることが必要である。Here, the lower pond of the gold 4 metal plate (here Nickel Han 5) to the low 1 is the metal plate to this low 7, which is higher than the metal plate,
It is also necessary that the material is made of a high-A gold material that has an affinity for this low-Ma gold.
次に、丑記与容1触金属模であるはんだまたはスズ膜γ
の具体的な作・戊手段について一例を説明する。今、銀
糸電極膜4を備えだアルミナ系也畏基板1上に、抵抗体
3として導電性グレーズ摸を20μm、ニッケル漠5を
6μm、最外層膜としてスズ:鉛=eo:4o(融点は
約183℃)の電気メツキはんだ模12μmのものを試
作し、それをロジン系フラックスに浸漬した表、加熱炉
にて220 ’C・SO秒間の加熱処理を行った。これ
により成極部の最外層部に再:@、a金属膜からなるは
んだ(まだはスズ)膜7を形成することができた。Next, solder or tin film γ, which is a metal model,
An example of a specific production/method will be explained. Now, on the alumina-based substrate 1 equipped with the silver thread electrode film 4, a conductive glaze of 20 μm as the resistor 3, a 6 μm of nickel powder 5 as the outermost layer film, and tin:lead=eo:4o (melting point is approx. A 12 μm thick electroplated solder pattern (183° C.) was prepared, which was immersed in rosin-based flux and then heat-treated at 220° C.SO for seconds in a heating furnace. As a result, a solder (still tin) film 7 made of a metal film could be formed on the outermost layer of the polarized portion.
このようにして得られたチップ抵抗器の成極部の最外層
表面の断面状態を第3図に示す。この第3図は熱処理後
の電極表面の断面を精密粗さ計にて測定したものである
。FIG. 3 shows a cross-sectional state of the surface of the outermost layer of the polarized portion of the chip resistor thus obtained. FIG. 3 shows the cross section of the electrode surface after heat treatment, measured using a precision roughness meter.
トホした従来、!11の第5:図も同じ条件(ただし、
混気メツキX:d熱処浬せず)で作成しだチップ抵抗器
のzh衣表面同じく情糸且さ計で測定したものである。Too bad conventionally! 11 No. 5: The same conditions apply to the figure (however,
The coating surface of a chip resistor made with mixed air plating (X:d without heat treatment) was also measured with a thickness meter.
これら第31図、篤5図のt玉表面咀さを比較すると、
末弟処理品の従来品の表面は凹凸の敷しい坦面であり、
熱処理で表面を平滑化とした本発明品の表面はけんだメ
ツキ模を溶融させているため平滑になっており、その分
だけ表面積が小さくなっていることが解る。Comparing the surface texture of the t-ball in Figure 31 and Figure 5,
The surface of the conventional product, which is the youngest processed product, is a flat surface with unevenness.
It can be seen that the surface of the product of the present invention, whose surface was smoothed by heat treatment, is smooth because the soldered plating pattern is melted, and the surface area is reduced accordingly.
ここで、上記の実血例においては、最外層ノ摸の低、@
点金焉メツキ摸として電気メツキ膜を;使用した場合に
ついて説明したが、これは均一な厚みのメツキ、漢が得
られる点では化学メツキで低融点金部メツキ莫を作成す
ることもできるものである。Here, in the above real blood example, the outermost layer is a sample of @
We have explained the case where electroplated film is used as a point metal plating model, but it is also possible to create a low melting point metal plating with chemical plating in that it can obtain a plating with a uniform thickness. be.
また、上記実施例における電極部つ各構成材料は、特に
銀、ニッケル、はんだまたはスズに限定されるものでは
ない。Further, the constituent materials of the electrode parts in the above embodiments are not particularly limited to silver, nickel, solder, or tin.
ここで上記実施例によるはんだ濡れ性と長期保存性を確
認するため下記試験を実施した。Here, the following tests were conducted to confirm the solder wettability and long-term storage stability of the above examples.
・湿中加速放置実血(60″0.95″XRH。 ・Real blood left under accelerated humidity (60″0.95″XRH).
100時間)
・メースコグラフ法によるはんだ濡れ時間測定〔結果〕
本発明品のはんだ濡れ時間は従来品のそれに比ベイ以下
で非常にはんだ濡れ性が良い。100 hours) - Measurement of solder wetting time using the Meascograph method [Results] The solder wetting time of the product of the present invention was less than Bay compared to that of the conventional product, and the solder wettability was very good.
またL記試倹において1本発明品において電極部の最外
層表面の徂さが0.511rrL以上においてはその効
果が顕著でなかったので1本発明における効果ば“に水
都の最外、・―表面の粗さを0.5μm以下とする必要
がある。In addition, in the L experiment, the effect was not significant when the surface area of the outermost layer of the electrode part was 0.511rrL or more in the product of the present invention. - Surface roughness must be 0.5 μm or less.
発明の効果
以北のように構成された本発明のチップ部品によれば次
の通りの効果が得られる。Advantages of the Invention According to the chip component of the present invention configured as described above, the following effects can be obtained.
(1)電極表面を熱処理平滑化したものは、メツキ膜の
みのものより平滑であるので1表面の酸化。(1) An electrode whose surface has been heat-treated and smoothed is smoother than one with only a plating film, so one surface is oxidized.
異物の付rwおよびガス類の吸着が減少し、長期用の深
存に対してもはんだ付けの信頼性が確保できる。The attachment of foreign matter and the adsorption of gases are reduced, and the reliability of soldering can be ensured even for long-term use.
歯)電極表面が平滑なため、このチップ部品をプリント
基板に実装する際、他の物と接触する場合滑りが良く、
実装効率が良い。Teeth) Since the electrode surface is smooth, when this chip component is mounted on a printed circuit board, it slides easily when it comes into contact with other objects.
Good implementation efficiency.
(3) メツキ、模に比べて表面積が小さいので保存
中のガス類の吸着が少なく、はんだ付は峙てはんだから
の気泡がなく、はんだ仕上げもピンホールなどもなく、
きれいであるとともに電子回路の百須性が向りする。(3) Since the surface area is smaller than that of matte and mock, there is less adsorption of gases during storage, there are no bubbles from the solder when soldering, and there are no pinholes in the solder finish.
Not only is it beautiful, but it also improves the quality of electronic circuits.
(4)電極表面が平滑なため、テーピングやマガジンの
集合体を製造する工程において、滑りが良くなり生・柔
性カニ向上し1部品へ与える衝撃も少なくなり信頼性が
向上する。(4) Since the electrode surface is smooth, slippage is improved in the process of manufacturing taping and magazine assemblies, improving flexibility and flexibility, and reducing impact on single parts, improving reliability.
君1図14本発明の一実強例である角板形チップ抵抗器
の斜視図、第2図は同第11図0A−B線の3新面図、
第3図は同チップ抵抗器の五■表面の■さを測定した特
性図、第4図は従来の角板形チップ抵抗器の1析面図、
第6図は同チップ抵抗器の電極表面の、′11さを測定
した特性図である。
1・・・・・・ガラス波、1膜、2・・・・アルミナ系
絶禄基板、3・・・・・抵抗体、4・・・・・銀系電極
膜−6・・・・・・ニッケル漠、7・・・・・・熱処理
により平滑化されたはんだまた辻スズ膜。
代理人の氏名 弁理士 粟 野 重 孝 ほか1名第
図
乙
!−カ゛ラス液7覆」夾
2“−アルミナ示陀球七坂
3−屯抗俸
寓
図Figure 14 is a perspective view of a square plate chip resistor which is an example of the present invention; Figure 2 is a new view taken along line 0A-B in Figure 11;
Figure 3 is a characteristic diagram of the measured surface thickness of the same chip resistor, Figure 4 is an analytical diagram of a conventional square plate chip resistor,
FIG. 6 is a characteristic diagram obtained by measuring the '11 thickness of the electrode surface of the same chip resistor. 1...Glass wave, 1 film, 2...Alumina-based isolation substrate, 3...Resistor, 4...Silver-based electrode film-6...・Nickel coating, 7...Solder or Tsuji tin film smoothed by heat treatment. Name of agent: Patent attorney Shigetaka Awano and one other person Figure 2! - Glass liquid 7" and 2" - Alumina display ball Nanazaka 3 - Tun resistance figure
Claims (1)
部の低融点金属膜の下地はこの低融点金属膜よりも融点
が高く、かつこの低融点金属膜と親和性の良い金属材料
で構成し、上記電極部の最外層電極膜の表面粗さが0〜
0.5μmである再溶融金属膜で被覆された構造を有す
るチップ部品。A low melting point metal film is provided as the outermost electrode film of the electrode part, and the base of the low melting point metal film of the electrode part is made of a metal material that has a higher melting point than this low melting point metal film and has good affinity with this low melting point metal film. The surface roughness of the outermost electrode film of the electrode part is 0 to 0.
A chip component having a structure covered with a remelted metal film having a thickness of 0.5 μm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1086269A JPH02265201A (en) | 1989-04-05 | 1989-04-05 | Chip component |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1086269A JPH02265201A (en) | 1989-04-05 | 1989-04-05 | Chip component |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH02265201A true JPH02265201A (en) | 1990-10-30 |
Family
ID=13882100
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1086269A Pending JPH02265201A (en) | 1989-04-05 | 1989-04-05 | Chip component |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH02265201A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04219913A (en) * | 1990-12-19 | 1992-08-11 | Kiyokawa Mekki Kogyo Kk | Brazed two-layer structure electrode of electronic element |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6315401A (en) * | 1986-07-08 | 1988-01-22 | 松下電器産業株式会社 | Chip parts |
-
1989
- 1989-04-05 JP JP1086269A patent/JPH02265201A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6315401A (en) * | 1986-07-08 | 1988-01-22 | 松下電器産業株式会社 | Chip parts |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04219913A (en) * | 1990-12-19 | 1992-08-11 | Kiyokawa Mekki Kogyo Kk | Brazed two-layer structure electrode of electronic element |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4829553A (en) | Chip type component | |
| JPS6227393A (en) | Formation of copper film on ceramic substrate | |
| KR900003849B1 (en) | Circuit substrate and thermal printing head using the same caller identifying method | |
| JPH02265201A (en) | Chip component | |
| JP3354221B2 (en) | Method of forming bump electrode | |
| JPH04277406A (en) | Copper conductor paste | |
| EP0264121A2 (en) | Aluminum enamel board | |
| JPH0465011A (en) | Copper conductive paste | |
| JPH0824081B2 (en) | Manufacturing method of chip parts | |
| JPH02265202A (en) | Chip component | |
| JPH0349108A (en) | Copper conductor composition material | |
| JPH02265203A (en) | Chip component | |
| JPH03246990A (en) | Method of forming thick film conductor | |
| JPS57141934A (en) | Semiconductor device | |
| JPH04357899A (en) | Manufacture of circuit substrate with auxiliary solder layer | |
| JPS6019680B2 (en) | How to solder to an insulation board | |
| JPS5932148Y2 (en) | Chip parts for jumpers | |
| JPS5843593A (en) | Square chip jumper and its manufacturing method | |
| JPS5810302A (en) | Conductive paste | |
| JPH0465010A (en) | Copper conductive paste | |
| JPH06330384A (en) | Thin film having excellent solderability and ic package having the thin film as well as formation of the thin film | |
| JPH0770380B2 (en) | Nickel plating method for electronic parts | |
| JPS63275196A (en) | Manufacture of circuit substrate | |
| JPS594095A (en) | Method of producing hybrid integrated circuit | |
| JPH0362989A (en) | Thick-film circuit substrate and its manufacturing method |