JPH02268304A - Sampling method for trace back data - Google Patents

Abstract

PURPOSE:To reduce the burden on software of a computer by constituting trace back information by a program having a period longer than the actual generation and constitution period and a low interrupt priority level as if state variable information of a control system were sampled with a period shorter than the actual generation and update period. CONSTITUTION:A program P1 of a current control system started based on an interrupt request signal I1 executes prescribed control operation processing for current control. At this time, a counted value (n) of a frequency dividing counter 3 is read, and state variable information X(k) and n(k) to be traced back are written in a memory 2, and (k) is increased. In response to a request I2, a program P2 of a speed control system executes prescribed control operation processing and samples trace back information in accordance with a prescribed algorithm. Thereafter, a value (m) is successively increased with a period tau0 to trace time series information Xtau(m), thus tracing back state variable information (x). By this constitution, the load on software of a microcomputer is reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention aims to improve the various states of a control system in order to satisfy the so-called RAS (Reliability, Availability, and Maintainability) function in a control device using a microcomputer. This invention relates to a data sampling method for traceback that reproduces quantitative data.

(Prior art) Conventionally, for example, a motor speed control device using a semiconductor power conversion device detects the speed of the motor and uses the result of an adjustment calculation such as a proportional integral calculation as a torque command so that the speed matches the set speed. Alternatively, it is composed of a speed control system that outputs current commands and a current control system that controls the semiconductor power conversion device based on these torque commands or current commands.

Generally, a minor loop such as a current control system is usually controlled at a shorter sampling period than a speed control system due to its purpose and the nature of the controlled object.

On the other hand, in an electronic control device that incorporates a microcomputer, the so-called RAS function constantly samples and records the control amount, operation amount, and other data inside the control device, so that it can be used in the event of a failure or failure of the device. In the event of a failure, the controller is equipped with a traceback function that clarifies the state of the control device before and after the failure occurs and investigates the cause by reproducing the data before and after the failure occurred.

When implementing such a traceback function, traceback data is usually The sampling period is selected to be a constant period shorter than the original update period of the data. Specifically, at a constant sampling period that is shorter than the shortest data sampling period in the control system (for example, in the example of the speed control device of an electric motor mentioned above, this corresponds to the sampling period for controlling the current system). The state of each control system is sampled for traceback purposes.

(Problems to be Solved by the Invention) By the way, repeatedly performing sampling processing in a short cycle causes a substantial burden on the entire software system, forcing it to rely on interrupt processing in a substantially short cycle. For example, in the control system described above, sampling for traceback data collection is performed at 1 (msec
) period interrupt, then 1 (+1sa
c) In addition to the software processing time required to perform sampling to collect data every time, processing time (overhead) is required to save/restore internal registers and operate the interrupt control circuit in response to the occurrence of one interrupt. Become.

By the way, the time required for sampling is 80 (p 5
ac), and the overhead is 20 (p 5ac),
The time required for both is 1 (+5ec1 is 80+20
= 100(us.

C], and the load factor of the microcomputer is 10%. In a relatively slow control loop such as a speed control system, for example, if the control calculation is performed at a cycle of 10 (msec), this control level is converted to 10 (+*5 ec) x 10 (%
] = 1 (msec), which is a burden that cannot be ignored even from the viewpoint of the control loop, which is the original purpose of the control device.

Furthermore, if the time required for software processing to control the semiconductor power conversion device as described above is equal to or longer than the sampling period for traceback, there may be gaps in sampling or temporal differences with other data. In order to prevent deviations, sampling for traceback must be given priority even during software processing for such control, and interrupts for sampling traceback data must be given priority to the current system. Set the interrupt level to a higher priority than the interrupt for control of
Traceback data will be sampled even if the arithmetic processing for current control is interrupted.

This has created a problem in that the calculation processing time for current control is compressed, which may impede the control calculations that are the original purpose of the control device.

The present invention was proposed to solve the above problems, and its purpose is to eliminate the need to start a program with a high interrupt priority just for sampling traceback data, and to It does not increase the load on the computer's software more than necessary.

It is an object of the present invention to provide a method for sampling traceback data that allows sampling to be performed without any hindrance to the original control calculations of a control device.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides an interrupt request signal for specifying the timing of an interrupt processing program when generating/updating state quantity data sampled as traceback data. The count value of the frequency division counter of the system clock that generates the system clock is stored together with the state quantity data.

In addition, in a program that is started at a longer cycle and with a lower interrupt priority than the program and samples traceback data, the time at which sampling is performed is determined from the count value of the frequency division counter at the time when the sampling process is performed. At the same time, the state is determined from the state quantity data left by the program that generates traceback data between the last time the program was started and the current time the program is started, and the count value of the counter at the time of updating the state quantity data. The updated time point of the quantity data is determined, the state quantity data at the sampling time point converted to the same time axis is determined, and this is used as the sampling result of the traceback data.

(Function) Generally, the data sampling period of a control device using a microcomputer is determined by a frequency division circuit (frequency division counter) consisting of a counter for the CPU system clock.
It is counted and generated by Therefore, if it is possible to read out the count value of this system clock (which is generally possible in many cases), that value can be used instead of time to correct the timing deviation between multiple different control loops (sampling periods) at the same time. It can be converted and evaluated on the time axis.

That is, the first program that generates and updates the state quantity data X sampled for traceback saves the counted value of the frequency division counter at the time of updating the state quantity data X together with the updated state quantity data X. If you do this, the second program on the sampling side uses the following method, as if it had a cycle shorter than the startup cycle of the first program. The same result as when sampling the state quantity data X can be obtained.

This will be explained with reference to FIGS. 1 and 2. In FIG. 1, the sawtooth waveform n is the second program P2
represents the count value of the frequency division counter for generating the interrupt request signal I2 that activates the interrupt request signal I2.

Here, the frequency division counter counts the system clock F of frequency f (Hz), and resets the count value to zero every time the count value reaches n2-1. Output.

Now, let us consider a case where a program P that generates and updates state quantity data X to be traced back is started at a timing asynchronous to the program P2 with a cycle τ□ shorter than the start cycle τ2 of the program P2. Program P
1 detects the count value n of the frequency dividing counter at the time when it is generated and updated together with the state quantity data X, and stores these as X(k) and Ql(k), respectively, then the state quantity data The generation/update time t1 of (k) is determined by the following recurrence formula (1) or (1)' as the integrated value of the deviation of n□(k).
It can be expressed as

t1=t1oLd+n, (in-n, (k-t); nl
<k>>n, (when k-1+...(1) tl = t 1otd+ n, + nl(k) n
l(k-t); nl(k+≦n1(k-t)...(1)' Note that t10td on the right side of equations (1) and (1)' above is the previous value of t□ on the left side. Here, in order to simplify the expression, time t2 is treated as being converted to the count value of the system clock, and the same applies to the following.

On the other hand, regarding the sampling timing t of the traceback data in the program P2, the count value of the frequency division counter at the sampling time △ is similar to tl.
It can be expressed by the following equation (2) using n.

t2=t2oLd-Δn, oLd+n, +Δn,
-(2) Note that j, oLd, Δn, and OLd are each t
The previous value of 2tΔn2 is shown. Here, Δn2 represents the time lag from the generation of interrupt signal 2 to start program P2 by the frequency dividing circuit to the time when sampling for traceback is actually performed, and t , OLd represents Δn2 at the time when program P2 was executed last time.

As mentioned above, based on the count value n of the frequency division counter,
Multiple programs p1. It is possible to know the timing between p and p.

The specific algorithm will be explained below. Program P
1, each time the state quantity data X to be traced back is generated or updated, the value X and the count value n of the frequency division counter are set as
st InFirst 0ut) Store in buffer.

On the other hand, in the routine that actually performs data sampling for traceback in program P, the count value Δn of the frequency division counter at the time of sampling is
2 is used to determine the time point t2 at which sampling is to be performed based on the calculation of equation (2).

Next, between the time of the previous sampling by program P2 and this time, program P performs the FIFO
0 set of state quantity data stored in the buffer
), the traceback data sampling operation is performed according to the flowchart shown in FIG. 5, which will be described later.

As a result, the state quantity data X generated and updated at a period τ1 in the program P, has a period τ as shown in FIG.
. It can be reproduced as time series data XT(II) sampled in .

(Example) An embodiment of the present invention will be described below with reference to FIG.

Note that this embodiment has a current control system as a minor loop. This is a case where the present invention is applied to a speed control device for a motor using a semiconductor power conversion device.

Fig. 3 shows the hardware configuration of this embodiment. Second, it is a memory that functions as a so-called FIFO memory, and its configuration is such that the FIFO function is directly realized by hardware.

An ordinary fixed memory may be used as a ring buffer to implement the FIFO function in software in conjunction with the use of pointers for writing/reading.

3 counts the system clock F (f (Hzl)) and every time it counts by n2, the microcomputer 1
4 is a current control system program that outputs an interrupt request code 2 and starts the fixed cycle program P8 of the speed control system at regular intervals; 4 is a current control system program that performs control calculation processing of the current minor loop; An interrupt signal generation circuit outputs an interrupt request signal of one cycle τ□ as a start request for P1, and 5 and 6 are input interfaces and outputs for detecting various control variables and driving equipment based on the manipulated variables. Interface 7 is a data bus.

In such a configuration, the microcomputer 1 starts the program P2 based on the interrupt request signal ■, so the starting cycle of the program P2 is τ2=n2÷
It becomes f. Further, the count value n of the frequency division counter 3 can be read from the microcomputer 1 via the data bus 7.

Furthermore, the starting period τ of the program P1 of the current control system is
The speed control system program P2 is started asynchronously with the program P2 based on an interrupt request coder that is shorter than the start cycle τ and has a higher priority than the interrupt request coder. ing.

Here, the current control system program P□ started at the period τ updates the state quantity data X at the period τ□ by 2 times in one cycle.
At the sampling period in the speed control system program P2 started at. Consider the case of sampling traceback data.

However, the period τ2. τ4. τ. It is assumed that the following equation (3) holds true between .

τ. τ1 τ, ...(3) Therefore, the above period τ. , τ1. Value n obtained by converting τ2 to the count value of system clock F by frequency division counter 3
The following equation (4) also holds true for 1le ntt na.

. . Kun□＜nl　・・・(4) However, no=τ. ×f, nL=τ□×f.

n, = τ, Xf Next, FIG. 4 is a flowchart of the current minor loop program P1 that generates and updates state quantity data X that is traced back as a result of detection and control calculations of the current control system in this embodiment. FIG. 5 is a flowchart of a speed control system program P2 that performs detection and control calculations for the speed control system at 8 at a cycle longer than that of the program P, and also performs sampling for traceback based on the algorithm of the present invention. Based on these, the operation of this embodiment will be explained below.

First, in the flowchart of FIG. 4, a current control system program P started based on an interrupt request signal I□
The operator performs predetermined control calculations and processing for current control (step Sl). Furthermore.

Read out the count value n of the frequency division counter 3 at that point in time (S2) and write it to the memory (PIF○ buffer) 2 as X(k) and nl(k) together with the state quantity data X to be traced back (S3) , and then increments the value of (S 4 ).

Next, in the flowchart of FIG. 5, the speed control system program P2 started based on the interrupt request executes predetermined control calculations and processing for speed control (step S11). Furthermore, as a sampling process for traceback data, sampling of traceback data is performed according to the following algorithms (1) to (2) based on equation (2) described in the section (effects) above.

■First, the time point t2 at which the traceback data sampling process is actually performed is determined using equation (2) (S 12
．． S13).

■Then, set Δn2 used to find time t2 as the previous value Δn2oLdS 14) and set k to 1 (
S15) It is determined whether there is state quantity data stored by the program P in the memory 2 (S16).

■If there is this state quantity data
(1) according to the magnitude relationship between (k) and nl(k-1).
) or (1)1 to obtain the state quantity data X (
The update time t2 of k) is determined (817-519), and then the value of k is incremented (S20).

Next, the sampling time point t0 for traceback is determined on the same time axis as the above t step (821 to t).
523), the value of the state quantity data X at the sampling time t0 is determined from the magnitude relationship between to and t, and the period τ is determined. Create time series data XA(,) S24゜S25.
S27), and increments the value of m (S26°528).

As a result, the traceback of the state quantity data X has a period τ
. The time series data XT (Im+
This can be achieved by tracing.

Note that if 1 or nl is a knowable value in the startup cycle of the program P1, then the startup cycle of the program P2 > the startup cycle of the program P1, the program P L −P z
Both programs do not need to be started at regular intervals.

(Effects of the Invention) As described above, according to the present invention, the state quantity data of the control system is generated for a period longer than the period in which this data is actually generated and configured.
In addition, traceback data is constructed by a program with a low interrupt priority as if it were sampled at a shorter cycle than the cycle at which the state quantity data is actually generated or updated, so it is not necessary to use traceback data only for sampling purposes. There is no need to start a program with a high interrupt priority, and there is no need to increase the load on the software of the microcomputer that implements the control function for reasons other than the original control purpose.

In addition, the traceback data must be configured, including the idle time between when the program that performs the traceback sampling processing described above is activated by the generation of an interrupt signal, and when the data collection processing is actually performed. from,
Since the above program can be processed at any timing, restrictions on program execution are relaxed, and there is an advantage that the original processing of the control device for the purpose of control can be executed with priority.

[Brief explanation of drawings]

1 and 2 are timing charts for explaining the present invention in detail, FIG. 3 is a block diagram of a control device to which an embodiment of the present invention is applied, and FIGS. 4 and 5 are timing charts for explaining the present invention in detail. and a flowchart showing the processing of the second program. 1...Microcomputer 2...Memory 3
...Division counter 4...Interrupt signal generator 5
...Input interface 6...Output interface 7...Data bus I0. I,... Interrupt request signal F... System clock

Claims (1)

[Claims] In a control system in which a count value of a clock frequency division counter for managing a program activation cycle can be read and a plurality of programs are activated at a plurality of interrupt timings, A program that simultaneously stores the generated/updated state data to be traced back and the count value of the frequency division counter at the time of updating, and has a longer activation cycle and lower interrupt priority than the first program. In the second program, this second
The state is calculated based on the count value of the frequency division counter stored by the first program from when the program was last started until it is started again, and the count value of the frequency division counter at the time of starting the second program. The update time of the quantity data and the sampling time for traceback are converted to be on the same time axis, and the update time of the state quantity data converted to the same time axis and the sampling time for traceback are A method for sampling traceback data, characterized in that the value of the state quantity data at the sampling time is determined based on the relationship, and the value is reconstructed as time series data of the state quantity at the sampling time.