JPH02270080A - Picture data processor - Google Patents

Abstract

PURPOSE:To display a picture immediately after picture data is measured by providing a circuit to execute a normalize processing while original picture data read from an original picture memory is transferred to a display memory. CONSTITUTION:A normalize processing circuit 8 executes the normalize processing while the original picture data read from an original picture memory 2 is transferred to the display memory 3. Accordingly, it is enough to read the picture data from the original picture memory 2 to a CPU 1 only once when the maximum value and minimum value of the picture data are calculated. Then, it is not necessary to write normalize data to the original picture memory 2 and further, the multiplication processing of normalize can be executed without passing through a program. Thus, data processing can be executed at the high speed and when it is desired to display the picture immediately after the picture data is measured, the waiting time is not required and diagnosis can be made smooth.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention reads original image data from an original image memory,
The present invention relates to an image data processing device that performs normalization processing and transfers the normalized data to a display memory.

[Conventional technology]

For example, in an image data processing apparatus using a 16-bit CPU, the gradations of image data (density values of pixels) to be processed range from 0 to 32767 (when only positive integers are considered). However, the number of gradations that can be displayed by a display device such as a TV monitor that displays image data is considerably lower than that.

For example, from 0 to 255. Therefore, the image data must be converted from the above 32,768 gradations to 256 gradations, and the image data is subjected to normalization processing.

The normalization process in a conventional image data processing apparatus, for example, an image data processing apparatus for a nuclear medicine apparatus, is performed as follows. In other words, in Figure 2, CPUI
reads the image data (M image data) pixel by pixel from the original image memory, here CPU memory 2, calculates the maximum and minimum values of the image data using a size comparison program, and then reads the image data from the CPU memory 2 again. Read out one pixel at a time, and divide by using the value obtained by subtracting the minimum value from the maximum value of the image data found earlier as the divisor.

Normalize processing is performed using a multiplication program. and,
Normalize data (post-processed data) to CPU memory 2
After writing is completed, the normalized data in the CPU memory 2 is transferred to the display memory 3 and displayed as an image on the display device 4.

Problems to be solved by invention C] In such a conventional device, when performing normalization processing,
to display memory 3 as described above.

Before actually transferring data, C
Image data is read to PUI twice (twice when executing the size comparison program and twice when executing the division 2 multiplication program)
There is one write from the CPU I to the CPU memory 2. For this reason, it takes a long time from the start of the normalization process to the end of writing the normalization data to the display memory 4. Especially, even if you want to display the image immediately after measuring the image data, there is a long waiting time. There was a problem in that diagnosis was not carried out smoothly.

The purpose of the present invention is to speed up data processing from the start of normalization processing to the end of writing normalized data to display memory, and in particular, to facilitate one diagnosis without the need for waiting time when it is desired to immediately display an image after measuring image data. It is an object of the present invention to provide an image data processing device that can achieve a

[Means to solve the problem]

The above purpose is to transfer the original image data read from the original image memory to the display memory in an image data processing device that reads original image data from the original image memory, performs normalization processing, and transfers the normalized data to the display memory. This is achieved by providing a normalization processing circuit therein for performing normalization processing.

[Effect]

The normalization processing circuit performs normalization processing while transferring the original image data read from the original image memory to the display memory. That is, in the present invention, normalization processing is performed by hardware called a normalization processing circuit while the original image data is being transferred to the display memory. This allows the image data to be read from the original image memory to the CPU only once when determining the maximum and minimum values of the image data, and there is no need to write normalized data to the original image memory. Processing can be performed without using a program, so data can be processed at a higher speed, and especially when it is desired to immediately display an image after measuring image data, no waiting time is required, making it possible to facilitate diagnosis.

〔Example〕

Hereinafter, the present invention will be described in detail with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of a data processing device according to the present invention, and numerals 5 to 7 in the figure are registers. 8 is a normalization processing circuit, which includes a subtracter 8a and a multiplier 8.
8c and a shifter 8d. In addition, 1 to 4 are the second
It is similar to the figure. In this case, a 16-bit CPU is used as the CPU, and the gradations of the image data (density values of pixels) to be normalized are 0 to 3276.
It is assumed that there are up to 32768 of 7.

Next, the operation will be explained.

First, the CPU reads the image data to be normalized (original image data) from the CPU memory 2 pixel by pixel, and at that time, compares the values of the image data (
Find the maximum and minimum values of the concentration values. The CPUI stores the minimum value in register 5 and also removes the maximum value of gradation, 32767, by (maximum value - minimum value), resulting in (32
767÷(maximum value - minimum value)) is stored in register 6,
Further, the arbitrarily set maximum value of the gradation after normalization processing (255 in the case of 256 gradations from 0 to 255) is stored in the register 7.

When numerical values are stored in each register as described above, the CPU
Image data for one pixel is transferred from the memory 2 to the display memory 3.

During this time, for each image data (original image data Di),
First, the subtracter 8 that constitutes the first stage of the normalization processing circuit 8
At a, the minimum value is subtracted from the value of the original image data D1. Next, in the multiplier 8b, [subtracter 8a
subtracted value] × [value stored in register 6) ((3276
7÷(maximum value-minimum value))) is calculated, and the multiplier 8c calculates the product of the multiplied value and the arbitrarily set maximum value of the gradation after normalization processing. The multiplied value is sent to the shifter 8 that constitutes the final stage of the normalization processing circuit 8.
d by 15 bits, and the shift result value by the shifter 8d is stored in the display memory 6 as normalized data (data after normalization processing).

By performing these processes on all image data (pixels) of one image, a normalized image is displayed on the display device 4.

Note that when dividing the output value of the subtractor 8a (value of original image data D1 - minimum value) by (maximum value - minimum value), 32767 (
This is the case for 32768 gradations from 0 to 32767, and the reason for multiplying by the numerator value of the illustrated stored value of register 6 is as follows. That is, in the division process here, there is a case where the following is true. In this case, all the division results become O, and the normalization process within the data value range of the entire original image data D1 becomes impossible. To avoid this,
(value of original image data D1 - minimum value) is 32767 (0 to 32
This is because it is only necessary to multiply by (in the case of 32768 gradations of 767).

Also, shifter 8d shifts 15 bits.

Due to the following reasons. That is, 32767 for the reasons mentioned above.
Because of the multiplication process, 3276
It is necessary to divide by 7, but it is difficult to configure this division circuit using hard logic. Therefore, by dividing by 32768, which is just 1 added to 32767, which is a power of 2, the value obtained by dividing by 32767 can be obtained using only a shift circuit (shifter 8d) without configuring a division circuit. This is because the value can be obtained.

According to the above-mentioned embodiment, since division and squaring are enabled in the normalization process using hard logic, the normalization process can be performed during the transfer of image data from the original image memory 2 to the display memory 3, which is faster than conventional devices. Data processing (data processing from the start of normalization processing to the end of writing normalization data to the display memory) becomes faster. Data processing can also be speeded up by reducing the number of times image data is transferred between the CPU I and the CPU memory 2 (two times in the conventional device, once in the above embodiment).

In the above-mentioned embodiment, the normalization processing circuit 8 is composed of the subtracter 8a, the multipliers 8b and 8c, and the shifter 8d, but it is needless to say that the normalization processing circuit 8 is not limited to this.

〔Effect of the invention〕

As explained above, according to the present invention, since a normalization processing circuit is provided that performs normalization processing while the original image data read from the original image memory is transferred to the display memory, normalized data is transferred to the display memory from the start of the normalization processing. Data processing up to the end of writing can be speeded up, and in particular, when it is desired to immediately display an image after measuring image data, no waiting time is required and diagnosis can be made more smoothly.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the device of the present invention, and FIG. 2 is a block diagram of a conventional device. 1...CPU, 2...Original image memory, 3...Display memory, 4...Display, 5-7...
register. 8... Normalization processing circuit, 8a... Subtractor, 8
b. 8c...multiplier, 8d...shifter.

Claims (1)

[Claims] 1. In an image data processing device that reads original image data from the original image memory, performs normalization processing, and transfers the normalized data to the display memory, during the transfer of the original image data read from the original image memory to the display memory. An image data processing device comprising a normalization processing circuit that performs normalization processing.