JPH02277384A - Brightness signal processing circuit for magnetic recording and playback equipment - Google Patents

Abstract

PURPOSE:To prevent the malfunction of a synchronizing separator circuit occurring by locating a high-pass filter circuit and a limiter circuit of detail enhanser system at the rear stage of a clamping circuit, and applying the output signal of the clamping circuit on the synchronizing separator circuit via a second low-pass filter circuit. CONSTITUTION:A first LPF circuit 4 is connected to an adder circuit 6 for DE, and an HPF circuit 5 for DE connected to the clamping circuit 8 is connected to the adder circuit 8, and also, the clamping circuit 8 is connected to the synchronizing separator circuit 16. At such a case, since the HPF circuit 5 and the limiter circuit 7 of DE system are located at the rear stage side of the clamping circuit 8 and also, the output signal of the clamping circuit 8 is applied on the synchronizing separator circuit 16 via the second LPF circuit 9, it is possible to eliminate the danger of the malfunction of the synchronizing separator circuit 16 due to a noise.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a luminance signal processing circuit for a magnetic recording/reproducing device.

2. Description of the Related Art During recording and playback in a conventional magnetic recording and playback device (VTR), small signal components at high frequencies tend to disappear. This is due to the frequency characteristics of the electromagnetic conversion system of the magnetic head, and if this happens, it becomes impossible to obtain a high quality reproduced image. Therefore, a detail enhancer (hereinafter referred to as DE) is provided to emphasize and record high frequency components.

To explain this with reference to FIG.
Since the gain of the amplifier is automatically adjusted by the AGC control voltage sent from the AGC circuit 2, an output with a constant amplitude can be taken out from the AGC circuit 2.

A first low-pass filter (hereinafter referred to as LPF) circuit 4 that receives the output signal of the AGC circuit 2 removes the chroma signal component and outputs only the luminance signal component, and this output signal is
The signal is applied to an EE high-pass filter (hereinafter referred to as HPF) circuit 5 and a DEE adder circuit 6. DE HPF circuit 5
The output signal of is applied to the DE limiter circuit 7, and the output signal of the limiter circuit 7 is added to the output signal of the LPF circuit 4 by the adder circuit 6. The output signal of the adder circuit 6 is applied to the clamp circuit 8, and the output signal of the clamp circuit 8 is applied to the second L
The signal is applied to a PF circuit 9, an HPF circuit 10 for non-linear emphasis (hereinafter referred to as NLE), and an adder circuit 11 for NLE. Then, the output signal of the NLE HPF circuit 10 is applied to the NLE limiter circuit 12, and is applied to the adder circuit 11, where it is added to the output signal of the clamp circuit 8.

The output signal of the adder circuit 11 for NLE is sent to the emphasis circuit 1.
3, and the output signal of the emphasis circuit 13 is FM
is applied to the modulation circuit 14, and its output signal is applied to the output terminal 15.
It is taken out. Further, the output signal of the second LPF circuit 9 is applied to the sync separation circuit 16, and the sync signal pulse taken out from the sync separation circuit 16 is sent to the delay pulse generation circuit 17.
and the output signal of the delayed pulse generation circuit 17 is applied to AG.
applied to the C detection circuit 3, and the AG from the AGC detection circuit 3
A C control voltage is applied to the AGC circuit 2.

The second LPF circuit 9 is for removing high frequency components so that the synchronization separation circuit 16 does not malfunction due to noise.

Problems to be Solved by the Invention With this configuration, small signal components at high frequencies can be emphasized, but when a DE is inserted before the clamp circuit as described above, the S/N ratio of the input signal increases. In the case of a weak electric field signal with a low value, the noise component is also emphasized, so that the effect of the second LPF for noise removal is weakened, causing a problem in that the synchronization separation circuit is likely to malfunction.

Means for Solving the Problems According to the present invention, a low-pass filter circuit that extracts only the luminance signal component is connected to an AGC circuit that inputs a video signal during recording, and a clamp connected to the low-pass filter circuit. A detail enhancer limiter circuit is connected to the circuit via a detail enhancer high-pass filter circuit, and the limiter circuit and the clamp circuit are connected to the detail enhancer limiter circuit.
While connecting an adder circuit that adds the output signals of both circuits,
A second low-pass filter circuit is connected between the clamp circuit and the synchronous separation circuit.

Function: With this configuration, the detail enhancer system's high-pass filter circuit and limiter circuit are located after the clamp circuit, and the output signal of the clamp circuit is
Since the signal is applied to the sync separation circuit through the low-pass filter circuit of , it is possible to eliminate the risk of the sync separation circuit malfunctioning due to noise components.

Embodiment The circuit configuration of FIG. 1 showing an embodiment of the present invention differs from the conventional circuit configuration shown in FIG. and the DE HPF circuit 5 connected to the clamp circuit 8.
is connected to the adder circuit 6 via the DE limiter circuit 7, and the clamp circuit 8 is connected to the synchronous separation circuit 16 via the second LPF circuit 9.

In this case, DE system HPF circuit 5 and limiter circuit 7
is located after the clamp circuit 8, and the output signal of the clamp circuit 8 is applied to the synchronous separation circuit 16 through the second LIF circuit 9, so the synchronous separation circuit 16 may malfunction due to noise components. Hazards can be eliminated.

Effects of the Invention As described above, according to the present invention, the sync separation circuit and The AGC circuit system can be driven stably.

[Brief explanation of drawings]

FIG. 1 is a block diagram of a luminance signal processing circuit embodying the present invention, and FIG. 2 is a block diagram of a conventional luminance signal processing circuit. 2...AGC circuit, 3...AGC detection circuit, 4...First low-pass filter circuit, 5
...High-pass filter circuit, 6... Adder circuit, 7... Limiter circuit, 8...
Clamp circuit, 9...Second low-pass filter circuit.

Claims (1)

[Claims] A low-pass filter circuit for extracting only the luminance signal component is connected to the AGC circuit that inputs the video signal during recording, and a high-pass filter circuit for detail enhancer is connected to the clamp circuit connected to the low-pass filter circuit. A limiter circuit for a detail enhancer is connected through the limiter circuit, and an adder circuit for adding the output signals of both circuits is connected to the limiter circuit and the clamp circuit. A brightness signal processing circuit for a magnetic recording and reproducing device, characterized in that it is formed by connecting a low-pass filter circuit.