JPH02278972A - digital television receiver - Google Patents

digital television receiver

Info

Publication number
JPH02278972A
JPH02278972A JP1099247A JP9924789A JPH02278972A JP H02278972 A JPH02278972 A JP H02278972A JP 1099247 A JP1099247 A JP 1099247A JP 9924789 A JP9924789 A JP 9924789A JP H02278972 A JPH02278972 A JP H02278972A
Authority
JP
Japan
Prior art keywords
channel
video data
memory
picture
area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1099247A
Other languages
Japanese (ja)
Inventor
Susumu Suzuki
進 鈴木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP1099247A priority Critical patent/JPH02278972A/en
Publication of JPH02278972A publication Critical patent/JPH02278972A/en
Pending legal-status Critical Current

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  • Television Systems (AREA)
  • Dram (AREA)
  • Image Input (AREA)
  • Digital Computer Display Output (AREA)
  • Studio Circuits (AREA)

Abstract

PURPOSE:To provide special effect to a picture at changeover of channel by changing a write area of a video data into a frame memory based on a detection signal of a channel changeover detection circuit from part of the memory area to all memory areas as a time elapses. CONSTITUTION:The receiver is provided with a channel changeover detection circuit 21 and a memory controller 23 and when a channel of a tuner 1 is changed over, the channel switching detection circuit 21 detects it and the memory controller 23 changes the write area of a video data into a frame memory 9 from part of the areas fo all the areas as time elapses based on the detection signal. Thus, a display pattern of a corresponding display section 17 displays a picture of the channel before changeover as a still picture and the picture of the channel after the changeover is displayed to the part of the areas of the still picture as a moving picture. Then the display area of the moving picture reaches the entire areas of the display section while being expanded as the time elapses. Thus, the change in the picture at channel changeover is enjoyed.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、チャンネル切り換え時に、切り換え画像に特
殊効果を持たせるようにしたデジタルテレビジョン受像
機に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a digital television receiver in which a special effect is given to a switching image when switching channels.

[従来の技術] 最近、信号処理系にデジタル技術を応用したデジタルテ
レビジョン受像機(例えば、EDTV(Eスtende
d Dafinition Te1evision)受
像機)が注目されている。このようなデジタルテレビジ
ョン受像機では1画質の向上と性能の安定化が図られ、
また、画面静止機能、ピクチャ・イン・ピクチャ機能な
ど今までのアナログテレビジョン受像機ではできなかっ
た機能を持つものが開示されているが、チャンネル切り
換え時には、アナログテレビジョン受像機と同様に、選
択されたチャンネルの画像が瞬時に切り換え表示されて
いた。
[Prior Art] Recently, digital television receivers that apply digital technology to the signal processing system (for example, EDTV (Estende
d Definition Television) television receivers) are attracting attention. These digital television receivers have been designed to improve image quality and stabilize performance.
In addition, it has been disclosed that it has functions that were not possible with conventional analog television receivers, such as a screen freeze function and a picture-in-picture function. The images of the selected channels were displayed and changed instantly.

[発明が解決しようとする課題] 上述のように、従来のデジタルテレビジョン受像機には
、チャンネル切り換え時に画像を変化させる機能がなか
ったので、視聴者にチャンネル切り換え時の画像変化を
楽しませることができないという問題点があった。
[Problems to be Solved by the Invention] As mentioned above, conventional digital television receivers did not have a function to change the image when changing channels. The problem was that it was not possible.

本発明は上述の問題点に鑑みなされたもので、チャンネ
ル切り換え時の画像に特殊効果を持たせたデジタルテレ
ビジョン受像機を提供することを目的とするものである
The present invention was made in view of the above-mentioned problems, and it is an object of the present invention to provide a digital television receiver that provides special effects to images when changing channels.

[課題を解決するための手段] 本発明は、アンテナで受信し、チューナで選局した映像
信号をA/D変換回路でデジタルの映像データに変換し
、この映像データをフレームメモリに書き込み、このフ
レームメモリから読み出した映像データをD/A変換回
路でアナログの映像信号に変換し1表示部で表示するよ
うにしたデジタルテレビジョン受像機において、前記チ
ューナのチャンネル切り換えを検出するチャンネル切換
検出回路と、このチャンネル切換検出回路の検出出力信
号に基づいて、前記フレームメモリへの映像データの書
き込み領域を時間の経過とともに一部のメモリ領域から
全部のメモリ領域へ変化させるメモリコントローラとを
具備してなることを特徴とするものである。
[Means for Solving the Problems] The present invention converts a video signal received by an antenna and selected by a tuner into digital video data by an A/D conversion circuit, writes this video data to a frame memory, In a digital television receiver in which video data read from a frame memory is converted into an analog video signal by a D/A conversion circuit and displayed on one display section, a channel switching detection circuit detects channel switching of the tuner. , and a memory controller that changes an area for writing video data into the frame memory from a part of the memory area to the entire memory area over time based on the detection output signal of the channel switching detection circuit. It is characterized by this.

[作用] チューナで所定のチャンネルが選局されたときは、この
選局チャンネルの1フレ一ム分の映像データがフレーム
メモリの全部のメモリ領域に順次書き込まれるとともに
順次読み出され、表示部で選局チャンネルの動画が表示
される。ここで、チューナのチャンネルを切り換えると
、チャンネル切換検出回路がこれを検出し、検出信号を
出力する。すると、この検出信号に基づいて、メモリコ
ントローラは、フレームメモリへの映像データの書き込
み領域を時間の経過とともに一部の領域から全部の領域
へ変化させる。このため、対応する表示部の表示画面は
、切り換え前のチャンネルの画像を静止画として表示し
、この静止画の一部の領域に切り換え後のチャンネルの
画像を動画として表示する。そして、この動画の表示領
域は1時間の経過とともに拡大し1表示部の全領域に達
する。
[Function] When a predetermined channel is selected by the tuner, the video data for one frame of the selected channel is sequentially written to all memory areas of the frame memory and sequentially read out, and displayed on the display section. The video of the selected channel will be displayed. Here, when the tuner channel is switched, the channel switching detection circuit detects this and outputs a detection signal. Then, based on this detection signal, the memory controller changes the write area of the video data into the frame memory from a part of the area to the entire area over time. Therefore, the display screen of the corresponding display section displays the image of the channel before switching as a still image, and displays the image of the channel after switching as a moving image in a part of the still image. The display area of this moving image expands over the course of one hour and reaches the entire area of one display section.

[実施例] 第1図は本発明によるデジタルテレビジョン受像機の一
実施例を示すものである。この図において、1はアンテ
ナ3で受信した複数のカラーテレビ信号の中から所定の
カラーテレビ信号を選局するチューナである。このチュ
ーナ1の出力側には、選局テレビ信号をデジタルの映像
データに変換するA/D(アナログ・デジタル)変換回
路5が結合され、このA/D変換回路5の出力側は、輝
度信号と色信号を分離するY/C分離回路や輝度信号処
理回路や色信号処理回路などからなるビデオ信号処理回
路7を介して、1フレ一ム分の映像データをストアする
フレームメモリ9に結合されている。このフレームメモ
リ9の出力側には、走査線補間をするための倍速変換回
路11.映像データをアナログの映像信号に変換するD
/A(デジタル・アナログ)変換回路13、マトリック
ス回路15および表示部としてのCRT17が順次結合
されている。
[Embodiment] FIG. 1 shows an embodiment of a digital television receiver according to the present invention. In this figure, reference numeral 1 denotes a tuner that selects a predetermined color television signal from among a plurality of color television signals received by an antenna 3. The output side of this tuner 1 is coupled with an A/D (analog/digital) conversion circuit 5 that converts a selected TV signal into digital video data, and the output side of this A/D conversion circuit 5 is connected to a luminance signal. The video signal is connected to a frame memory 9 that stores video data for one frame through a video signal processing circuit 7 that includes a Y/C separation circuit that separates color signals, a luminance signal processing circuit, and a color signal processing circuit. ing. On the output side of the frame memory 9, there is a double speed conversion circuit 11 for performing scanning line interpolation. Converting video data to analog video signals D
A /A (digital-to-analog) conversion circuit 13, a matrix circuit 15, and a CRT 17 serving as a display section are sequentially connected.

21は前記チューナ1におけるチャンネルの切り換えを
検出し、検出信号を出力するチャンネル切換検出回路で
ある。23は前記フレームメモリ9の読み書きを制御す
るメモリコントローラである。前記メモリコントローラ
23は、所定チャンネル受信中であって前記チャンネル
切換検出回路21からの検出出力信号がないときは、前
記ビデオ信号処理回路7からの映像データを順次前記フ
レームメモリ9に書き込むとともに、この書き込まれた
映像データを順次読みだし、チャンネル切り換え時には
、前記チャンネル切換検出回路21からの検出出力信号
に基づいて、切り換え前のチャンネルの映像データを前
記フレームメモリ9にストアして繰返し同じデータを読
みだすとともに、切り換え後のチャンネルの映像データ
を前記フレームメモリ9の一部の領域に順次書き込むと
ともに、この書き込まれたデータを順次読みだし、さら
に、この読み書き領域を時間の経過とともに広げていく
ように制御するものである。
Reference numeral 21 denotes a channel switching detection circuit that detects channel switching in the tuner 1 and outputs a detection signal. A memory controller 23 controls reading and writing of the frame memory 9. When a predetermined channel is being received and there is no detection output signal from the channel switching detection circuit 21, the memory controller 23 sequentially writes the video data from the video signal processing circuit 7 into the frame memory 9, and The written video data is read out sequentially, and when switching channels, the video data of the channel before switching is stored in the frame memory 9 based on the detection output signal from the channel switching detection circuit 21, and the same data is repeatedly read. At the same time, the video data of the channel after switching is sequentially written in a part of the area of the frame memory 9, and the written data is sequentially read out, and furthermore, this read/write area is expanded over time. It is something to control.

つぎに、前記実施例の作用について説明する。Next, the operation of the above embodiment will be explained.

所定のチャンネルAを受信しているときには、従来例と
略同様に作用し、CRT17は、第2図(a)に示すよ
うに、ノンインターレース方式による高画質の動画を表
示する。チャンネル切り換え時には、チャンネル切換検
出回路21から検出信号が出力する。すると、メモリコ
ントローラ23は、チャンネル切換検出回路21からの
検出出力信号に基づいて、次のように、フレームメモリ
9の読み書き制御をする。
When receiving a predetermined channel A, the CRT 17 operates in substantially the same manner as the conventional example, and the CRT 17 displays a high-quality moving image using a non-interlaced method, as shown in FIG. 2(a). At the time of channel switching, a detection signal is output from the channel switching detection circuit 21. Then, the memory controller 23 controls reading and writing of the frame memory 9 based on the detection output signal from the channel switching detection circuit 21 as follows.

(イ)まず、切り換え直前にフレームメモリ9に書き込
まれたチャンネルAの映像データをストアした後、これ
を繰返し読みだす、このため、CRT17は切り換え直
前のチャンネルAの映像に対応する静止が表示する。
(B) First, the video data of channel A written in the frame memory 9 immediately before switching is stored and then read out repeatedly. Therefore, the CRT 17 displays a still image corresponding to the video of channel A immediately before switching. .

(ロ)ついで、切り換え後のチャンネルBの映像データ
を、表示画面の中央部に対応するフレームメモリ9の一
部の領域に順次書き込む、この書き込まれたデータは、
まだ書き換えられていないチャンネルAのデータととも
に読みだされる。このため、CRT17は、第2図(b
)に示すように、切り換え直前のチャンネルAの静止画
の中央部の小さな領域にチャンネルBの動画を表示する
(b) Next, the video data of channel B after switching is sequentially written into a part of the frame memory 9 corresponding to the center of the display screen.
It is read out together with the data of channel A that has not yet been rewritten. For this reason, the CRT 17 is
), the moving image of channel B is displayed in a small area in the center of the still image of channel A immediately before switching.

(ハ)時間の経過とともに、フレームメモリ9へのチャ
ンネルBの映像データの書き込み領域が広くなり、これ
に伴ってチャンネルAのデータがストアされている領域
が狭くなる。このため、CRT17は、第2図(c)に
示すように、切り換え直前のチャンネルAの静止画の中
央部の大きな領域にチャンネルBの動画を表示する。
(c) As time passes, the area in which channel B video data is written to the frame memory 9 becomes wider, and the area in which channel A data is stored becomes narrower. Therefore, the CRT 17 displays the moving image of channel B in a large area in the center of the still image of channel A immediately before switching, as shown in FIG. 2(c).

(ニ)そして、所定時間が経過すると、フレームメモリ
9の全領域にチャンネルBの映像データが書き込まれ、
チャンネルAのデータがストアされている領域が無くな
る。このため、CRT17は、第2図(d)に示すよう
に、切り換え後のチャンネルBの動画を全面に表示する
(d) Then, after a predetermined period of time has elapsed, the video data of channel B is written to the entire area of the frame memory 9,
The area where channel A data is stored disappears. Therefore, the CRT 17 displays the moving image of channel B after switching over the entire screen, as shown in FIG. 2(d).

前記実施例では、チャンネル切り換え後のチャンネルB
の動画は、まず、チャンネル切り換え前のチャンネルA
の静止画の中央部分に小さく表示し、このチャンネルB
の動画面が時間の経過とともに相似的に拡大するように
したが、本発明はこれに限るものでなく、チャンネルを
切り換えた場合、切り換え後のチャンネルの映像データ
のフレームメモリへの書き込み領域を、時間の経過とと
もに一部のメモリ領域から全部のメモリ領域へ変化させ
て、切り換え後のチャンネルの動画面が時間の経過とと
もに拡大し、切り換え前のチャンネルの静止画面が時間
の経過とともに縮小するものであればよい0例えば、第
3図(a) (b) (c) (d)に示すように、チ
ャンネルをAからBへ切り換えた場合、切り換え前のチ
ャンネルAの静止両面が時間の経過とともに相似的に縮
小し、消えていくようにしてもよい。
In the above embodiment, channel B after channel switching
The video first shows channel A before switching channels.
This channel B is displayed small in the center of the still image.
In this embodiment, the video screen expands similarly over time, but the present invention is not limited to this. When switching channels, the writing area of the video data of the channel after switching to the frame memory is The video screen of the channel after switching expands over time, and the still screen of the channel before switching shrinks over time by changing from a part of the memory area to the entire memory area over time. For example, when switching the channel from A to B as shown in Figure 3 (a) (b) (c) (d), the stationary surfaces of channel A before switching become similar over time. It may also be possible to shrink the image and make it disappear.

[発明の効果] 本発明によるデジタルテレビジョン受像機は。[Effect of the invention] A digital television receiver according to the present invention.

上記のように、チューナのチャンネル切り換えを検出す
るチャンネル切換検出回路と、このチャンネル切換検出
回路の検出信号に基づいて、フレームメモリへの映像デ
ータの書き込み領域を時間の経過とともに一部のメモリ
領域から全部のメモリ領域へ変化させるメモリコントロ
ーラとを具備し、チャンネルを切り換えると、切り換え
前のチャンネルの映像画面が静止し、切り換え後のチャ
ンネルの動画面が時間の経過とともに拡大するようにし
たので、切り換え後のチャンネルの動画面が瞬時に表示
されていた従来例と比べて、チャンネル切り換え時にお
ける画像に特殊効果を持たせることができ、視聴者にチ
ャンネル切り換え時の画像変化を楽しませることができ
る。
As mentioned above, based on the channel switching detection circuit that detects the channel switching of the tuner and the detection signal of this channel switching detection circuit, the writing area of the video data to the frame memory is changed over time from a part of the memory area. Equipped with a memory controller that changes all memory areas, when switching channels, the video screen of the channel before switching becomes static, and the video screen of the channel after switching expands over time, so switching Compared to the conventional example in which the video screen of the next channel is displayed instantly, it is possible to give a special effect to the image when switching channels, and it is possible for viewers to enjoy the change in the image when switching channels.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明によるデジタルテレビジョン受像機の一
実施例を示すブロック図、第2図は第1図の作用を説明
する説明図、第3図は他の実施例の作用を説明する説明
図である。 1・・・チューナ、3・・・アンテナ、5・・・A/D
変換回路、9・・・フレームメモリ、13・・・D/A
変換回路。 17・・・CRT(表示部)、21・・・チャンネル切
換検出回路、23・・・メモリコントローラ。 出願人  株式会社富士通ゼネラル
FIG. 1 is a block diagram showing an embodiment of a digital television receiver according to the present invention, FIG. 2 is an explanatory diagram explaining the operation of FIG. 1, and FIG. 3 is an explanatory diagram explaining the operation of another embodiment. It is a diagram. 1...Tuner, 3...Antenna, 5...A/D
Conversion circuit, 9... Frame memory, 13... D/A
conversion circuit. 17...CRT (display unit), 21...Channel switching detection circuit, 23...Memory controller. Applicant Fujitsu General Ltd.

Claims (1)

【特許請求の範囲】[Claims]  アンテナで受信し、チューナで選局した映像信号をA
/D変換回路でデジタルの映像データに変換し、この映
像データをフレームメモリに書き込み、このフレームメ
モリから読み出した映像データをD/A変換回路でアナ
ログの映像信号に変換し、表示部で表示するようにした
デジタルテレビジョン受像機において、前記チューナの
チャンネル切り換えを検出するチャンネル切換検出回路
と、このチャンネル切換検出回路の検出信号に基づいて
、前記フレームメモリへの映像データの書き込み領域を
時間の経過とともに一部のメモリ領域から全部のメモリ
領域へ変化させるメモリコントローラとを具備してなる
ことを特徴とするデジタルテレビジョン受像機。
The video signal received by the antenna and tuned by the tuner is
/D converter circuit converts the video data into digital video data, writes this video data into frame memory, and D/A converter circuit converts the video data read from the frame memory into an analog video signal, which is displayed on the display unit. In the digital television receiver, a channel change detection circuit detects a channel change of the tuner, and a write area of video data in the frame memory is changed over time based on a detection signal of the channel change detection circuit. What is claimed is: 1. A digital television receiver comprising: a memory controller that changes from a part of the memory area to the entire memory area;
JP1099247A 1989-04-19 1989-04-19 digital television receiver Pending JPH02278972A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1099247A JPH02278972A (en) 1989-04-19 1989-04-19 digital television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1099247A JPH02278972A (en) 1989-04-19 1989-04-19 digital television receiver

Publications (1)

Publication Number Publication Date
JPH02278972A true JPH02278972A (en) 1990-11-15

Family

ID=14242373

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1099247A Pending JPH02278972A (en) 1989-04-19 1989-04-19 digital television receiver

Country Status (1)

Country Link
JP (1) JPH02278972A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04362880A (en) * 1991-06-10 1992-12-15 Sharp Corp Television receiver equipped with multiscreen display function

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5566181A (en) * 1978-11-13 1980-05-19 Nec Home Electronics Ltd Double-screen display television picture receiver
JPS6152080A (en) * 1984-08-20 1986-03-14 Sharp Corp Television receiver

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5566181A (en) * 1978-11-13 1980-05-19 Nec Home Electronics Ltd Double-screen display television picture receiver
JPS6152080A (en) * 1984-08-20 1986-03-14 Sharp Corp Television receiver

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04362880A (en) * 1991-06-10 1992-12-15 Sharp Corp Television receiver equipped with multiscreen display function

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