JPH02280691A - Driving method and device for pulse width modulating system - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a driving method and a driving device for controlling a driving current using pulse width control, and includes, for example, optical recording and
The present invention relates to a pulse width modulation drive method and drive device used as a drive device for an actuator or the like of a reproduction device.

[Conventional technology]

For example, in an optical recording/reproducing apparatus, tracking control and focus control of a light spot narrowed to a minute diameter are performed on a disk, which is an information recording medium.

Conventionally, in this optical recording/reproducing device, there has been a demand for miniaturization and power saving. A drive device using a modulation method has been proposed.

In a servo device using this pulse width modulation drive device, for example, as shown in FIG. A servo amplifier 8 is installed before the device 6. Therefore, the servo output signal ■, amplified by the servo amplifier 8, is applied to the PWM drive device 6, and the PWM drive device 6 compares the servo output signal ■, with the triangular wave signal as the basic waveform signal, and determines the displacement. In order to move or stabilize the actuator 2 to a target position in response to a signal, an actuator current 1. is used as a drive current whose direction and magnitude are controlled. is supplied to the actuator 2.

[Problems to be Solved by the Invention] Incidentally, in such a pulse width modulation drive device, the actuator can be controlled with high precision by forming a desired control output from an electrical signal corresponding to the mechanical displacement of the actuator. Therefore, errors and hazards occur during pulse processing for pulse width control, which causes a decrease in accuracy.

In addition, in this pulse width control drive device, a triangular wave signal is formed, and when this triangular wave signal and the servo output signal are compared, the control is on the half wave side of the triangular wave signal. It is necessary to increase the frequency, and it is necessary to set the frequency of the clock pulse as the basic signal higher, which increases power consumption.

Therefore, the first object of the present invention is to provide a pulse width modulation driving method that achieves miniaturization, power saving, and high precision.

A second object of the present invention is to provide a pulse width modulation drive device that achieves miniaturization, power saving, and high precision.

Furthermore, a third object of the present invention is to provide a pulse width modulation drive device that achieves higher efficiency.

[Means for Solving the Problems] That is, the pulse width modulation driving method of the present invention has the following features:
In order to achieve the above object, a first switching element pair switches the direction of the drive current flowing through the load, and a second switching element pair changes the magnitude of the drive current according to a pulse width modulation signal.
Equipped with a switch circuit that connects a pair of switching elements,
The input signal is corrected based on the absolute value of the drive current flowing through the load to be driven, and the corrected input signal is compared with a reference voltage to form a polarity determination signal representing the direction of the drive current flowing through the load, and the correction is performed. A pulse width modulated signal having a pulse width corresponding to the input signal is formed by comparing the triangular wave signal and the triangular wave signal, and comparing the triangular wave signal and the reference voltage. The present invention is characterized in that the direction of the drive current to the load is switched accordingly, and the drive current is supplied to the load in accordance with the pulse width modulation signal.

Further, the pulse width modulation type driving device of the present invention has a second
In order to achieve the purpose of
a switching element pair connected thereto, and a second switching element pair that is selectively rendered conductive according to a pulse width modulation signal and that causes the drive current corresponding to the pulse width modulation signal to flow through the load. and input correction means for generating an input signal corrected by the absolute value of the drive current from the sui-nochi circuit, and first voltage comparison means for comparing the input signal and a reference voltage. a polarity determining means for generating a triangular wave signal, a triangular wave generating means for generating a triangular wave signal, a second voltage comparing means for comparing the triangular wave signal and the input signal, and a second voltage comparing means for comparing the triangular wave signal and the reference voltage. and a pulse width modulation means for generating the pulse width modulation signal in accordance with the comparison output generated by each voltage comparison means and the comparison output of the polarity determining means.

Furthermore, in order to achieve the third object, the pulse width modulation drive device of the present invention includes a first switching element pair that selectively conducts in accordance with a polarity determination signal to switch the direction of the drive current to the load. an input signal; A polarity determination means that includes a first voltage comparison means that compares the voltage with a reference voltage and generates a polarity determination signal, and a triangular wave generation means that generates a triangular wave signal and an inverted triangular wave signal, and compares the triangular wave signal and the input signal. a second voltage comparing means for comparing the triangular wave signal and the reference voltage;
voltage comparing means, fourth voltage comparing means for comparing the inverted triangular wave signal and the input signal, and fifth voltage comparing means for comparing the inverted triangular wave signal and the reference voltage; and pulse width modulation means for obtaining the pulse width modulation signal for the first pair of switching elements in accordance with the comparison output of the means.

[For production]

In the pulse width modulation driving method of the present invention, an input signal is corrected based on the absolute value of the drive current flowing through the load to be driven, and a polarity indicating the direction of the drive current is determined by comparing the corrected input signal with a reference voltage. A discrimination signal is formed. Furthermore, a pulse width modulation signal having a pulse width corresponding to the input signal is formed by comparing the corrected input signal with the triangular wave signal and comparing the triangular wave signal with the reference voltage. Therefore, the direction of the drive current to the load is switched by the first pair of switching elements in accordance with the polarity discrimination signal, and the drive current in accordance with the pulse width modulation signal is applied to the load through the second pair of switching elements. By being supplied, the load is driven with a drive current that is pulse width modulated according to the input signal.

Further, in the pulse width modulation drive device of the present invention, an input signal such as a servo output is corrected by the input correction means according to the drive current flowing through the switch circuit, and the corrected input signal and the reference voltage are The voltage comparison means compares the input signal to determine the polarity of the input signal.

Further, in the pulse width modulation means, the triangular wave signal generated by the triangular wave generation means and the input signal are compared by the second voltage comparison means, and the triangular wave signal and the reference voltage are compared by the third voltage comparison means. , a pulse width modulated signal having a pulse width corresponding to each comparison output is obtained. In the switch circuit, the direction of the drive current to the load is determined by selectively conducting the first switching element pair in accordance with the polarity determination signal obtained by the polarity determination means, and
By selectively making the second switching element pair conductive using the pulse width modulation signal and controlling the conduction state, the drive current to the load is controlled. Therefore, the load is driven by a drive current based on a highly accurate pulse width modulation signal according to the input signal.

Furthermore, in the pulse width modulation drive device of the present invention,
A triangular wave generating means for generating a triangular wave signal and an inverted triangular wave signal is installed, a second voltage comparing means for comparing the triangular wave signal and the input signal, and a third voltage comparing means for comparing the triangular wave signal and the base voltage. , a fourth voltage comparison means for comparing the inverted triangular wave signal and the input signal, and a fifth voltage comparison means for comparing the inverted triangular wave signal and the reference voltage. If a pulse width modulation drive device is configured by the modulation means, pulse width modulation control is performed every half cycle of the triangular wave signal using the triangular wave signal and the inverted triangular wave signal generated by the triangular wave generating means, and control efficiency is improved.

(Embodiments) Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings.

FIG. 1 shows a first embodiment of a pulse width modulation driving method and driving device of the present invention.

An actuator 12 is installed between the terminals 10a and 10b as a load to be driven by a pulse width modulated drive output, and an actuator current 1. A switch circuit 14 is installed to allow the current to flow. This switch circuit 14 has an actuator current 1. A transistor 141.1 forming a first switching element pair that determines the direction of
42 is installed, and a transistor 143 forming a second switching element pair through which one actuator current flows as a controlled drive current to the actuator 12.
．． 144 is installed.

A resistor 145 is connected to the emitter side of the transistors 141 and 142, whose emitters are commonly connected to form a differential pair, as a current detection means for converting the actuator voltage [+□ into a voltage and detecting it. Furthermore, flywheel diodes 146 and 147 are connected in parallel between the collectors of each transistor 141 and 142 and ground. Therefore, by selectively controlling one of the transistors 141 and 142 to be conductive, the direction of the actuator current 11 is determined, and by selectively controlling the transistors 143 and 144 to be conductive, The switching current flowing through its base causes the actuator current 1. The value of is controlled. and,
The flywheel diodes 146 and 147 serve as means for absorbing reverse induced electromotive force generated in the actuator 12.

A servo output is applied to the input terminal 16 from a servo amplifier (not shown) as an input signal (2). This input signal ■ is applied to the input correction circuit 18 which corrects the level by the actuator current I.
8, the actuator voltage detected through resistor 145? ! ? An absolute value conversion circuit 181 is installed to switch the voltage representing the absolute value of Lt according to the polarity. This absolute value conversion circuit 181 includes a resistor 145 of the switch circuit 14.
Actuator current through! The voltage representing the absolute value of , is given a polarity corresponding to the pulse representing the polarity from the polarity determining section 19 to generate a correction voltage .

This correction voltage (2) is added to the adder 182 as a subtraction element, and the level of the input signal (2) is corrected by this correction voltage (2).

The input signal (2) corrected by this input correction circuit 18 is pulse-width-modulated with a pulse width according to the input signal (V), along with a polarity determining unit 19 that determines the polarity representing the increasing/decreasing direction of the input signal (2). It is applied to a pulse width modulation section 20 for forming a signal.

A comparator 21 is installed in the polarity determination unit 19 as a first voltage comparison means, and the comparator 21 determines the polarity, which is the direction of deflection of the input signal 5, by comparing the input signal 5 and the reference voltage V REF. be done. On the output side of the comparator 21, an impark 20 is provided as a logic circuit for obtaining first and second pulses PP2, which are polarity discrimination signals representing polarity, from the output pulses of the comparator 21.
1.202.203 are connected in series, and
An inverter 204 is installed.

Therefore, the input signal ■ applied to the positive phase input (+) side of the comparator 21 is compared with the reference voltage V REF applied to the negative phase input (=) side of the comparator 21, and from the comparison result, the inverters 201 to 203 through comparator 21
Pulse P8, which is an inverted pulse of the output pulse of
A pulse P2, which is the same as the output pulse 1, is obtained.

Further, the pulse width modulation section 20 is provided with comparators 22 and 23 as second and third voltage comparison means, and a triangular wave generation circuit 211 that generates a triangular wave signal VT as a reference waveform signal. There is. The triangular wave generating circuit 211 includes an integrating circuit 212 that integrates the clock pulse CLK applied to the input terminal 30 and converts it into a triangular wave signal (1). That is, the operational amplifier 21
A clock pulse CLK is applied to the negative phase input (-) side of No. 3 through a resistor 214, and an operational amplifier 213
The output of VME is fed back through a resistor 215 and a capacitor 216, and a reference voltage VME is connected to its positive phase input (+) side.
F is added.

The input signal Vs is applied to the positive phase human power (+) side of the comparator 21 and the negative phase human power (-) side of the comparator 22, and on the comparator 22 side, it is applied from the triangular wave generation circuit 211 to its positive phase input (+) side. The resulting triangular wave signal V is compared, and as a result of the comparison, a pulse as a pulse width modulated signal having a pulse width corresponding to both is obtained. Further, in the comparator 23, the triangular wave signal ■7 is applied to its positive phase input (+) side, and by comparison with the base $ voltage REF applied to its negative phase input (-) side, the triangular wave signal ■7 is applied to the comparator 23.
. A pulse representing the polarity of is obtained.

Then, on the output side of the comparators 22 and 23, the third and fourth pulses P:l as a pulse width modulation signal are output by combining each output pulse and the output pulse of the comparator 21.
, P4 is installed, i.e.,
An inverter 205.2 is connected to the output side of the comparator 22.
06 and NOR gate 207, and comparator 23
Inverters 20B, 209 and a NOR gate 210 are installed on the output side. Therefore, the NOR gate 207 receives the inverted output pulse from the comparator 21 side obtained through the inverter 201, and the inverted output pulse from the inverter 205.
A pulse P3 is obtained by the output pulse of the comparator 22 side obtained through the inverter 206 and the inverted output pulse of the comparator 23 obtained through the inverter 208.
In addition, the NOR game) 210 includes an inverter 201.2.
Output pulse of comparator 21 example obtained through 02, comparator 22 obtained through inverter 205
The example inverted output pulse, the output pulse of comparator 23 obtained through inverters 208 and 209, provides pulse P4.

Further, on the output side of the polarity determining section 19 and the pulse width modulating section 20, a drive circuit 40 that generates switching currents 81 to S4 as drive outputs corresponding to each pulse P1 to P is provided.
is installed, and an example of this drive circuit 40 is
As shown in the figure.

As shown in FIG. 2, the drive circuit 40 includes a first differential circuit in which the emitter sides of transistors 401 and 402, which are selectively rendered conductive by pulses P1 and P2 applied to input terminals 411 and 412, are commonly connected. A differential circuit 41 is installed, as well as second and third differential circuits 42 and 43 that are selectively rendered conductive by pulses P1 and P4 applied to input terminals 413 and 414.

A constant current source 403 is connected to the emitter side of transistors 401 and 402 of the differential circuit 41, and the differential circuit 42 is composed of transistors 404 and 405, and the differential circuit 43 is composed of transistors 406 and 407. . Transistors 408 and 409 are installed corresponding to each differential circuit 42 and 43, and by sharing their emitters, the differential circuit 40
is configured, and a constant current J! is applied to its emitter side. A41O is connected. A reference voltage V8 is applied to the bases of the transistors 405 and 407 of each differential circuit 42 and 43. Therefore, if the transistor 402 conducts during the high (H) level section of the pulse P+, a switching current S corresponding to the pulse P1 is obtained at the output terminal 421, and the transistor 402 conducts during the I (level section) of the pulse P2.
When conductive, a switching current S2 corresponding to the pulse P2 is generated at the output terminal 422. And pulse P3
If the transistor 404 is conductive during the H level section of pulse P4, the switching current 33 is sucked from the output terminal 423 side, and if the transistor 406 is conductive during the H level section of the pulse P4, the switching current S4 is sucked from the output terminal 424 side.
is absorbed.

In the above configuration, a pulse width modulation driving method will be described.

For example, as shown in A in FIG.
, the triangular wave generation circuit 211 receives the low level (L) of the clock pulse CLK, as shown in the third B.
), and a triangular wave signal (2) as a reference waveform signal that rises in the H level section and falls in the H level section is obtained.

Further, an input signal ■, whose level changes with the passage of time, is applied to the input terminal 16, and the input signal ■, which is corrected by the correction voltage ■1 by the input correction circuit 1B, is corrected to C in FIG. shows.

This input signal ■ is applied to the comparators 21 and 22, and on the comparator 21 side, it is compared with the reference voltage ■Ra, as shown in FIG. 3C, and on the comparator 22 side, it is compared with the triangular wave signal ■. be done.

Therefore, on the output side of the inverter 203 of the polarity determining section 19, the pulse P shown in D in FIG.
At the same time, a pulse P2 shown in FIG. 3 is obtained as a polarity discrimination signal on the output side of the inverter 204. Further, the pulse P shown in the third F is obtained on the output side of the inverter 206 of the pulse width modulation section 20, and the comparator 23 receives the triangular wave signal ■A and the reference voltage ■
21. As a result, a pulse P6 shown in G in FIG. 3 is generated on the output side of the impark 209.

The output side of the NOR gate 207 has input signals ■,
The output side of the NOR gate 210 has a pulse P shown in K in FIG. 3 whose pulse width is controlled to have a pulse width corresponding to the level of , and a pulse J shown in FIG. A pulse P4 shown in is obtained.

Therefore, referring to the drive circuit 40 shown in FIG.
When each of the pulses P1, P2, P3, and P4 is applied to the drive circuit 40, a switching current Sl is selectively generated in response to the pulse P+, a switching current S2 is selectively generated in response to the pulse P2, and a switching current S1 is selectively generated in response to the pulse P3. A switching current S4 is selectively generated in response to the switching current S3 and the pulse P4. That is, the switching current S
+ and Sz are polarity control outputs, and switching currents Si and Sa are control currents having current values according to the input signals .

Since the switching current S is applied to the base of the transistor 141 and the switching current S2 is applied to the base of the transistor 142, the transistor 141 is selectively turned on by the switching current SL, and the transistor 142 is selectively turned on by the switching current S2.

Further, the switching current S3 is sucked into the drive circuit 40 from the base of the transistor 143, and the switching current S4 is sucked into the drive circuit 40 from the base of the transistor 144. Therefore, the switching current S3 causes the transistor 143, and the switching current S4 causes the transistor 144. Conducts selectively.

Therefore, the transistor 141 has a switching current S
When conduction occurs due to I, the switching current S
, conducts and controls the transistor 144, so that an actuator current 1. flows in the actuator 12 from the terminal 10b to the terminal 10a, and the actuator current 1. The value depends on the switching current S4. Furthermore, when the transistor 142 is made conductive by the switching current S2, the transistor 143 is made conductive and controlled by the switching current S3, so that the actuator current 1. flows, and the value of the actuator current 11 corresponds to the switching current S. As a result, the actuator 12 can achieve stable control operation through pulse width modulation control according to the input signal s, and can be controlled with high precision.

Next, FIG. 4 shows a second embodiment of the pulse width modulation driving method and driving device of the present invention.

By the way, in the pulse width modulation type driving method and driving device of the first embodiment, a half cycle of one cycle of the clock pulse CLK is used to eliminate the DC offset, and it is undeniable that the efficiency decreases by that amount. do not have.

In addition, in such a pulse width modulation driving method and driving device, if the input signal (1) contains a high frequency component, the frequency of the clock pulse CLK must be set accordingly. First, if half a cycle is used to erase the DC offset, the frequency must be further increased, so there is a risk that the power efficiency will decrease as the frequency increases.

Therefore, in the pulse width modulation drive method and drive device of the second embodiment, full-wave pulse width modulation control is realized by using all cycles of the clock pulse CLK for the pulse width modulation side iff[I. It is something.

That is, between the terminals 10a and 10b, an actuator 12 is installed as a load to be driven by a pulse width modulation drive output, and a switch circuit 14 is installed that flows an actuator current 2 as a drive current to this actuator 12, and the circuit configuration is as follows: is the same as in the first embodiment.

A servo output from a servo amplifier (not shown) is applied to the input terminal 16 as an input signal (2), and its level is corrected by the input correction circuit 18. A voltage/current conversion circuit 183 is installed at the input section of the input correction circuit 18, and the input signal V given as a voltage is converted into a current 1. is converted to Further, the input correction circuit 18 is provided with an absolute value conversion circuit 181 that generates a correction current (■) that switches the current representing the absolute value of the actuator current 11 according to the polarity according to the level of the input signal (■). There is.

Correction current I, is added to adder 1B2 as a subtraction element, and current 1. The level of is the correction current I.

Corrected by

The current I corrected by this adder 182.

is applied to the current/voltage conversion circuit 184 and converted into a corrected input signal . This input signal ■ is resistor 1
85 and a capacitor 186, the integrated output is applied to a comparator 188 and compared with a reference voltage V REF, and the absolute value conversion circuit 181 is controlled based on the comparison result.

Then, the corrected input signal {circle around (2)} is processed by a polarity determination unit 19 that determines its polarity, which is the direction of increase or decrease, as in the first embodiment.
It is also applied to a pulse width modulation section 20 for forming a pulse width modulation signal having a pulse width according to the input signal (2).

A comparator 21 is installed in the polarity determination unit 19 as a first voltage comparison means, and the input signal V is its positive phase input (
+) side and is compared with a reference voltage V REF applied to its negative phase input (-) side. The polarity, which is the direction of swing of the input signal (2), is determined by comparing the input signal (2) with the reference voltage VREF, and a polarity determination signal is obtained. An inverter 22 is connected to the output side of this comparator 21.
0 is installed, the first pulse P is obtained by the inverted output pulse of the comparator 21, and the second pulse P2 is obtained by the output pulse of the comparator 21.

The pulse width modulation section 20 also includes comparators 22, 23, 2 as second, third, fourth, and fifth voltage comparing means.
4.25 is installed. The input signal (2) is a triangular wave signal V from the triangular wave generating circuit 211 applied to the negative phase input (+) side of the comparators 22 and 24, and on the comparator 22 side to its positive phase input (+) side. compared to
Further, on the comparator 24 side, it is compared with the inverted triangular wave signal (2) from the triangular wave generating circuit 211 applied to its positive phase input (+) side. The triangular wave generation circuit 211 generates, based on the clock pulse CLK applied to the input terminal 30, the triangular wave signal VT as well as an inverted triangular wave signal ■'' whose phase is shifted by 180 degrees.

Further, the comparator 23 receives the triangular wave signal (2) generated by the triangular wave generating circuit 211 and the reference voltage VREF, and obtains a pulse representing the polarity of the triangular wave signal (2).

Then, the inverted triangular wave signal ■7 and the reference voltage ■□ are applied to the comparator 25, and a pulse representing the polarity of the triangular wave signal ■A is obtained.

Then, on the output side of the comparators 22 to 25, third and fourth pulses P3, which are pulse width modulated signals obtained by combining each output pulse and the output pulse of the comparator 21, are provided.
A logic circuit is installed to obtain P4. That is, the NAND gate 2 is connected to the output side of the comparators 22 and 24.
31.232, OR gate 233 and AND gate 23
4. Also, on the output side of the comparators 23 and 25, NA
ND gate 241.242, OR gate 243, AND
A gate 244 and an inverter 245 are installed.

Therefore, the NAND gate 231 has a comparator 22
．． 23 output pulses are applied to the comparator 22 with the output pulses as inverted inputs, and the NAND gate 2
32, the output pulses of the comparators 24 and 25 are added with the output pulses of the comparators 24 as inverted inputs to obtain respective output pulses representing respective NANDs, and each output pulse is passed through an OR gate 233 to an AND gate. 234
has been added to. Therefore, in the AND gate 234, the pulse P4 is obtained by ANDing with the output pulse of the comparator 21.

The NAND gate 241 also includes a comparator 22.
The output pulse of NAND gate 24 is applied with the output pulse of comparator 23 side as the inverted input side.
2, the output pulses of the comparators 24 and 25 are added with the output pulse of the comparator 25 as the inverted input to obtain each output pulse representing each NAND, and each output pulse is passed through the OR gate 243 and input to the AND gate. It has been added to 244. Therefore, in AND gate 244, comparator 2 is applied through inverter 245.
Pulse P3 is obtained by ANDing with the inverted output pulse on the 1 side.

On the output side of the polarity determining section 19 and the pulse width modulating section 20, a drive circuit that generates switching currents S, ~S4 as drive outputs corresponding to the respective pulses P, ~P, as in the embodiment described above, is provided. 40 are installed. For this drive circuit 40, for example, the drive circuit shown in FIG. 2 can be used.

In the above configuration, a pulse width modulation driving method will be described.

For example, as shown in A in FIG. 5, when a clock pulse CLK with a duty ratio of 50% is applied to the input terminal 30 at a constant period, the triangular wave generation circuit 211 receives the signal CLK in FIG.
As shown in FIG. 5, a triangular wave signal ■ is obtained that rises in the L section of the clock pulse CLK and falls in the H section, and as shown in D in FIG.
An inverted triangular wave signal ■A is obtained which rises in the H section of K and falls in the L section.

Further, an input signal V whose level changes with the passage of time is applied to the input terminal 16, and is corrected by the input correction circuit 18 using a correction current IA, and the corrected input signal V is converted to B in FIG. show.

This input signal ■ is for each comparator 21.22.24
On the comparator 21 side, as shown in FIG. 5B, it is compared with the reference voltage V REF, on the comparator 22 side, it is compared with the triangular wave signal ``A'', and on the comparator 24 side, it is compared with the inverted triangular wave signal V''. Therefore, the pulse P1 shown in E in FIG. 5 is obtained as a polarity discrimination signal on the output side of the inverter 220 of the polarity discrimination section 19, and the pulse P1 shown as F in FIG. 5 is obtained on the output side of the comparator 21 as a polarity discrimination signal. A pulse P2 is obtained.The comparator 22 obtains a pulse P5 shown at J in FIG. 5, and the comparator 24 obtains a pulse P6 shown at G in FIG.

The comparator 23 is supplied with a triangular wave signal ■1 and a reference voltage ■1. is applied to the comparator 25, and the inverted triangular wave signal V' and the reference voltage V REF are applied to the comparator 25, so that the comparator 23 receives the pulse P shown in K in FIG.
, and the comparator 25 receives a pulse P8 which is an inversion of the pulse P shown in K in FIG.

Based on these pulses P5, P8, P7, Pll, the NAND gate 23 is connected to the combination of pulses P, P, P,
1 has a pulse P1, a pulse ph, P, shown at 0 in FIG.
The NAND gate 232 receives the pulse P I+1% pulse P5, P shown in FIG.
At the D gate 241, a combination of pulse pH, pulses Pi, .

Each pulse P 9 , P Il+ is then applied to an AND gate 234 via an OR gate 233, and
Each pulse PII, P1□ is applied to an AND gate 244 via an OR gate 243, so that the AND
The D gate 234 receives a pulse P4, which is a pulse width modulation signal, as shown by Q in FIG.
1 and pulse P11 or pulse P12, the AND gate 244 receives the following signal, as shown in R in FIG.
A pulse P3, which is a pulse width modulated signal, is obtained.

When each pulse Pt, p2, P3, Pa is applied to the drive circuit 40, as described in the first embodiment, referring to the drive circuit 40 shown in FIG. Switching current S2 is selectively generated in response to pulse P2, and pulse P2 is generated selectively in response to pulse P2.
A switching current S3 is selectively generated in response to pulse P3, and a switching current S4 is selectively generated in response to pulse P4. Then, when the transistor 141 is made conductive by the switching current S, the transistor 143 is made conductive by the switching current S3, and by being controlled, the actuator 12 is caused to flow from the terminal 10b to the terminal 10a in accordance with the switching current S. Actuator current 11
flows. Furthermore, when the transistor 142 is made conductive by the switching current S2, the transistor 144 is made conductive by the switching current S4 and is controlled, so that the actuator 12 is supplied with the actuator 12 from the terminal 10a toward the terminal tab according to the switching current S. A current 11 flows. The actuator 12 is driven by such actuator current 11.

As described above, the triangular wave signal ■
Since the inverted triangular wave signal 7 is generated along with the input signal 7, and pulse width modulation control is realized using these triangular wave signals 7 and the inverted triangular wave signal 7, the actuator 12 is stabilized by pulse width modulation control according to the input signal 7. In addition to obtaining highly accurate control operations, as is clear from the comparison with the first embodiment, the wasted time element spent in the half-cycle period to eliminate the DC offset is eliminated, resulting in improved efficiency. Good pulse width modulation (P W M ) conversion and control is achieved. In particular, the clock pulse CL
Since pulse width modulation control is performed in the K half cycle section, in comparison with the first embodiment, twice the pulse width modulation control is performed at the same clock frequency, and the clock frequency is reduced by 1/1. It can be reduced to 2.

In the second embodiment, the manual correction circuit 18 is installed, but even if the input correction circuit 18 is not installed, highly efficient pulse width modulation control can be realized.

[Effects of the Invention] As explained above, according to the present invention, the following effects can be obtained.

(a) It is possible to achieve high accuracy as well as miniaturization and power saving.

(b) Since pulse width modulation control (2) is performed using both the triangular wave signal and the inverted triangular wave signal, high efficiency can be achieved.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a first embodiment of the pulse width modulation driving method and driving device of the present invention, and FIG. 2 is a circuit diagram showing the pulse width modulation driving method and drive device shown in FIG. 1. A circuit diagram showing a specific circuit configuration example of the circuit, FIG. 3 is a timing chart showing the driving method of the pulse width modulation method shown in FIG. 1 and the operation of the driving device, and FIG. FIG. 5 is a timing chart showing the driving method of the pulse width modulation method and the operation of the driving device shown in FIG. FIG. 1 is a block diagram showing an outline of a conventional servo device using a modulation type drive device. 12...Actuator (load) 14...Switch circuit 141.142...Transistor (first switching element pair) 143.144...Transistor (second switching element pair) 18...Input correction Circuit (input correction means) 19... Polarity discrimination section (polarity discrimination means) 20... Pulse width modulation section (
pulse width modulation means) 21... comparator (first voltage comparison means) 22... comparator (second voltage comparison means) 23... comparator (third voltage comparison means)
24... Comparator (fourth voltage comparison means) 25.
...Comparator (fifth voltage comparison means) 211...
Triangular wave generating circuit (triangular wave generating means) Patent applicant: Matsushita Electric Industrial Co., Ltd. 4゜Figure 2 Example of circuit configuration of drive circuit --- Figure 6 Prior art

Claims (1)

[Claims] 1. A switch in which a first pair of switching elements that switches the direction of a drive current flowing through a load and a second pair of switching elements that vary the magnitude of the drive current according to a pulse width modulation signal are connected. The circuit comprises a circuit that corrects an input signal based on the absolute value of a drive current flowing through the load to be driven, compares the corrected input signal with a reference voltage, and generates a polarity determination signal representing the direction of the drive current flowing through the load. comparing the formed and corrected input signal with a triangular wave signal, and comparing the triangular wave signal and the reference voltage to form a pulse width modulated signal having a pulse width corresponding to the input signal; A driving method using a pulse width modulation method, characterized in that the direction of a drive current to the load is switched in accordance with a polarity determination signal, and the drive current is supplied to the load in accordance with the pulse width modulation signal. 2. Connecting a first switching element pair that selectively conducts in response to a polarity determination signal to switch the direction of drive current to the load, and selectively conducts in response to a pulse width modulation signal and a switch circuit connected to a second switching element pair that causes the drive current to flow in accordance with the modulation signal to the load; and an input correction means that generates an input signal corrected by the absolute value of the drive current from the switch circuit; polarity determination means that includes a first voltage comparison means that compares the input signal with a reference voltage and generates a polarity determination signal; and a triangular wave generation means that generates a triangular wave signal to compare the triangular wave signal and the input signal. a second voltage comparison means for comparing the triangular wave signal and the reference voltage, and a third voltage comparison means for comparing the triangular wave signal and the reference voltage according to the comparison output generated by each voltage comparison means and the comparison output from the polarity discrimination means. and a pulse width modulation means for generating the pulse width modulation signal. 3. Connecting a first switching element pair that selectively conducts in response to a polarity determination signal to switch the direction of drive current to the load, and selectively conducts in response to a pulse width modulation signal and a switch circuit connected to a second switching element pair that causes the drive current to flow in accordance with the modulation signal to the load; and a first voltage comparison means that compares the input signal and a reference voltage to generate a polarity determination signal. a polarity determining means, a triangular wave generating means for generating a triangular wave signal and an inverted triangular wave signal, a second voltage comparing means for comparing the triangular wave signal and the input signal, and a third voltage comparing means for comparing the triangular wave signal and the reference voltage. voltage comparing means, fourth voltage comparing means for comparing the inverted triangular wave signal and the input signal, and fifth voltage comparing means for comparing the inverted triangular wave signal and the reference voltage; and pulse width modulation means for obtaining the pulse width modulation signal for the first pair of switching elements in accordance with a comparison output of the means.