JPH0228838B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a setting device for an electronic timepiece that sets the functional state of the timepiece by pushing and pulling a winding stem provided with a reuse.

BACKGROUND OF THE INVENTION With advances in electronics technology, so-called digital watches, which use a crystal oscillator as an oscillation source and display time using an electro-optical display device such as a liquid crystal cell, are rapidly becoming popular.

The conventional method for adjusting the time of the above-mentioned digital clock is to provide two correction buttons, and use one button to correct the selected correction digit according to the number of times the other button is pressed. This method is often used. Moreover, as the degree of integration of ICs has improved, it has become easier to add functions such as stopwatches, alarms, and timers. A method of correction and setting that can be performed without increasing the number of operating members is required.
In response to this demand, instead of the above-mentioned button method, we used a reuse, which has traditionally been used as an operating member for pointer display type watches, and by combining the reuse's rotational and axial operations, we were able to adjust the time and perform functions. The reuse method, which involves making settings, has come to be adopted.

However, with this conventional reuse system, in addition to providing multiple switch contacts corresponding to the axial rotation direction of the winding stem to which the reuse is attached, there are many different types of functions that can be used, especially when operating the winding stem in the axial direction. In order to be able to make settings, there are generally three stable positions in the axial direction of the winding stem (the first stable position, which is usually set and used when carried, and the position one step from the first stable position). Three independent contacts must be provided, each corresponding to a second stable position in the pulled-out position and a third stable position in a position pulled out one step further from the second stable position, and A complicated switch mechanism must be provided to independently open and close the three contacts in conjunction with operation in the true axial direction, resulting in decreased reliability and increased cost of the switch.

In addition, in order to simplify the structure of this switch mechanism, the number of contacts that open and close in conjunction with the axial direction operation of the winding stem can be reduced; However, it has the disadvantage that it is not possible to set a wider variety of functions.

An object of the present invention is to provide a setting device for an electronic timepiece that further improves the above-mentioned reuse method and is extremely easy to operate. There are no contacts that take the open/closed state in conjunction with the true axial direction operation, and each contact that takes the open/closed state in conjunction with the axial direction operation of the winding stem only at the second and third stable positions of the winding stem. is provided to reduce the number of contacts linked to the axial operation of the winding stem, and when the winding stem is pulled from the second stable position to the third stable position, the contacts at the second stable position are opened. The contact point at the third stable position must become closed within a predetermined time range after the state is established, and when the winding stem is pushed from the second stable position to the first stable position, the contact point at the third stable position must be closed. Focusing on the fact that the contact point in the stable position of 3 never takes a closed circuit state,
The present invention is characterized in that the push operation is distinguished from the pull operation, and the functions of the watch are set by the push operation.

Embodiments of the present invention will be described below with reference to the accompanying drawings.

The external appearance of an electronic timepiece to which the present invention is applied is as shown in FIG. 1, for example, and includes a pointer display section 1 and a digital display section 2. A reuse 3 is provided as an external operating member for display correction/setting common to both display sections.

Under normal use, the reuse 3 is in the first stable position shown by the solid line, and in the second stable position pulled out one step from there, the display correction of the digital display section 2 can be adjusted. In the stable position, the display of the pointer display section 1 can be corrected by rotating the respective sleeves 3. In either case, the cases in which the Reuse 3 is rotated clockwise in the direction of arrow R and the case in which it is rotated counterclockwise in the direction of arrow L when viewed from the right side of Fig. 1 are different, as will be described later. For example, in the case of the digital display section 2, rotating to the right corrects the first display section 2a, and rotating to the left corrects the second display section 2b.

Further, by rotating the reuse 3 at the first stable position, the display function of the digital display section 2 is switched, and each function of hour and minute display, second display, calendar display, and alarm time display can be selected. Furthermore, if, for example, the hour and minute display is selected by the rotation operation at the first stable position, the rear 3 can be pulled to the second stable position in this selected state, and the rear 3 can be further moved. By repeating the push operation to the first stable position, the time displayed on the digital display section 2 is alternately displayed in a 12-hour format and a 24-hour format each time the push operation is performed.

If, for example, the function of alarm time display is selected by the rotation operation at the first stable position, then the reuse 3 is pulled to the second stable position while this function is selected, and then the reuse 3 is moved to the second stable position. By repeating the push operation to the stable position 1, the on/off control (sounding set and non-sounding set) of the alarm function is alternately set for each push operation.

FIG. 2 is a block diagram of a switch controlled by the reuse 3 shown in FIG. 1. _The winding stem 4 integrated into the reuse 3 controls a changeover switch S ₁ and a correction signal input switch S ₂ . When it is in the stable position 1, the contact spring 5 is in a position where it does not contact either the contacts e or f as shown in the figure, and when the reuse 3 is pulled out to the second stable position, the contact spring 5 comes into contact with the contact e. When the closed circuit state is established and the reuse 3 is further pulled out to the third stable position, the contact spring 5 is operated so as to come into contact with the contact f.

Further, the correction signal input switch _S2 has three pieces formed at equal angular intervals on the same circumference centered on the rotation axis of the contact spring 6 having two arms 6a and 6b rotated by the winding stem 4. It is composed of fixed contacts a, b, and c.

Therefore, when the correction signal input switch _S2 rotates the Reuse 3 clockwise, the two arms 6a and 6b, which rotate in opposite directions by the speed increasing gear train mechanism (not shown), alternately connect the fixed contacts a, b, and c in that order. When they come into contact, and conversely rotate the crown 3 to the left, they move to make contact in the order of c, b, and a, and this operation is performed in all stable positions of the sleeve 3.

Furthermore, the two contact springs 5 and 6 are both V _DD
Since it is held at the level, a contact signal of V _DD level (logic "1") is supplied to the fixed contact that is in contact.

FIG. 3 is a block diagram of the electronic timepiece according to the present invention. First, the basic circuit of the electronic timepiece will be briefly explained.
The frequency is divided by a frequency dividing circuit 31 and a second frequency dividing circuit 32, respectively.

Then, 1Hz output from the first frequency dividing circuit 31
The pulse signal φ ₁ is input to the second counter section S that constitutes the time system counter 33 for digital display. Further, the pulse signal φ ₄ outputted from the first frequency dividing circuit 31 is supplied as a count input signal to a timer circuit 84d in an identification circuit 84, which will be described later. Further, the second counter section S outputs an output pulse every 60 counts to cause the minute counter section M to count up. The minute counter section M further increments the hour counter section H every 60 counts.

A pulse is outputted from the time system counter 33 every 24 hours and inputted to the calendar system counter 36, and the day counter section D and month counter section M are sequentially counted up.

The data in the time counter 33, calendar counter 36, or alarm memory 37 is selected by the display control circuit 38 and sent to the digital display unit 2 (see FIG. 1) via the display drive circuit 39.
The images are displayed on a liquid crystal display device 40 that constitutes the . Note that the selection of the alarm function and function mode will be described later.

On the other hand, a 20 second cycle hand movement pulse signal φ ₂ and a 64 Hz fast forward pulse φ ₃ are output from the second frequency dividing circuit 32.
After passing through the pointer correction device 10, the waveform conversion circuit 41 converts the pulse waveform into a step motor driving pulse waveform, which drives the step motor 43 via the motor driving circuit 42. Thereby, the time is displayed on the hand display section 1 (FIG. 1) using a well-known function.

Next, an electronic circuit portion as a digital display correction means will be explained.

In the correction signal input switch _S2 mentioned above, when the reuse 3 is rotated clockwise, the contact spring 6 as a movable contact rotates in the direction shown by the arrow R in FIG. 3, and the fixed contact changes from b to c to a. As shown in FIG. 6A, a pulse signal which becomes high level "1" in the order of b, c, and a is obtained. Furthermore, when the reuse 3 is rotated to the left, the contact spring 6 rotates in the direction shown by the arrow L in FIG. 3 and comes into contact with the fixed contact in the order of c→b→a, as shown in FIG. Pulse signals that become high level "1" in the order of c, b, and a are obtained.

The pulse signals obtained at the fixed contacts a, b, and c of this switch _S2 are inputted to the correction signal forming circuit 44,
The first modified signal _P1 and the second corrected signal P1 are distinguished by their input order.
A modified signal _P2 is formed.

The correction signal forming circuit 44 includes three logic differentiating circuits 45 to 47 and three set signals, as shown in FIG.
Reset type flip-flop circuit (hereinafter abbreviated as "FF") 48-50, 6 ANDs
Circuits 51 to 56 and two OR circuits 57 and 58
It is composed of:

The logic differentiating circuits 45 to 47 are composed of one-shot multivibrators, etc., and convert the pulse signals inputted from the fixed contacts a, b, and c of the switch _S2 into fixed short circuits, respectively, as shown in FIG. The waveforms are shaped into signals A, B, and C with wide pulse widths.

F・F48 is set by pulse signal A and output
_Q1 is set to "1", ₁ is set to "0", and the output is reset by pulse signal C, and output _Q1 is set to "0" and output _Q1 is set to "1". F・F49 is set by pulse signal B to make output Q ₂ “1” and output Q ₂ to “0”, and reset by pulse signal A to make output Q ₂ “0” and output Q ₂ to “1”.
Make it. Similarly, F.F50 is set by pulse signal C to make output Q3 " ₁ ", output _Q3 "0",
It is reset by pulse signal B and output _Q3 is set to “0”.
Set _Q3 to “1”.

Therefore, the output Q ₁ of each F・F 48 to 50,
Q ₁ , Q ₂ , ₂ , Q ₃ , ₃ become as shown in Figure 6A when the reuse is rotating clockwise, and as shown in Figure 6 when rotating counterclockwise. That is, the waveforms differ depending on the direction of rotation of the reuse.

Then, the output g ₁ of the AND circuits 51, 52, 53,
g ₂ , g ₃ and the outputs h ₁ , h ₂ , h ₃ of the AND circuits 52, 54, 56 are as follows.

g ₁ = Q ₁・B g ₂ = Q ₂・C g ₃ = Q ₃・A h ₁ = Q ₁・B h ₂ = Q ₂・C h ₃ = Q ₃・A Therefore, from the OR circuit 57 The first output
The modified signal P ₁ and the second modified signal P ₂ output from the OR circuit 58 are as follows.

P ₁ = g ₁ + g ₂ + g ₃ = Q ₁・B+Q ₂・C+Q ₃・A P ₂ =h ₁ +h ₂ +h ₃ = ₁・B+ ₂・C+ ₃・A Then, turn the reuse clockwise (turn the pointer When the motor is rotated in the direction of forward movement), only the first correction signal _P1 is output as shown in Fig. 6A.
When the reuse is rotated counterclockwise (in a direction that causes the pointer to retard), the second
Only the modified signal _P2 is output.

The first modified signal P ₁ and the second modified signal P ₂ are
The first The correction signal _P1 is sent to the hour counter section H, month counter section M, hour memory section H, and the second correction signal
_P2 is input to each correction input terminal of the minute counter section M, day counter section D, and minute memory section M.

Thereby, by rotating the reuse 3 clockwise, the information displayed on the first display section 2a can be changed to the time display, calendar display, or alarm memory time displayed on the digital display section 2. The information on the second display section 2b can be displayed by correcting it and rotating it counterclockwise.

Selection of the functional mode is performed by a shift register 70 for functional mode selection. This shift register 70 has bits WT, TC, CA, and AL for time mode selection, time correction mode selection, calendar mode selection, and alarm mode selection.
One of the bits becomes "1" and the other bits become "0".

This shift register 70 is a changeover switch.
AND gate 91 that is opened under the condition that contact spring 5 of _S1 is not in contact with either contact e or f, that is, when output point d of NOR gate 90 is "1"
The correction signal provided via OR gate 92 to
Using P ₁ and P ₂ as clock signals, WT→TC→CA→
Move in order of AL. Each bit signal of the shift register 70 opens the corresponding AND gates 71, 72, 73, and 74, and at the same time is supplied to the display control circuit 38 as a mode select signal M.S, and outputs the WT bit signal to the digital display device 2. displays the hours and minutes, the TC bit signal displays the seconds, the CA bit signal displays the month and day, and the AL bit signal displays the alarm memory time. The above switching display operation is the first
This can be done by rotating the reuse 3 to the right or to the left in the first stable position as explained in the figures.

Next, a correction circuit for a digital display device will be explained. Reference numeral 95 denotes a correction information identification circuit, which is composed of two F/Fs 96, 97 for identifying and storing correctable information and two OR gates 98, 99. The first correction signal _P1 is connected to the reset terminal, and the first correction signal P1 is connected to the reset terminal.
The second correction signal _P2 is input to the reset terminal of F.96 and the set terminal of F.F.97, and the output of NOR gate 90 is input to the reset terminal of both F.F.96 and F.97 via OR gates 98 and 99. Connected to terminal d. The output terminal Q ₁ of the F/F 96 opens and closes the AND gates 62, 64, and 66, and also controls the D ₁ terminal of the display control circuit 38.
By displaying only the first display section 2a of the digital display device 2, it is identified and displayed that the information on the first display section can be modified.

Also, the output terminal Q ₂ of F・F97 is AND gate 6
1, 63, and 65, and also controls the _D2 terminal of the display control circuit 38 to display only the second display section 2b, thereby identifying and displaying that the information on the second display section can be corrected. The operation of the correction circuit in the above configuration will be explained in the time mode selection state which is usually used most often.

In this state, the shift register 70 is in the WT state.
The bit terminal is set to "1", and the display control circuit 38 selects the information of the time system counter 33 according to the time mode select signal, and the information of the hour display section H is displayed on the first display section 2a of the digital display device 2. Also second
Information on the minute display section 2b is displayed on the display section 2b.

Also, since the output terminal d of the NOR gate 90 is "1", F/F 96, 97 of the correction information identification circuit 95
are both in a reset state. When the reuse 3 is pulled out one step and set in the second stable position in order to correct the displayed time from this state, the contact spring 5 of the changeover switch _S1 comes into contact with the contact e.

As a result, contact e becomes “1” and AND gate 7
2, 73, 74 and the display drive circuit 39
The entire display of the digital display device 2 is made to blink by controlling the blinking terminal F of the digital display device 2 to clearly indicate that it is in a state where correction is possible. Also, the output terminal d of the NOR gate 90 is “0”
When the AND gate 91 is closed, the AND gate 71 is closed via the inverter 100, and the reset of the F/Fs 66 and 67 is released via the OR gates 98 and 99.

In this state, the output terminals of F/F96 and 97
Both Q ₁ and Q ₂ are “0”, so AND
The gates 61 to 66 are all closed, and the identification terminals D ₁ and D ₂ of the display control circuit 38 are not controlled.

When the correction signal input switch _S2 is turned clockwise from this state, the first correction signal _P1 is output from the correction signal forming circuit 44 as described above, but the first one pulse is the correction signal input that is all closed. Since it is blocked by the group of gates 60, it does not become a correction signal, but only sets F and F96 of the correction information identification circuit 95. As a result, the output terminal of F・F96
When Q ₁ is inverted to “1”, the D ₁ terminal of the display control circuit 38 is controlled and the digital display device 2
By displaying only the hour on the first display section 2a at the time, it is possible to identify and display that the clockwise rotation of the watch 3 is in the hour display correction mode, and furthermore, the AND gates 62, 64, and 66 are opened. AND gates 63 to 66 are not opened because the CA and AL bit terminals of shift register 70 are set to "0".
Only AND gate 62 is opened.

Therefore, when the reuse 3 is further rotated clockwise, the first correction signal P ₁ from the second pulse passes through the AND gate 62 and corrects the information in the hour counter section H of the time system counter 33.

When the correction of the time information is completed by the above operation, next rotate the reuse 3 to the left. The first pulse of the second correction signal P ₂ due to this left rotation is also blocked by the closed AND gate 61 and therefore does not become a correction signal.
Reset F96 and invert F/F97 to the set state.

As a result, the output terminal Q ₁ of F・F96 is “0”,
Since the output terminal Q ₂ of the F.F97 becomes “1”, D ₂ of the display control circuit 38 is controlled and the second display section 2
By displaying only the minutes b, it is possible to identify and display that the counterclockwise rotation of Reuse 3 is in the minute display correction mode, and in addition, only the AND gate 61 is opened.
When the reuse 3 is further rotated to the left, the second correction signal _P2 from the second pulse passes through the AND gate 61 and corrects the information in the minute counter section M.

As mentioned above, the configuration of this embodiment is such that the first one of the correction signals P ₁ and P ₂ due to the left and right rotation of the reuse 3 is
The pulse is not used as a correction signal, and the correction information identification circuit 95 is activated to only identify correctable information, so even if you accidentally turn the crown clockwise when you want to correct only the minute information, the identification will not be displayed. As a result, you will notice that the hour information has not been incorrectly corrected, so you can turn the watch counterclockwise again and correct the minute information correctly.

Incidentally, when adjusting from the above time display mode WT, the second counter section S of the time system counter 33 is not reset at the time of adjustment, so it can be used as a world clock function to change the hour or minute according to the time difference.

Next, I will explain about the time correction mode TC.
When the Reuse 3 is returned to the first stable position and the Reuse 3 is rotated, the correction signal P ₁ or P ₂ is
When the output terminal d of the NOR gate 90 is inverted to "1", it passes through the AND gate 91, which is opened, and advances the shift register 70 by one step.
Set only the bit terminal to “1”. As a result, the display control circuit 38
A time-related counter 33 is displayed on the second display section 2b.
Displays the information of the second counter section S. and
Open AND gate 71 and then OR gate 101
AND gate 72 is opened via . When the reuse 3 is pulled out one step from this state, the contact e of the changeover switch S ₁ becomes "1", opening the AND gate 72 and simultaneously setting the output terminal d of the NOR gate 90 to "0".
and close the AND gate 91, F・F96,
97 reset. Furthermore, a reset signal Rp is generated from the d terminal via the inverter 100 and the AND gate 71 to reset the second counter section S of the time system counter 33 and part of the first frequency divider circuit 31 and the second frequency divider circuit 32, and also displays the signal. The D ₃ terminal of the control circuit 38 is controlled to switch the display of the digital display device 2 from seconds to the information of the hour counter section H and minute counter section M of the time system counter 33, that is, to the hour and minute display state. The adjustment of the hour and minute display by rotating the reuse left and right from this state is the same as the operation in the time display mode WT, but during the adjustment operation, the second counter section S and the first frequency dividing circuit 31 Since the timer 3 has been reset, after the adjustment is completed, the time can be set accurately by pushing the watch 3 into the first stable position in the same way as a time signal on a television or the like. Similarly calendar mode
To correct the CA and set the time in the alarm mode AL, select the bit in the shift register 70 by rotating the reuse 3 in the first stable position, and display the month information or hour information on the first display section 2a. 2
Display the day information or minute information on the display section 2b, and from this state, pull out the reuse 3 to the second stable position and rotate it clockwise to display the first display section 2a, and counterclockwise to display the second display section 2b. , each can be identified and corrected. At this time, the relationship between the gates for time adjustment and the gates for calendar adjustment and alarm time setting correspond to AND gates 72, 73, and 74, and AND gate 6.
1, 63, 65, and AND gates 62, 64,
It goes without saying that each of the 66 performs a corresponding operation.

Next, when the time is selected as the time display mode WT or time correction mode TC,
The switching setting function between time format display and 24 hour format display will be explained.

Reference numeral 84 indicates an identification circuit which inputs signals from contacts e and contact f, 83 indicates a logic differentiator circuit which receives identification signal P outputted from the identification circuit 84 and outputs a differential signal, and 87 indicates a differential signal from the differentiator circuit 83. With the signal and the signal from OR gate 101 as input, 12
This is a first memory circuit which is a function setting circuit that controls switching between time format display and 24 hour format display. AND as input
It consists of a gate 85 and a T-type F/F 88 which receives the output signal from the AND gate 85, and the output Q of the F/F 88 is sent to the display control circuit 38.
is supplied to input terminal D ₄ of F.F88, and output Q of F.
When is stored and set at logic level "1", the display control circuit 38 causes the digital display section 2 to take on a 12-hour time display state, and the output Q of F.F88 is stored at logic level "0". If set, the display control circuit 38 will cause the digital display section 2 to
The time display is switched to a 24-hour time display.

The identification circuit 84 has a circuit configuration as shown in FIG. That is, 84a is an inverter that inputs the signal from contact e, and 84b is inverter 84.
84c is an AND gate which takes the output signal of a as one input and the output signal of an inverter _84j , which will be described later, as the other input; 84d is a timer circuit which operates using the pulse signal φ ₄ outputted through AND gate 84c as a counting input signal; 84e is a timer output signal from timer circuit 84d and AND gate 84d; 84f is an AND gate 84 which inputs the output signal of the gate 84b and outputs the identification signal P.
an inverter which inputs the identification signal P from e;
4g is an inverter that receives the timer signal from the timer circuit 84d, and 84h is an inverter 84.
The AND gate 84i receives the output signal from the AND gate 84h and the signal from the contact e, and supplies a reset signal to the reset terminal R of the timer circuit 84d. OR gate 84j is an inverter that receives the output signal from AND gate 84h,
It is composed of.

Next, a description will be given of the switching setting operation between the 12-hour display and the 24-hour display based on the above configuration.

The WT bit terminal of the shift register 70 or
When the TC bit terminal is set to “1”,
The output signal of OR gate 101 becomes "1",
The gate of AND gate 87 assumes an open state.

Therefore, when a pull operation is performed to move the Reuse 3 from the first stable position to the second stable position in this state, the contact spring 5 of the switch _S1 comes into contact with the contact e, changing the signal at the contact e to "1". ”, and the signal from this contact e is sent to the OR gate 84i.
The timer circuit 84d is reset via the .

Therefore, in this reset state, the timer circuit 8
The output signal that takes the logic level “0” of 4d is AND
The output signal P is set to logic level "0" via the gate 84e, and the output of the inverter 84f is set to "1". Also, at this time, the output signal of the timer circuit 84d is passed through the inverter 84g.
AND gate 84h is opened.

Further, in this state, since the contact spring 5 and the contact f are not in contact with each other, the output signal of the AND gate 84h is set to "0" and the AND gate 84b is opened via the inverter 84j.

Therefore, in this state, the winding stem 4 with the reuse 3
When a push operation is performed to move from the second stable position to the first stable position, the time point changes as shown in Figure 8.
At _t1 , the logic level of the signal at contact e changes from "1" to "0", and as a result, the reset of the timer circuit 84d is released and at the same time, the output signal of the inverter 84a and the output signal of the AND gate 84b are changed. Both are set to “1”, and the pulse signal _φ4 is
Timer circuit 84d via AND gate 84c
, and the counting operation of the timer circuit 84d is started.

Eventually, when the timer circuit 84d counts for the identification time, that is, the predetermined time T, the timer circuit 84d outputs an output signal of logic level "1" at time _t2 . Therefore, the identification signal P from the AND gate 84e becomes "1", and this identification signal P is passed through the inverter 84f to the AND gate 84.
The gate c is closed to stop the counting operation of the timer circuit 84d. Therefore, the output of the identification circuit 84, that is, the identification signal P from the AND gate 84e, is passed through the differentiation circuit 83 and the AND gate 85 to F.
Invert the output Q of F88.

Furthermore, if the output Q of F.F88 is memorized and set to logic level "1" by this inversion operation, the input terminal
A signal with logic level "1" is supplied to D ₄ , and accordingly, the time contents of the time system counter 33 are converted by the display control circuit 38 as a decoder signal for 12-hour display, and are converted into digital data via the display control circuit 39. 12 in the liquid crystal display device 40 that constitutes the display section 2
The time will be displayed using a time system.

Moreover, the operation for switching from the 12-hour time display state to the 24-hour time display state, for example, is performed as follows.

That is, first, when a pulling operation is performed to return the winding stem 4 from the first stable position to the second stable position, a closed circuit state is established in which the contact spring 5 and the contact e are in contact with each other, and the signal from the contact e is As shown at time _t3 in the figure, the logic level changes to "1", and the timer circuit 84d is reset again via the OR gate 84i, and the identification signal P of the identification circuit 84 is set to "0".

Next, at time _t4, when a push operation is performed to move the winding stem 4 from the second stable position to the first stable position, the timer circuit 84d performs a counting operation for a predetermined time T, similar to the time _t1 described above. At time _t5 , the output signal of the timer circuit 84d changes to logic level "1".

As a result, the identification circuit 84 outputs an identification signal P of logic level "1", and this signal P is transmitted to the differentiating circuit 84.
2 and the AND gate 85 to invert the output Q of the F/F 88 to "0", and the time content of the time system counter 33 is converted by the display control circuit 38 as a decoder signal for 24-hour display, and the display drive circuit 3
9, a liquid crystal display device 40 displays the time in a 24-hour system.

Similarly, the first stable position and the second stable position of the winding stem 4 are
By alternately repeating the pulling and pushing operations with respect to the stable position, the 12-hour system display and the 24-hour system display are alternately switched and displayed in response to each of the above-mentioned pushing operations. Note that the condition for the signal at contact e at the second stable position of the winding stem 4 to change from logic level "1" to "0" is the push to move the winding stem 4 from the second stable position to the first stable position. When performing an operation or moving the winding stem 4 from the second stable position to the third stable position.
Since this operation is limited to both the pull operation to move the winding stem 4 from the second stable position to the third stable position, the pull operation to move the winding stem 4 from the second stable position to the third stable position is In order to identify the pushing operation that moves the winding stem 4 to the first stable position, the second
Each pulling operation time T ₁ , T ₂ , which has variations from the stable position to the third stable position,
If the identification time, that is, the predetermined time T, determined in advance by the timer circuit 84d is set sufficiently long, for example, in the time range of 0.05 seconds to 1 second, to cover enough for T ₃ ..., etc., If within this time T, if there is no change in the logic level of the signal from the contact f, that is, if the signal from the contact f continues to have a logic level of "0", the winding stem 4 will not perform the above-mentioned push operation. The identification circuit 84
and outputs an identification signal P of logic level "1" from contact point f within the time range shown in FIG. The winding stem 4 determines that the pulling operation has been performed, and causes the identification circuit 84 to output an identification signal P of logic level "0".
Moreover, the operation of the identification circuit 84 shown in the waveform diagram of FIG. 9 is as follows.

That is, the logic level "1" signal from contact f is applied to AND gate 84h and inverter 84j.
The output signal of AND gate 84b is set to “0” through
Then, the AND gate 84c is closed to stop supplying the pulse signal _φ4 to the timer circuit 84d, and at the same time, the signal from the contact f forces the timer circuit 84d to the reset state via the AND gate 84h and the OR gate 84i. As,
The identification signal P from the AND gate 84e operates to maintain the logic level "0".

In addition, in Fig. 9, time ta to tb, time tf to tg, and time
tk~tl is the time required for the winding stem 4 to move from the second stable position to the third stable position (i.e.
Each pulling operation time T ₁ , T ₂ , T ₃ ) is shown, and the time point
td~te, time ti~tj, and time tn~to indicate the time required for the winding stem 4 to move from the third stable position to the second stable position.

Next, to briefly explain the alarm function, in FIG. When there is a match, the output of the match detection circuit 75 becomes "1", and if the output Q of the toggle type flip-flop circuit 76 is "1", the output of the AND gate 77 becomes "1", and the buzzer is driven. The circuit 79 drives the buzzer 80 to generate an alarm sound.

Then, rotate the winding stem 4 at the first stable position, and when the alarm mode is selected and the AL bit terminal is "1", pull the winding stem 4 to the second stable position and turn the changeover switch S. ₁ contact spring 5
When the contact e is brought into contact with the logic level "1" in the identification circuit 84 shown in FIG. The identification signal P is maintained at the output state of "0".

Next, in this state, by performing a push operation to move the winding stem 4 from the second stable position to the first stable position, the timer circuit 84d is reset and released at time _t1 in FIG. At the same time, the timer circuit 84d receives the pulse signal _φ4 input through the AND gate 84c and starts a predetermined timer counting operation, and at time _t2 , when a predetermined time T has elapsed from time _t1 , the timer circuit 84d starts counting. The output signal is output as an identification signal P of logic level "1" via an AND gate 84e.

Therefore, this identification signal P is applied to the differentiating circuit 83 and the AND gate 8, which has been opened and on standby in advance.
2 to the T-type F/F 76, and its output Q is inverted from "1" to "0" or from "0" to "1".

Moreover, when the output from the second memory setting circuit 86 which is a function setting circuit, that is, the output Q of the F.F.
is supplied to the display control circuit 38, thereby displaying it on the liquid crystal display device 40.

Also, in order to change the alarm from the alarm on state to the alarm off state, pull out the winding stem 4 from the first stable position to the second stable position again, and then move the winding stem ₄ from the first stable position to the second stable position.
By performing a push operation to move the winding stem 4 to the first stable position, the identification circuit 84 changes to "1" at time _t5.
This identification signal P is passed through the differentiation circuit 83 and the AND gate 82 to the F/F 76.
An alarm off state is set in which the output Q of the AND gate 77 is inverted to "0" and the gate of the AND gate 77 is closed.

Similarly, by repeating the push operation on the winding stem 4 at time t ₇ , the alarm is set to be on again at time t ₈ , and as a result, the coincidence detection circuit 7
Even if the output of 5 becomes "1", the gate of AND gate 77 is closed, so the buzzer 80
is not driven by the buzzer drive circuit 79.

Next, the correcting operation of the pointer display section 1 will be explained using the configuration of the pointer correcting device shown in FIG.

The pointer correction device 10 receives as input signals a hand movement pulse signal φ ₂ , a fast forward pulse φ ₃ , correction signals P ₁ , the f terminal of the P ₂ changeover switch S ₁ , a WT bit signal in time display mode, a TC bit signal in time correction mode, It inputs the signals of the outputs Q ₁ and Q ₂ of the F/Fs 96 and 97 constituting the correction information identification circuit 95 and supplies the waveform conversion circuit 41 with hand movement signals according to various conditions described later, and the fast forward pulse φ ₃ is the clock input,
A time difference correction counter 11 having count output terminals O ₁ and O ₂ with count numbers 180 and 181, two signal switching circuits 12, 13, two F/F 14, 15, AND
Gate 16, 17, 18, 19, OR gate 2
0, 21, and an inverter 22.

In the normal state where the reuse 3 is in the first stable position, the two F/Fs 14 and 15 are both in the reset state, so the output Q is "0" and the F/F 14's output Q is "0". The output Q closes the AND gate 16 and resets the time difference correction counter 11 via the inverter 22.

Also, since the input signals f, WT, and TC are all "0", the AND gates 17, 18, and 19 are closed, and the signal switching circuit 12 switches to the second division by the "0" signal supplied to its switching terminal E. By selectively outputting the hand movement pulse signal φ ₂ inputted from the circuit 32 to the G terminal and supplying it to the waveform conversion circuit 41 via the OR gate 21, a normal hand movement operation with a period of 20 seconds is performed.

Next, when the reuse 3 is rotated in the first stable position and the reuse 3 is pulled out to the third stable position with the time display mode WT selected, the contact spring 5 of the changeover switch _S1 is brought into contact with the contact f.

Therefore, since the input signals f and WT both become "1", the output of the AND gate 17 also becomes "1",
When the AND gates 18 and 19 are opened, the signal switching circuit 12 selectively outputs the hand movement pulse signal φ ₂ to the G ₂ terminal in response to the "1" signal supplied to its switching terminal E. In this state, when the reuse 3 is rotated clockwise, the first pulse of the first correction pulse _P1 causes the correction information identification circuit 95 to detect the F. F96 is set, and its output _Q1 displays the time information on the first display section 2a of the digital display section 2, and opens the AND gate 19 to allow the first correction pulse _P1 to pass. Therefore, when the reuse 3 is further rotated clockwise, the next first correction pulse _P1 passes through the AND gate 19, and F.F.
Set 14. Then, when the output Q of this F・F14 is inverted to "1", AND gate 1
6 opens, the reset of the time difference correction counter 11 is canceled via the inverter 22.

As a result, 64
By outputting a fast forward pulse φ ₃ of Hz through the AND gate 16 and the OR gate 21, the pulse motor 43 is fast forwarded and the time difference correction counter 11 starts counting.

When the count value of the counter 11 reaches 180, a signal is generated from the count output terminal _O1 , the output is inverted to "0" by resetting the F.F14 via the signal switching circuit 13, and the AND gate 16 is At the same time as closing, the counter 11 is reset.

After the above fast forward operation is completed, the corrective pulse _P1 is applied by rotating the reuse 3 clockwise again to F/F1.
It is repeated every time 4 is reset. The number of fast-forward pulses supplied to the pulse motor 43 by this one fast-forward operation is 180 in this embodiment.
This is the number of pulses for correcting the pointer display device 1, which has a 20 second hand movement cycle, by one hour.

Moreover, when the hand movement pulse signal φ ₂ is output from the second frequency dividing circuit 32 during the above-mentioned fast forward operation, this pulse φ ₂
passes through the _G2 terminal of the signal switching circuit 12 and becomes F.F.
Set 15. As a result, the signal switching circuit 13 whose switching terminal E is controlled by the output of the F.F. To select the signal from output terminal O ₂ ,
After supplying a fast forward pulse of 181 pulses to the pulse motor 43, F and F14 and F15 are reset, and 1
Ends the fast-forward operation.

That is, the above operation simultaneously performs normal hand movement using the hand movement pulse signal φ ₂ and correction of the time difference by one hour, and the time difference can be corrected without disturbing the time. In this embodiment, the reason why only one pulse of the hand movement pulse signal φ ₂ can be stored by F.F15 is the 64Hz fast forward pulse φ _{3 .}
The time required to make one hour's correction is approximately 3 seconds, and the hand movement pulse signal φ ₂ with a period of 20 seconds is:
This is because only one pulse is generated during this fast forward operation.

Next, when the reuse 3 is rotated counterclockwise, the first pulse of the second correction signal P ₂ output from the correction signal forming circuit 44 causes the F
F96 and F97 are each inverted, and the output Q of F and F97 becomes "1". As a result, the minute information is identified and displayed on the second display section 2b of the digital display section 2, and the AND gate 18 is opened to generate the second correction pulse.
Allows passage of P ₂ .

Therefore, if Reuse 3 is further rotated to the left, AND gate ₁ will be activated from the next second correction pulse P2.
8 and the OR gate 21, the pulse motor 43 is corrected step by step, and the time difference is corrected in minutes.

The above series of time difference correction operations are performed on the digital display section 2.
While looking at the standard time displayed on the screen, a certain amount of time difference correction can be made to the standard time, so the time difference can be corrected accurately and easily.

Next, when the crown 3 is rotated in the first stable position and pulled out to the first position with the time correction mode TC selected, the TC bit signal of the shift register 70 becomes "1". The selector switch is placed on the AND gate 71 that is opened.
By applying the operation signal _S1 , a reset signal Rp is generated, which resets the stage subsequent to the fast-forward pulse _φ3 generating section in the second frequency dividing circuit 32.

In this state, the correction operation of the pointer display section 1 by left and right rotation of the watch 3 is exactly the same as the time difference correction operation described above.

After the time adjustment is completed, normal clock operation is resumed by pushing the watch 3 into the first stable position in synchronization with a time signal from a television, etc., as in the case of the digital display section 2 described above.

In this embodiment, the first pulse of the correction signals P ₁ and P ₂ is used to display the identification, and the correction operation is performed from the second correction pulse. If the increasing gear train ratio before rotating S ₂ is large, a slight rotation of the rear engine will generate multiple correction pulses, so the identification display will indicate that the engine is rotating in the wrong direction. By the time you notice it, the erroneous correction has already been made by the correction pulse after the second pulse, so in this case, install a counter that is linked to the reuse operation or a timer Ti shown by the dotted line in Figure 3. Therefore, it would be better if the correction signal input gate is opened after a certain period of time has elapsed from the start of the identification display or after a certain number of pulses have been counted, and the correction operation using the correction pulse is performed.

As described above, according to the present invention, it is possible to reduce the number of contacts that open and close in conjunction with the axial direction operation of the winding stem, and to increase the number of various functions by axially operating the winding stem. This has a very significant practical effect in that it allows settings to be made.

[Brief explanation of drawings]

Fig. 1 is a front view showing the external appearance of an electronic timepiece to which the present invention is applied, Fig. 2 is an explanatory diagram of each switch controlled by the reuse, and Fig. 3 is a circuit configuration of the electronic timepiece of the present invention. The block diagrams shown in FIGS. 4 and 5 are block diagrams showing the configurations of the correction signal forming circuit and pointer correction device shown in FIG. 3, respectively.
Figures A and B are waveform diagrams of various parts, Figure 7 is a detailed circuit diagram of the identification circuit shown in Figure 3, and Figures 8 and 9 are waveform diagrams of the identification circuit in each operating state. 1...Pointer display section, 2...Digital display section, 3
... Reuse, 84 ... Identification circuit, 84d ... Timer circuit, 86, 87 ... Function setting circuit, P ...
...identification signal, ...first stable position, ...second
stable position,... third stable position, e, f...
Contact point, T...predetermined time (time for identification).

Claims (1)

[Claims] 1. A winding stem provided with a reuse, a first stable position, and a second stable position provided at a position pulled out from the first stable position, respectively in the axial direction of the winding stem. and a third stable position provided at a position further pulled out from the second stable position, and contact points provided respectively corresponding to the second and third stable positions. In the electronic timepiece, from the second stable position by a normal pulling operation of the winding stem,
an identification circuit having an identification time longer than the operation time required to move to the third stable position; and a function setting circuit that controls the setting of the functional state of the timepiece by inputting an identification signal output from the identification circuit. have,
The identification circuit detects the presence or absence of a change in the logic level of the signal taken by the contact at the third stable position within the identification time range from the time when the logic level of the signal taken by the contact at the second stable position changes. and is configured to output an identification signal having a different logic level depending on the presence or absence of the logic level change, and the winding stem is moved from the second stable position to the first stable position. A setting device for an electronic timepiece, characterized in that the state of the function setting circuit is set by the identification signal output from the identification circuit based on a push operation. 2. A setting device for an electronic timepiece, characterized in that the function setting circuit according to claim 1 is a memory setting circuit that controls on/off of an alarm function. 3. A setting device for an electronic timepiece, wherein the function setting circuit according to claim 1 is a memory setting circuit that controls switching between a 12-hour display and a 24-hour display of time.