JPH02289012A - Control system for shared memory of compact electronic computer - Google Patents

Control system for shared memory of compact electronic computer

Info

Publication number
JPH02289012A
JPH02289012A JP6764389A JP6764389A JPH02289012A JP H02289012 A JPH02289012 A JP H02289012A JP 6764389 A JP6764389 A JP 6764389A JP 6764389 A JP6764389 A JP 6764389A JP H02289012 A JPH02289012 A JP H02289012A
Authority
JP
Japan
Prior art keywords
address
area
unused area
shared memory
control table
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6764389A
Other languages
Japanese (ja)
Inventor
Koichi Tsuzuki
都筑 幸一
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP6764389A priority Critical patent/JPH02289012A/en
Publication of JPH02289012A publication Critical patent/JPH02289012A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To eliminate the dividing loss of a shared memory and to reduce the memory capacity by controlling the address of an entire area and the address of the head unused area having a dynamic change via a control table and providing the elements to each unused area to show the size of its own area and the address of next unused area respectively. CONSTITUTION:Plural areas and a control table are prepared, and each area owns the elements to show the size of its own and the address of an unused area. A control table is provided to control the entire address of the unused area and the address of the head unused area having a dynamic change. Thus the unused area is controlled via the address and the size. As a result, a shared memory can be assigned with the variable length and the dividing loss is eliminated.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は電子計算機に関し、特に搭載メモリ量が少なく
仮想記憶方式の設けられていない小形電子計算機に関す
る。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an electronic computer, and particularly to a small-sized electronic computer with a small amount of installed memory and no virtual storage system.

(従来の技術) 従来、この種の管理方式では共有メモリを固定長く細分
化し、エリア単位に使用中、あるいは未使用である旨を
管理する方式となっていた。
(Prior Art) Conventionally, this type of management system divides the shared memory into fixed length sections and manages whether the area is in use or unused.

(発明が解決しようとする課題) 上述した従来の管理方式は、固定長のエリアで使用状況
を管理しているため、小さなサイズのエリアが必要な場
合でも、あらかじめ定められたサイズのエリアが割当て
られる。このため、分割損失が発生するという欠点があ
る。
(Problem to be Solved by the Invention) The conventional management method described above manages the usage status in fixed-length areas, so even if a small area is required, an area of a predetermined size is allocated. It will be done. Therefore, there is a drawback that a division loss occurs.

本発明の目的は、エリア全体のアドレスと動的に変化す
る先頭未使用エリアのアドレスとを制御表で管理し、各
未使用エリアに自エリアのサイズと次未使用エリアのア
ドレスとを示すエレメントを設けること罠よって上記欠
点を除去し、分割損失の発生することがないように構成
した小形電子計算機の共有メモリ管理方式を提供するこ
とにある。
The purpose of the present invention is to manage the address of the entire area and the dynamically changing address of the first unused area in a control table, and provide an element in each unused area that indicates the size of its own area and the address of the next unused area. It is an object of the present invention to provide a shared memory management system for a small-sized computer that eliminates the above-mentioned drawbacks and is configured so that no division loss occurs.

(課題を解決するための手段) 本発明による小形電子計算機の共有メモリ管理方式は、
複数のエリアと制御表とを具備して構成したものである
(Means for Solving the Problems) A shared memory management method for a small computer according to the present invention is as follows:
It is configured with a plurality of areas and control tables.

上記構成において、各エリアは自身のサイズおよび次未
使用エリアのアドレスを示すエレメントを有するもので
ある。
In the above configuration, each area has an element indicating its own size and the address of the next unused area.

制御表は、未使用エリアの全体のアドレス、および動的
に変化する先頭未使用エリアのアドレスを管理するため
のものである。
The control table is for managing the entire address of unused areas and the dynamically changing address of the first unused area.

(実施gAJ) 次に、本発明について図面を参照して説明する。(Implementation gAJ) Next, the present invention will be explained with reference to the drawings.

第1図は、本発明による小形電子計算機の共有メモリ管
理方式の一実施例に使用される共有メモリ管理制御表と
共有メモリとの構成を示す説明図である。
FIG. 1 is an explanatory diagram showing the configuration of a shared memory management control table and shared memory used in an embodiment of the shared memory management method for a small computer according to the present invention.

共有メモリ管理制御表は、共通メモリの先頭アドレスと
、共有メモリの終了アドレスと、先頭未使用エリアのア
ドレスと成立つ。
The shared memory management control table consists of the start address of the common memory, the end address of the shared memory, and the address of the start unused area.

各未使用エリアの先頭は、次の未使用エリアのアドレス
(最終の未使用エリアの場合にはNULL)と、自未使
用エリアのサイズとから成立つ。
The head of each unused area consists of the address of the next unused area (NULL in the case of the last unused area) and the size of its own unused area.

次に、第1図の動作につhて第2図(−)〜(f)を参
照して説明する。
Next, the operation shown in FIG. 1 will be explained with reference to FIGS. 2(-) to (f).

まず、初期状態は第2図(a)K示されるような状態で
あるが、Aバイトのエリアを使用するときには、第2図
(b)に示されるような状態になる。次に、Bバイトの
エリアを使用するときには第2図(e)に示されるよう
な状態になる。次に、Aバイトのエリアが不要になった
ときには、第2図(d)に示されるような状態となる。
First, the initial state is as shown in FIG. 2(a)K, but when an area of A byte is used, the state is as shown in FIG. 2(b). Next, when the area of B bytes is used, the state will be as shown in FIG. 2(e). Next, when the area of A byte is no longer needed, a state as shown in FIG. 2(d) occurs.

続いて、Cバイトのエリアを使用するときには、第2図
(C)に示されるような状態になる。次に、Bバイトの
エリアが不要になったときには、第2図(f)K示され
るような状態となる。
Subsequently, when the area of C bytes is used, the state as shown in FIG. 2(C) occurs. Next, when the area of B bytes is no longer needed, the state shown in FIG. 2(f)K occurs.

上記実施列で示したように、未使用エリアをアドレスと
サイズとで管理することにより、共有メモリを可変長で
割当てることが可能になり、従来の固定長分割方式によ
って発生していた分割損失をなくすことができる。
As shown in the implementation column above, by managing unused areas by address and size, it is possible to allocate shared memory with variable length, which eliminates the partitioning loss that would occur with the conventional fixed-length partitioning method. It can be eliminated.

(発明の効果) 以上説明したように本発明は、共有メモリの割当てを可
変長で分割して割当てることにより、共有メモリの分割
損失をなくすことができるため、メモリ容量を削減でき
るという効果がある。
(Effects of the Invention) As explained above, the present invention has the effect of reducing memory capacity because it is possible to eliminate shared memory division loss by dividing and allocating shared memory with variable lengths. .

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明によって使用される共有エリアの管理
状況を示す説明図である。 第2図は、第1図に示す共有エリアの管理状況の詳細を
示す説明図である。
FIG. 1 is an explanatory diagram showing the management status of a common area used by the present invention. FIG. 2 is an explanatory diagram showing details of the management status of the shared area shown in FIG. 1.

Claims (1)

【特許請求の範囲】[Claims] 複数のエリアと制御表とを具備して構成した小形電子計
算機の共有メモリ管理方式であつて、前記各エリアは自
身のサイズおよび次未使用エリアのアドレスを示すエレ
メントを有し、且つ、前記制御表は前記未使用エリアの
全体のアドレスおよび動的に変化する先頭未使用エリア
のアドレスを管理するように構成したことを特徴とする
小形電子計算機の共有メモリ管理方式。
A shared memory management method for a small computer configured with a plurality of areas and a control table, wherein each area has an element indicating its own size and an address of the next unused area, and the control table A shared memory management method for a small computer, characterized in that the table is configured to manage the entire address of the unused area and the dynamically changing address of the leading unused area.
JP6764389A 1989-03-22 1989-03-22 Control system for shared memory of compact electronic computer Pending JPH02289012A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6764389A JPH02289012A (en) 1989-03-22 1989-03-22 Control system for shared memory of compact electronic computer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6764389A JPH02289012A (en) 1989-03-22 1989-03-22 Control system for shared memory of compact electronic computer

Publications (1)

Publication Number Publication Date
JPH02289012A true JPH02289012A (en) 1990-11-29

Family

ID=13350895

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6764389A Pending JPH02289012A (en) 1989-03-22 1989-03-22 Control system for shared memory of compact electronic computer

Country Status (1)

Country Link
JP (1) JPH02289012A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6367656A (en) * 1986-09-09 1988-03-26 Fujitsu Ltd Processing system for data storing area control
JPS6412345A (en) * 1987-07-07 1989-01-17 Fujitsu Ltd Memory space managing system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6367656A (en) * 1986-09-09 1988-03-26 Fujitsu Ltd Processing system for data storing area control
JPS6412345A (en) * 1987-07-07 1989-01-17 Fujitsu Ltd Memory space managing system

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