JPH02297114A - Method for inspecting computer - Google Patents

Abstract

PURPOSE:To test the multiplex processing function of a common device and to easily detect a design error and the fault of the device by counting the number of the specified kinds of instructions executed by means of the common device for respective individual devices. CONSTITUTION:In a system having plural individual devices 1 and 2 and the common device 3, a transfer means 4 sequentially transfers the specified kinds of instructions from the individual devices 1 and 2 as to the individual devices 1 and 2 in terms of prescribed numbers based on a signal in a synchronous means 7, and a counting means 5 counts the number of the specified kinds of instructions executed by the common device 3 for respective individual devices 1 and 2. Thus, respective inspection programs 9 can inspect whether the common device 3 accurately executes the instructions for the number included in the specified kinds of instruction groups 8 by inspecting the discrete value of the counting means 5.

Description

[Detailed Description of the Invention] [Summary] Inspection method for a device shared by a plurality of devices An object of the present invention is to provide a test method for the multiprocessing function of a device that is shared by a plurality of devices and performs specified specific processing. In a system having a plurality of individual devices that transfer instructions of a specific type detected in a program and a common device that executes the transferred instructions of the specific type, the individual devices include a group of instructions of the specific type. a synchronizing means for generating a synchronizing signal; and a synchronizing means for generating a synchronizing signal, and transmitting the specific type of command from the individual device to the common device in order for the individual devices in a predetermined number of units based on the signal of the synchronizing means. and means for counting the number of instructions of the specific type executed by the common device for each individual device, and each inspection program reads the count value of the counting device and is executed. configured to check the number of instructions of a particular type.

[Industrial application field]

The present invention relates to a testing method for a device shared by multiple devices.

In recent years, system configurations consisting of a computer that is shared by multiple computers and dedicated to specific processing, such as two scalar computers, or a vector computer that is connected to a general-purpose computer and processes vector instructions transferred from the scalar computer, have been introduced. Systems with

The vector computer sequentially buffers instructions transferred from the scalar computer, and when vector instructions from two scalar computers are mixed in the buffer, the system is improved by performing multiple processing on the two scalar computers alternately. Configured to improve processing efficiency. Therefore, there is a need for a method for accurately testing the multiprocessing function of a dedicated computer such as a vector computer.

[Conventional technology]

FIG. 3 is a block diagram showing a conventional example. The same reference numerals indicate the same objects throughout the figures.

A conventional vector computer testing method uses, for example, a communication interface provided between the scalar computers 1a and 2a to synchronize them with each other and test the multiprocessing function of vector instruction execution. In other words, a synchronization instruction placed before a group of vector instructions (several to dozens of steps) of the inspection program communicates via a communication interface, synchronizes the execution of the inspection program, and synchronizes the transfer of vector instructions. Calculator 3a has scalar calculators 1a and 2a
The multiprocessing function of the vector computer 3a was tested by simultaneously executing the vector instructions from the hector instruction group and comparing the execution result with the expected value at the end of execution of the hector instruction group.

[Problems to be Solved by the Invention] As described above, according to the conventional method, the synchronization instructions placed before the vector instruction group synchronize the inspection programs and synchronize the transfer of vector instructions.
Although it was checked by comparing the execution result of a with the expected value, it is unclear whether the vector instructions were actually transferred from the scalar computers 1a and 2a to the vector computer at the same time. Even if they are transferred at the same time, the execution results will show whether the instructions were executed alternately one by one (multiple processing), or whether multiple instructions from one scalar computer were executed at once and then instructions from the other. There was a problem in that the multiprocessing function could not be accurately tested.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for testing the multiprocessing function of a device that is shared by a plurality of devices and that performs specified specific processing.

[Means to solve the problem] FIG. 1 shows a block diagram of the principle of the present invention.

In the figure, 1 and 2 are a plurality of individual devices that transfer a specific type of instruction detected in a program, 3 is a common device that executes the transferred specific type of instruction, and 9 is an individual device that includes a specific type of instruction group 8. 7 is a synchronizing means for generating a synchronizing signal; 4 is a synchronizing means for generating a synchronizing signal; and 4 is a synchronizing means for transmitting a specific type of command from the individual device 1.2 in units of a predetermined number of individual devices based on the signal of the synchronizing means 7. 5 means for counting the number of instructions of a specific type executed by the common device 3 for each individual device 1.2, and therefore each inspection program 9 is a counting means. It is configured to read a count of 5 to check the number of instructions of a particular type that have been executed.

[Effect]

According to the present invention, in a system having a plurality of individual devices 1, 2 and a common device 3, the transfer means 4 transmits a specific type of command from the individual devices 1, 2 based on the synchronization means 7. The individual devices 1.2 are sequentially transferred to the common device 3 in units of numbers, and the counting means 5 counts the number of instructions of a specific type executed by the common device 3 for each individual device 1.2, so that each inspection program By checking the count value of the counting means 5, 9 can check whether or not the number of instructions included in the specific type of instruction group 8 has been correctly executed by the common bag W3.

〔Example〕

Hereinafter, embodiments of the present invention will be described with reference to FIG. The same reference numerals indicate the same objects throughout the figures.

Components in FIG. 2 that correspond to those in FIG. 1 are surrounded by dashed lines.

In Figure 2, when the scalar computers 1b and 2b read out a scalar instruction from the program stored in the main memory I/month 0, they execute a scalar operation like a normal general-purpose computer, and when they read out a vector instruction, they execute a vector operation. The program is continued by transferring the calculation result to the computer 3B and receiving the calculation result.

The vector processing unit 3b of the vector computer 3B stores the transferred vector instructions in a buffer (not shown) with a code identifying the scalar computer 1b or 2b that is the transfer source, and reads the instructions from the buffer in parallel. and execute it.

Scalar calculators 1b and 2 are stored in the buffer when reading instructions.
When instructions from b are mixed, they are configured to be executed alternately (multi-processing) in order to improve the throughput of the system.

The inspection program 92 is executed by the scalar computer 2b, and includes a vector instruction group 82 and inspection scalar instructions executed by the vector computer 3b.

The test program 91 is executed by the scalar computer 1b, has the same configuration as the test program 92, and has a synchronization instruction 7b before the vector instruction group 81.

The selection control unit 4b enters the operating state by executing the synchronization instruction 7b, and thereafter responds alternately to vector instruction transfer requests from the scalar computers 1b and 2b, alternately takes in vector instructions, and operates the vector processing unit. 3b simulates an environmental condition in which vector instructions are simultaneously transferred from the scalar computers 1b and 2b.

The counter 5b receives the computation end signal of the vector instruction from the vector processing section 3b via the selection control section 4b, and counts the number of executed instructions for each of the scalar computers 1b and 2b.

Therefore, the selection control unit 4b does not respond to a transfer request until it receives the synchronization command 7b, and after receiving the synchronization command 7b, it alternately receives and receives vector commands from the scalar computers 1b and 2b, and the vector processing unit 3b simulates an environment in which vector instructions are transferred from the scalar computers 1b and 2b at the same time.

The vector processing unit 3b stores the transferred vector instructions in a buffer and, in parallel, reads the instructions alternately from the scalar computers 1b and 2b and executes them (multi-processing).

The counter 5b updates the count value every time execution of one vector instruction is completed. The inspection programs 91 and 92 start the counter 5b at the end of the execution of the vector instruction groups 81 and 82, respectively.
By reading the contents of and comparing it with the number of vector instructions in the program, even in an environment where vector instructions from the scalar computers 1b and 2b are mixed, the vector processing unit 3b can avoid confusing the source of the vector instructions. Confirm that the process is performed correctly. Also, by changing the number of instructions constituting the vector instruction groups 81 and 82 to 1, 2, 3, etc. and comparing them with the contents of the counter 5b, it was confirmed that the multiprocessing function of the vector processing unit 3b functioned normally. It is configured to determine whether or not.

In this embodiment, an example in which synchronization is achieved using the synchronization command 7b has been described, but the same operation and effect can be achieved by a method of transferring a predetermined number of vector commands in accordance with a timer signal.

Further, in this embodiment, a system having two scalar computers has been described, but the present invention can be similarly applied to a system having three or more scalar computers, and the same operation and effect can be obtained.

〔Effect of the invention〕

As explained above, according to the present invention, in a system having a common device that is shared by a plurality of individual devices to perform specified processing, the multiprocessing function of the common device can be easily verified, and design errors can be avoided. This has the effect of easily detecting device failures and improving system reliability.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention, FIG. 2 is a block diagram showing an embodiment of the present invention, and FIG. 3 is a block diagram showing a conventional example. In the figure, 1.2 is an individual device, lb, 2b is a scalar computer, 3 is a common device, 3B is a vector computer, 3b is a vector processing section, 4 is a transfer means, 4b is a selection control section, 5 is a counting means, 5b is a A counter, 7 is a synchronization means, 7b is a synchronization instruction, 8 is a specific type of instruction group, 81.82 is a vector instruction group, 9.91.92 is a test program, and 10 does not indicate main memory. Kaya Ryoichi NPA Ori Pro, Episode 1 Umeki's smile g'1 + L net 1 file, 20 lines 2 days

Claims (1)

[Claims] In a system having a plurality of individual devices (1, 2) that transfer specific types of instructions detected in a program, and a common device (3) that executes the transferred specific types of instructions. , including the specific type of instruction group (8) and the individual device (1, 2)
); a synchronization means (7) for generating a synchronization signal;
) from the individual device (
1, 2) in order to the common device (3); and means (4) for sequentially transferring the instructions of the specific type executed by the common device (3) for each individual device (1, 2). Counting means (5
), and each of the test programs (9) reads the count value of the counting means (5) to test the number of executed instructions of a specific type.