JPH02303030A - Manufacturing method of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the state of an interface by a method wherein a gate oxide film having little interface state is formed by introducing halogen and an ion implantation is performed in a substrate before a heat treatment is performed. CONSTITUTION:A dry oxide film and a thermal oxide film are formed and a capacitor is formed. An ion implantation, in which the amount of implantation is easy to control, is performed in these oxide films before a gate oxide film is formed and a very small amount of halogen is introduced. Here, the halogen element has a strong bonding force with a silicon film, of which a substrate is formed, and a distortion in the interfaces between the silicon film and the oxide films is relaxed. Thereby, the gate oxide film having little interface state can be formed, a highly reliable MOS interface is formed and a MOS transistor of high quality, isolation, bonding and the like are obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a method of manufacturing a highly integrated fine MOS device,
The present invention particularly relates to a method of manufacturing a semiconductor device with excellent radiation resistance and hot carrier resistance.

[Conventional technology]

According to previous reports, a thermal oxide film with excellent radiation resistance and hot carrier resistance can be obtained by attaching a suitable wall of F or C1 to the silicon surface during or before normal dry oxidation. Are known. Examples of this report include, for example, I, E, E, E, Electron Device Letters, Volume 9 (1988), pages 38 to 40 (Y, N15hioka
et al,,1hll! 1:141ectron
Device Letter, EDL-9
(1988) pp, 38-40).

[The invention attempts to solve the problem. Illm) Recently, the degree of integration of semiconductor integrated circuits has been remarkable, and there are extremely strict demands for miniaturization of elements and thinning of thermal oxide films. According to the previous report above.

1=”, Si/5iOz interface properties due to the introduction of CI.

It has been found that the improvement in impurities occurs in a very limited concentration region of these impurities. Therefore, Si/5if
In order to improve the t-field state, it is necessary to control the appropriate amount of halogen element and introduce it into the oxide film.

[Means to solve the problem]

The above purpose is to remove a small amount of doped or Cl by ion implantation, which is easy to control, before forming the gate oxide film.
This is achieved by introducing halogens such as.

[Effect]

The reliability of the interface between the oxide film and silicon largely depends on the strain caused by the lattice mismatch between oxygen and silicon at the interface between the oxide film and silicon. 5i- at the interface with this strain
The bond of 0 is broken by the diffusion of defects to this interface caused by radiation damage and hot carrier electron injection.
It is thought that the interfacial Q position, fixed charge layer, etc. occur.

On the other hand, does it have a strong bonding force with Si? By appropriately introducing a halogen element such as ', C1, etc. into the interface between oxide film and silicon, the strain at this interface can be alleviated, thereby forming a highly reliable interface between oxide film and silicon. .

In the present invention, a highly reliable oxide film for a MOS device can be formed by introducing an appropriate amount of halogen into the Si substrate by ion implantation.

〔Example〕

Hereinafter, the concept of the present invention will be explained in detail with reference to Examples.

(Example 1) In this example, a conventional dry oxide film and a thermal oxide film using the present invention were formed to make a capacitor, and the radiation resistance and hot carrier resistance were investigated.

During thermal oxidation of silicon, this silicon substrate undergoes surface oxidation to grow a 5iOz film of 15 to 40 [nm], and then fluorine ions (?") are injected through the film.
0 CKeV (ion implantation energy) is 10
Ions were implanted by 1"[(1)-2] (implantation amount), annealed at 900°C for 30 minutes, surface oxidation 11Q was removed, and oxidation was performed at 1000°C for about 70 minutes. As a result, it was possible to form a gate insulating film with an A';

(Example 2) In this example, a conventional ultra-dry oxidation jIQ and a thermal oxidation j1 using the present invention were formed to make a capacitor, and the characteristics against hot carriers were investigated.

FIG. 2 shows a conceptual diagram of the double-tube oxidation furnace used in the present invention. The low concentration of hydrothermal heat in this oxidation furnace due to back diffusion from the atmosphere was controlled to 1 ppm or less. Before performing thermal oxidation of silicon using this oxidation furnace, this silicon substrate is subjected to 1 surface oxidation to form a SiOz 11 of 15 to 40 [nm].
%! is grown, and through the exchange, fluorine ions (do-1) are generated at 60 [KeV (ion implantation energy)].
After implanting ions by (implantation amount) and removing surface oxidation, the tube was inserted into the quartz tube 1 inside the oxidation furnace as shown in Figure 2, and 1000
Oxidation was performed at a temperature of about 70 minutes to form a 50 nm thick oxide film.

As a result, constant current electron injection (l O−”A/+
+t) The capacitance-voltage (C-V) characteristics before and after performing gate +) for 200 seconds are shown for (a) conventional super dry oxide film, (b)
) A comparison of super dry oxide films treated with fluorine is shown.

(b) In the oxide film according to the present invention, the change in C-V characteristics after electron injection is smaller than in the super-dry oxide film in (a).
It can be seen that the oxide film b) is stable against hot carrier injection. This effect is also clear from the comparison of the interface states shown in Figure 3.6 Therefore, by introducing fluorine into the super dry oxide film, the conventional super dry oxide 119
Even more reliable than that. A thermal oxide film could be formed.

Another advantage of the present invention is that it also improves the dielectric breakdown voltage of super-dry oxide films. Figure 4 shows the electric field histograms of dielectric breakdown voltages of (a) an oxide film formed in a conventional single-tube oxidation furnace, (b) a conventional super-dry oxide film, and (c) a super-dry oxide film containing fluorine according to the present invention. Let's compare (
The significant improvement in reliability of C) is obvious. Furthermore, the effects of the present invention are also apparent from the dielectric breakdown characteristics over time shown in FIG.

(Example 3) In this example, a memory cell (batch erasing type E"FROM) having the cross section shown in FIG. 6 was created, and the influence of the introduction of fluorine on current-voltage characteristics was investigated.

Before forming the gate oxide film 15 by thermal oxidation of silicon, this silicon substrate is subjected to surface oxidation to
A SiOx film of 40 [nni] was grown, and fluorine ions (do"") were ion-implanted through the film by 1012 [m-"] (implantation 1 yt) at 60 [KeV] (ion implantation energy) to form a surface oxide film. After removing the oxide, a lo[nml] gate oxide film was formed by oxidizing with dry oxygen at 900°C for about 20 minutes.Following, a floating gate 162 interlayer insulating film and a control gate 17 were formed, and the memory cell was formed. Created.

In order to evaluate the tunnel current characteristics during the erase operation of the same memory cell, the potential and base level of the control gate 17 were set to O[V], the drain potential was set to floating, and the source potential was swept to obtain the current-voltage characteristics of 81+1. I made a decision. Figure 7 shows the results.

Figure 7(a) shows the distribution of breakdown voltage when judged with a current of I x 10'' [A] in the current-voltage characteristics when fluorine treatment is performed according to this example, and Figure 7(b) shows This is a similar breakdown voltage distribution in the current positive characteristics when conventional fluorine treatment is not performed.As is clear from the figure, when fluorine treatment is applied, the variation in current-voltage characteristics is significantly reduced. As a result, the variation in threshold voltage after erasing was improved from 2.5V to 2.5V, and as a result, the access time was improved from 105ns to 85ns.

(Example) In this example, a memory cell (MNOS type field effect transistor) having a cross section shown in FIG. 8 was prepared, and the influence of introduction of fluorine on current-voltage characteristics was investigated.

Gate oxidation 11 by thermal oxidation of silicon! , S a 3
Before forming the silicon substrate, the silicon substrate was subjected to surface oxidation to form a 5iOz film of 15-40 [nml], and fluorine ions (1) were irradiated through the film at 60 [KeV] (ion implantation energy) l' Q12 [cm-”]
After implanting ions by (implantation amount) and removing the surface oxide film, a 2 [nm] oxide film was formed. Furthermore,
After forming a nitride film 34 and an electrode 35, the cross section 1 shown in FIG.
A memory cell having m was created.

In order to evaluate the tunnel current characteristics during the erase operation of the same memory cell, write (by applying a positive high voltage to the gate electrode 35, electrons are tunnel-injected from the substrate 31 into the nitride 11Q34, and electrons are・Erase (
The gate electrode 35 was grounded, a positive voltage was applied to the substrate 31, and holes were tunnel-injected from the substrate 31 into the oxide 11'u 33. After repeating the cycle 1000 times, the tunnel current was measured. . As a result, the memory cell using the present invention had a tunnel current that was one order of magnitude smaller than that of the conventional memory cell. Correspondingly, we were able to improve the information retention time from 20 years to 200 years under actual operating conditions.

Effects similar to those of Examples 1, 2, and 3.4 were also observed when the ion implantation amount was 1011 to 10"[C11-"] and the ion implantation energy was 30 to 120 [KeV].

The same effect as in the above Examples 1, 2, 3.4 is obtained in the above Example 1.
, 2, 3.4 have similar effects when the annealing time is 10 to 100
It was also confirmed that heat treatment was performed at an annealing temperature of 900 to 1000°C.

The same effect as in Examples 1, 2, and 3.4 can be obtained with a gate insulating film thickness of 10 nm, 2 Q nm, 30 nm, or 40 nm.
It was also confirmed by the capacitor.

Effects similar to those of Examples 1, 2, and 3.4 can be obtained using conventionally known oxidation methods other than those described above, such as wet oxidation (approximately
It is also confirmed in high-pressure oxidation (oxidation in an oxidizing atmosphere containing water vapor with a vapor pressure of 0.00 Torr), high-pressure oxidation, etc.

In addition, the same effect as in Examples 2 and 3.4 above was confirmed even when halogen group chlorine, bromine, and iodide were used in addition to fluorine in the gate oxide film.

In Examples 1, 2, and 3.4 above, the reliability of the interface between the oxide film and silicon was evaluated using the hot carrier injection method, but exactly the same effect was obtained using X-rays and electron edge irradiation. was also confirmed.

~ [Effects of the Invention] According to the present invention, a gate oxide film with fewer interface states could be formed by introducing halogen. This makes it possible to form a highly reliable MOS interface, resulting in high-quality MOS
S-transistors, isolations, junctions, etc. can be formed.

[Brief explanation of the drawing]

Figure 1 shows (a) conventional super-dry oxide film, (b) volume-voltage characteristics of super-dry oxide film containing fluorine before and after electron injection,
Figure 2 is a conceptual diagram of a double-tube oxidation furnace, and Figure 3 is the energy distribution of interface states after electron injection in (a) conventional super-dry oxide film and (b) super-dry oxide film containing fluorine. Figure 4 shows a comparison of the dielectric breakdown histograms of (a) a conventional dry oxide film, (b) a conventional super-dry oxide film, and (C) a super-dry oxide film containing fluorine. The figure is (
A comparison of the dielectric breakdown characteristics over time of a) a conventional super-dry oxide film and (b) a super-dry oxide film containing fluorine is shown. (FIG. 5 is a cross-sectional view of a memory cell explaining Example 3,
FIG. 7 shows the breakdown voltage distribution obtained by measuring the gate-source current-voltage characteristics showing the effect of fluorine treatment in Example 3, (a) shows the effect of fluorine treatment, and (b) shows the This is the case when no processing is performed. FIG. 8 is a cross-sectional view of a memory cell explaining Example 4. DESCRIPTION OF SYMBOLS 11... P-type silicon substrate, 12... Inter-element isolation insulating film, 13... Layer tO1 insulating film, 14... Aluminum wiring. 15... Gate oxide film, 16... Floating gate electrode, 17... Control gate electrode, 18...
...n-type semiconductor region, 19...n◆-type semiconductor region (
), 20... p÷ type semiconductor region, 21... n◆ type semiconductor region (constituting drain region), 31... substrate silicon, 32... forming source and drain diffusion layer, 33... gate oxide film, 34... nitride film, 35... gate electrode, 36...
- Passivation film, 37...aluminum wiring. Fist l Mouth F7177 [7 wo Snake (V) 1P-2 eyes 3 day surface r tensile (ev) 丞 4 Mouth voltage ()4ri 5th mouth 10” lo-470-27Q'10210'B
! Between f (Kiri 6th part 8th part)

Claims (1)

[Scope of Claims] 1. Manufacturing of a semiconductor device characterized in that in a step of thermally oxidizing a silicon substrate of a field effect transistor, ions of a halogen element are implanted into the substrate before the thermal oxidation, and then the thermal oxidation is performed. Method. 2. A method for manufacturing a semiconductor device, which comprises, in a step of thermally oxidizing a silicon substrate of a field-effect transistor, ion-implanting a halogen element into the substrate before the thermal oxidation, performing a heat treatment, and then performing the thermal oxidation. 3. The method for manufacturing a semiconductor device according to claims 1 and 2, wherein the field effect transistor is a MOS field effect transistor. 4. The method for manufacturing a semiconductor device according to claims 1 and 2, wherein the field effect transistor is an NMOS field effect transistor. 5. An insulated gate type electric field in which the field effect transistor has a floating gate electrode provided on a gate insulating film and a control gate electrode provided at least partially on top of the floating gate electrode via an interlayer insulating film. A method for manufacturing a semiconductor device according to claims 1 and 2, wherein the semiconductor device is an effect type transistor.