JPH0230641U - - Google Patents

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Publication number
JPH0230641U
JPH0230641U JP6850989U JP6850989U JPH0230641U JP H0230641 U JPH0230641 U JP H0230641U JP 6850989 U JP6850989 U JP 6850989U JP 6850989 U JP6850989 U JP 6850989U JP H0230641 U JPH0230641 U JP H0230641U
Authority
JP
Japan
Prior art keywords
circuit
switch
receiver
reception
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6850989U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6850989U priority Critical patent/JPH0230641U/ja
Publication of JPH0230641U publication Critical patent/JPH0230641U/ja
Pending legal-status Critical Current

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  • Channel Selection Circuits, Automatic Tuning Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案に係る短波受信装置用付属回路
の一実施例を示す電気結線図である。 1…アンテナ、2…受信機本体、100…付属
回路、101…シリアルインタフエース回路、1
02…表示回路、103…記憶回路、104…電
池、105…MPU(マイクロプロセツサ)、1
06…電圧比較回路、107…タイマ回路、10
8…可変抵抗器、109…デコーダ、110―1
,110―2…電子スイツチ、111…可変抵抗
器、112…起動/停止スイツチ、113…掃引
/走査用の双投スイツチ、114…チヤネルスイ
ツチ、115…プログラムスイツチ、116〜1
25…テンキースイツチ、126…メモリ用スイ
ツチ、200…リモートコントロールユニツト、
201…可変抵抗器、202〜204…双投スイ
ツチ。
FIG. 1 is an electrical wiring diagram showing an embodiment of an auxiliary circuit for a shortwave receiver according to the present invention. 1... Antenna, 2... Receiver body, 100... Attached circuit, 101... Serial interface circuit, 1
02...Display circuit, 103...Memory circuit, 104...Battery, 105...MPU (microprocessor), 1
06... Voltage comparison circuit, 107... Timer circuit, 10
8...Variable resistor, 109...Decoder, 110-1
, 110-2...Electronic switch, 111...Variable resistor, 112...Start/stop switch, 113...Double throw switch for sweep/scanning, 114...Channel switch, 115...Program switch, 116-1
25... Numerical key switch, 126... Memory switch, 200... Remote control unit,
201...variable resistor, 202-204...double throw switch.

Claims (1)

【実用新案登録請求の範囲】 (1) 短波受信装置用付属回路において、マイク
ロプロセツサと、受信機本体との間で受信周波数
制御データ、電波型式制御データおよび中間周波
数帯域制御データを交換するシリアルインタフエ
ース回路と、一方の入力端子に前記受信機本体か
らAGC電圧が供給され、他方の入力端子に基準
電圧が供給される電圧比較回路と、前記基準電圧
を手動で設定できる可変抵抗器と、所要周期のパ
ルスを出力するタイマ回路と、表示回路と、記憶
回路と、起動/停止スイツチ、掃引/走査用スイ
ツチ、チヤネルスイツチ、前記記憶回路への書込
みを行うプログラムスイツチおよびメモリ用スイ
ツチとを備え、走査受信時には予めプログラムし
たシーケンスに従つて前記タイマ回路から出力す
るパルス周期に同期して前記記憶回路内のデータ
を前記受信機本体へ転送し次々と受信チヤネルを
切り換えて前記AGC電圧が前記基準電圧を越え
た際に走査を停止するよう構成し、さらに掃引受
信時には予め設定された2つの周波数間を一定の
周波数間隔で受信周波数を掃引して前記AGC電
圧が前記基準電圧を越えた際に掃引を停止するよ
う構成することを特徴とする短波受信装置用付属
回路。 (2) 実用新案登録請求の範囲第1項記載の短波
受信装置用付属回路において、前記タイマ回路か
ら出力する前記パルス周期は、手動可変抵抗器で
可調整に設定してなる短波受信装置用付属回路。
[Claims for Utility Model Registration] (1) Serial device for exchanging reception frequency control data, radio wave type control data, and intermediate frequency band control data between a microprocessor and the receiver body in an auxiliary circuit for a shortwave receiver. an interface circuit, a voltage comparison circuit whose one input terminal is supplied with the AGC voltage from the receiver body and whose other input terminal is supplied with a reference voltage, and a variable resistor that allows the reference voltage to be manually set; It includes a timer circuit that outputs pulses of a required period, a display circuit, a memory circuit, a start/stop switch, a sweep/scan switch, a channel switch, a program switch that writes to the memory circuit, and a memory switch. During scanning reception, the data in the storage circuit is transferred to the receiver main body in synchronization with the pulse cycle output from the timer circuit according to a preprogrammed sequence, and the reception channels are switched one after another so that the AGC voltage becomes the reference. It is configured to stop scanning when the voltage exceeds the reference voltage, and furthermore, during sweep reception, the reception frequency is swept at a constant frequency interval between two preset frequencies, and when the AGC voltage exceeds the reference voltage. An accessory circuit for a shortwave receiver, characterized in that it is configured to stop sweeping. (2) Utility Model Registration In the accessory circuit for a shortwave receiver according to claim 1, the pulse period output from the timer circuit is adjustable with a manual variable resistor. circuit.
JP6850989U 1989-06-12 1989-06-12 Pending JPH0230641U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6850989U JPH0230641U (en) 1989-06-12 1989-06-12

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6850989U JPH0230641U (en) 1989-06-12 1989-06-12

Publications (1)

Publication Number Publication Date
JPH0230641U true JPH0230641U (en) 1990-02-27

Family

ID=31293825

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6850989U Pending JPH0230641U (en) 1989-06-12 1989-06-12

Country Status (1)

Country Link
JP (1) JPH0230641U (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110908A (en) * 1975-03-25 1976-09-30 Torio Kk
JPS54100201A (en) * 1978-01-24 1979-08-07 Matsushita Electric Ind Co Ltd Field intensity discrimination device
JPS54125911A (en) * 1978-03-24 1979-09-29 Japan Radio Co Ltd Automatic scan receiver

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS51110908A (en) * 1975-03-25 1976-09-30 Torio Kk
JPS54100201A (en) * 1978-01-24 1979-08-07 Matsushita Electric Ind Co Ltd Field intensity discrimination device
JPS54125911A (en) * 1978-03-24 1979-09-29 Japan Radio Co Ltd Automatic scan receiver

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