JPH0236607A - Limiter circuit - Google Patents
Limiter circuitInfo
- Publication number
- JPH0236607A JPH0236607A JP63185634A JP18563488A JPH0236607A JP H0236607 A JPH0236607 A JP H0236607A JP 63185634 A JP63185634 A JP 63185634A JP 18563488 A JP18563488 A JP 18563488A JP H0236607 A JPH0236607 A JP H0236607A
- Authority
- JP
- Japan
- Prior art keywords
- limiter
- circuit
- feedback
- limiter circuit
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Tone Control, Compression And Expansion, Limiting Amplitude (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は画像信号等のリミッタ回路に係り、特によい精
度と周波数特性と歪特性が要求される回路に好適なリミ
ッタ回路に関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a limiter circuit for image signals, etc., and particularly to a limiter circuit suitable for circuits that require good accuracy, frequency characteristics, and distortion characteristics.
従来のリミッタ回路は例えば「OPアンプ回路の設計J
岡村姑夫著、CQ出版社発行(昭和60年)第179頁
から第183頁に論じられているように、ダイオードの
不確定領域(約0.7V)が広い点と歪特性も悪い点が
あるのを改善するために、OPアンプを利用した回路が
工夫されている。For example, the conventional limiter circuit is described in "OP Amplifier Circuit Design J
As discussed in Mao Okamura, published by CQ Publishing (1985), pages 179 to 183, diodes have a wide uncertainty region (approximately 0.7 V) and poor distortion characteristics. In order to improve this, circuits using OP amplifiers have been devised.
」二記従来技術のOPアンプを利用したリミッタ回路は
、す、ミッタをかけない線形領域においてはその周波数
特性がOPアンプの周波数特性によって制限され、また
リミッタをかけるリミッタ領域においてはOPアンプの
特性により数LOOKHz以上の信号に対してリミッタ
がかからなくなる問題があった。2. In the conventional limiter circuit using an OP amplifier, its frequency characteristics are limited by the frequency characteristics of the OP amplifier in the linear region where the limiter is not applied, and the characteristics of the OP amplifier are limited in the limiter region where the limiter is applied. Therefore, there was a problem in that the limiter was not applied to signals of several LOOKHz or more.
本発明の目的は画像信号等の広帯域(4MHz)の信号
に対して精度のよいリミッタをかけ、かつ非リミッタ領
域においては低歪特性にすることのできるリミッタ回路
を提供するにある。SUMMARY OF THE INVENTION An object of the present invention is to provide a limiter circuit which can apply a highly accurate limiter to a wide band (4 MHz) signal such as an image signal and can provide low distortion characteristics in a non-limiter region.
上記目的は、リミッタ回路を差動増幅器を利用した帰還
形として、その帰還回路をトランジスタを用いて構成す
ることにより広帯域化するとともに、非リミッタ領域に
おいてはリミッタ用のトランジスタ素子を完全にOFF
させることにより歪を小さくしたリミッタ回路により達
成される。The above purpose is to make the limiter circuit a feedback type using a differential amplifier, to widen the band by configuring the feedback circuit using transistors, and to completely turn off the limiter transistor element in the non-limiter region.
This is achieved by a limiter circuit with reduced distortion.
上記リミッタ回路は、帰還形リミッタ回路を差動増幅器
とリミッタ用帰還トランジスタで構成しており、リミッ
タをかけない領域においてはリミッタ用1−ランジスタ
を完全にOFFすることにより、原信号を歪ませること
がないうえ周波数特性の劣化を生じさせることがなく、
またリミッタ領域においては設定電圧よりの差分を帰還
回路のループ利得骨の1に圧縮するので、この帰還回路
を広帯域で高利得にすれば高い周波数までリミッタをか
けることが可能である。The above limiter circuit consists of a feedback limiter circuit consisting of a differential amplifier and a feedback transistor for the limiter, and in the region where the limiter is not applied, the original signal is distorted by completely turning off the 1-transistor for the limiter. In addition to not causing any deterioration of frequency characteristics,
Furthermore, in the limiter region, the difference from the set voltage is compressed to 1, which is the loop gain of the feedback circuit, so if the feedback circuit is made to have a high gain over a wide band, it is possible to apply a limiter to high frequencies.
以下に本発明の一実施例を第1図から第3図により説明
する。An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.
第1図は本発明によるリミッタ回路の一実施例を示す下
限リミッタ回路の構成図である。第1図において、Vi
nは入力端子、Voutは出力端子。FIG. 1 is a configuration diagram of a lower limiter circuit showing an embodiment of the limiter circuit according to the present invention. In Figure 1, Vi
n is an input terminal, and Vout is an output terminal.
V refはリミッタ設定電圧端子、Vcc、 Vee
は電源端子、Tri、 Tr2は増幅用NPNトランジ
スタ、Tr3はリミッタ用帰還PNP トランジスタ、
1は差動増幅器(比較増幅器)である。V ref is the limiter setting voltage terminal, Vcc, Vee
is a power supply terminal, Tri, Tr2 is an NPN transistor for amplification, Tr3 is a feedback PNP transistor for limiter,
1 is a differential amplifier (comparison amplifier).
上記の構成において、差動増幅器1のトランジスタTr
iのベース電圧がリミッタ設定電圧Vrefより高い時
には、リミッタ用トランジスタTr3は完全に○FFL
、てぃて、出方電圧Voutは次式となる。In the above configuration, the transistor Tr of the differential amplifier 1
When the base voltage of i is higher than the limiter setting voltage Vref, the limiter transistor Tr3 is completely ○FFL.
, the output voltage Vout is expressed by the following equation.
Vout= 管 VinR,+R。Vout= VinR, +R.
この出力電圧Voutは入力電圧Vinに対して線形動
作となる。また差動増幅器1のトランジスタTriのベ
ース電圧が設定電圧V refより低い時には、出力電
圧Voutは次式で表わされる。This output voltage Vout operates linearly with respect to the input voltage Vin. Further, when the base voltage of the transistor Tri of the differential amplifier 1 is lower than the set voltage V ref, the output voltage Vout is expressed by the following equation.
Vout=Vref−(Vref −・Vin)/βR
1+Rま
ただしβは帰還回路のループ利得である。したがってβ
が大きい時には、出力電圧Voutは次式となる。Vout=Vref-(Vref-・Vin)/βR
1+R where β is the loop gain of the feedback circuit. Therefore β
When Vout is large, the output voltage Vout becomes the following equation.
V out ’4 V ref
この出力電圧Voutは設定電圧Vrefのリミッタ特
性を示す。V out '4 V ref This output voltage Vout shows the limiter characteristics of the set voltage Vref.
第2図(a)、(b)は第1図のR1=R2の時の回路
の測定値を示す特性図で、第2図(a)は静特性。FIGS. 2(a) and 2(b) are characteristic diagrams showing the measured values of the circuit when R1=R2 in FIG. 1, and FIG. 2(a) shows the static characteristics.
第2図(b)は歪特性を示す。第2図(σ)において、
設定電圧Vref=−0,5Vの時の入力電圧Vin(
V)に対する出力電圧Vout(V)の測定値が示され
、リミット領域におけるリミット特性がよく。FIG. 2(b) shows the distortion characteristics. In Figure 2 (σ),
Input voltage Vin (when set voltage Vref=-0,5V
The measured values of the output voltage Vout(V) with respect to V) are shown, and the limit characteristics in the limit region are good.
また線形領域における線形特性も高周波までよい。Furthermore, the linear characteristics in the linear region are also good up to high frequencies.
また第2図(b)において、設定電圧V ref =−
0,5V、入力電圧Vin= I Vp−p、 2 M
)Tzの時の入力オフセット電圧V off (V )
に対する2次。Further, in FIG. 2(b), the set voltage V ref =-
0.5V, input voltage Vin=I Vp-p, 2M
) Tz, the input offset voltage V off (V )
Quadratic for.
3次歪減衰量(dB)が示され、線形領域における歪特
性がよい。The third-order distortion attenuation (dB) is shown, and the distortion characteristics in the linear region are good.
第3図は本発明によるリミッタ回路の他の実施例を示す
上限リミッタ回路の構成図である。第3図において、第
1図と同一符号は相当部分を示し、Tri、 Tr2は
増幅用PNP)−ランジスタ、Tr3はリミッタ用帰還
NPNトランジスタである。FIG. 3 is a block diagram of an upper limiter circuit showing another embodiment of the limiter circuit according to the present invention. In FIG. 3, the same reference numerals as in FIG. 1 indicate corresponding parts, Tri and Tr2 are amplifying PNP transistors, and Tr3 is a limiter feedback NPN transistor.
上記の構成において、第1図の下限リミッタ特性と同様
の上限リミッタ特性かえられる。In the above configuration, the upper limiter characteristic similar to the lower limiter characteristic in FIG. 1 can be changed.
本発明によれば、簡単な回路により画像信号等の小振幅
で広帯域な信号に対して精度と歪特性と周波数特性のよ
いリミッタ回路かえられる効果がある。According to the present invention, a limiter circuit with good accuracy, distortion characteristics, and frequency characteristics can be replaced with a simple circuit for small amplitude, wideband signals such as image signals.
第1図は本発明によるリミッタ回路の一実施例を示す下
限リミッタ回路の構成図、第2図(a)。
(b)は第1図の静特性、歪特性図、第3図は本発明に
よるリミッタ回路の他の実施例を示す上限リミッタ回路
の構成図である。
1・・・差動増幅器(比較増幅器) r Tr3・・・
リミッタ用帰還トランジスタ、Vin・・入力端子、
Vout・・・出力端子、 Vref・・・リミッタ設
定電圧端子。FIG. 1 is a configuration diagram of a lower limiter circuit showing an embodiment of the limiter circuit according to the present invention, and FIG. 2(a). (b) is a static characteristic and distortion characteristic diagram of FIG. 1, and FIG. 3 is a configuration diagram of an upper limiter circuit showing another embodiment of the limiter circuit according to the present invention. 1... Differential amplifier (comparison amplifier) r Tr3...
Feedback transistor for limiter, Vin...input terminal,
Vout...Output terminal, Vref...Limiter setting voltage terminal.
Claims (1)
帰還型リミッタ回路を差動増幅器と、リミッタ用帰還ト
ランジスタとから構成したことを特徴とするリミッタ回
路。1. In a feedback limiter circuit using a differential amplifier,
A limiter circuit characterized in that a feedback limiter circuit is constructed from a differential amplifier and a limiter feedback transistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63185634A JPH0236607A (en) | 1988-07-27 | 1988-07-27 | Limiter circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63185634A JPH0236607A (en) | 1988-07-27 | 1988-07-27 | Limiter circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0236607A true JPH0236607A (en) | 1990-02-06 |
Family
ID=16174204
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63185634A Pending JPH0236607A (en) | 1988-07-27 | 1988-07-27 | Limiter circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0236607A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009038789A (en) * | 2007-04-19 | 2009-02-19 | National Semiconductor Germany Ag | Circuit arrangement and method for limiting signal voltage |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49121458A (en) * | 1973-03-19 | 1974-11-20 | ||
| JPS5028260A (en) * | 1973-07-11 | 1975-03-22 | ||
| JPS5528684A (en) * | 1978-08-23 | 1980-02-29 | Mitsubishi Electric Corp | Amplitude limit circuit |
| JPS58120311A (en) * | 1982-01-13 | 1983-07-18 | Toshiba Corp | Limiter |
| JPS58194417A (en) * | 1982-05-07 | 1983-11-12 | Rohm Co Ltd | Diode |
| JPS6441512A (en) * | 1987-08-07 | 1989-02-13 | Mitsubishi Electric Corp | Clip circuit |
-
1988
- 1988-07-27 JP JP63185634A patent/JPH0236607A/en active Pending
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS49121458A (en) * | 1973-03-19 | 1974-11-20 | ||
| JPS5028260A (en) * | 1973-07-11 | 1975-03-22 | ||
| JPS5528684A (en) * | 1978-08-23 | 1980-02-29 | Mitsubishi Electric Corp | Amplitude limit circuit |
| JPS58120311A (en) * | 1982-01-13 | 1983-07-18 | Toshiba Corp | Limiter |
| JPS58194417A (en) * | 1982-05-07 | 1983-11-12 | Rohm Co Ltd | Diode |
| JPS6441512A (en) * | 1987-08-07 | 1989-02-13 | Mitsubishi Electric Corp | Clip circuit |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009038789A (en) * | 2007-04-19 | 2009-02-19 | National Semiconductor Germany Ag | Circuit arrangement and method for limiting signal voltage |
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