JPH0242491A - Musical sound synthesizer - Google Patents

Abstract

PURPOSE:To generate musical sounds rich in the change of tone color by changing and controlling the characteristic of a digital filter as time passes while waveform data circulates. CONSTITUTION:In the title musical sound synthesizer, having a data circuit in which a data delay means and a digital filter are connected like a closed loop, to take out the circulating data as the musical sound waveform data by circulating the waveform data through the data circuit, a control means to change and control the characteristic of the digital filter as time passes while the waveform data circulates is provided. Thus, the musical sounds rich in the change of the tone color can be generated and attack feeling, decay feeling, etc., can be sufficiently expressed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a musical tone synthesizer that generates a musical tone whose timbre changes over time. This made it possible.

Regarding electronic musical instruments that generate musical tones whose amplitude changes over time and whose timbre (waveform) also changes at the same time, the Applicant of the present application filed an application on December 16, 1975.
It is explained in detail in Patent Application No. 149148 (Japanese Unexamined Patent Publication No. 73721/1989) entitled "Electronic Musical Instrument" (hereinafter referred to as "Hikari Application"). In the electronic musical instrument shown in this earlier application, the musical sound waveform generating means has a data circulation path in which a temporary storage circuit such as a RAM (random access memory) and a digital filter are connected in a closed loop. By circulating the digital waveform data, the data being circulated is extracted as musical waveform data.

In the above-mentioned previous invention, since the filter characteristics are not controlled to be changed while musical tones are being generated, there is a lack of timbre change, and the expression of the attack feeling and the decay feeling is not sufficient.

An object of the present invention is to make it possible to generate musical tones with rich timbre changes, and to also make it possible to sufficiently express the sense of attack, decay, etc.

This invention has a data circulation path in which a data delay means and a digital filter are connected in a closed loop, and by circulating waveform data through this data circulation path, the data being circulated is extracted as musical waveform data. The musical tone synthesis apparatus is characterized in that it is provided with a control means for changing and controlling the characteristics of the digital filter over time while the waveform data is being circulated.

Further, such a musical tone synthesis device is provided with an instruction means for instructing the start of generation and the start of attenuation of musical tones, and the control means is configured to increase the amplitude of the musical sound waveform in response to the instruction to start generation by the instruction means. The characteristics of the digital filter may be controlled so as to reduce the amplitude of the musical sound waveform in response to an instruction to start attenuation by the instruction means.

According to the configuration of the present invention, since the characteristics of the digital filter are changed and controlled over time while the waveform data is being circulated, it is possible to generate musical tones with rich timbre changes.

Further, as described above, if the characteristics of the digital filter are controlled in response to the musical tone generation start instruction and the decay start instruction, respectively, it is possible to effectively express a sense of attack or decay.

The invention will now be described in detail with reference to embodiments shown in the accompanying drawings.

FIG. 1 is a block diagram showing an electronic musical instrument according to an embodiment of the present invention. In the figure, IO is a common information transmission path, and 20 is a CPU. The CPU referred to in this specification is equipped with a control circuit, an arithmetic circuit, and a register, and together with a memory device located outside the CPU, general-purpose data that can process data input from the input device of a terminal and output it to the output device of the terminal. means a device equipped with processing functions. Further, a microprocessor is assumed to be used as a preferred design example. Data processing by the CPU 2Q is performed using programs stored in the memory device 22 and the CPU 2Q.
It is determined by the control signal given from the U control panel section 24. Therefore, by changing these appropriately, the data processing method can be changed freely.

In FIG. 1, 30 is a keyboard section, 32 is a tone control panel section,
34 is a musical tone generator, 36 is a display panel, 38 is a modulation/demodulation circuit (MODEM) for a communication line, and 39 is a timer for supplying time information for data processing. What should be noted here is that in conventional electronic musical instruments, the keyboard section, timbre control panel section, musical tone generation section, etc. are interconnected by dedicated wiring, but in this invention, instead of these wiring, By providing a common information transmission path lO, it is possible to reduce the number of wiring lines and make the system multifunctional.

Note that 21.25.31.33.35.37 is the information transmission path 10 common to the CPU 20, CPU control panel section 24, keyboard section 30, tone control panel section 32, musical tone generation section 34, and display panel section 36, respectively. The operations of these circuits will be described together with the operations of the CPU and each terminal device.

In the apparatus shown in FIG. 1, various signals input and output between each device via a common information transmission path IO are
Classified as shown in the table.

Table 1 In Table 1, the signal SI2 includes control signals for writing and reading given from the CPU 20 to the memory device 22, and the signal S16 is a control signal given to the memory device 22 from the CPU 20.
The signal S21 includes signals such as sound generation control and tone color settings generated by the PU 20 and supplied to the musical tone generator 34. The signal S21 includes signals such as instructions and data sent to the CPU 20. The signal S31 is 1! It includes a key on/off signal and a key data signal as key press information generated in response to a key operation on the panel section 30, and the signal S41 is a tone selection signal generated in response to a tone selection operation on the tone control panel section 32. The signals 332 and 342 represent direct access to the memory device 22, the signal S36 includes a key on/off signal and the key data signal, the signal 346 includes a timbre data signal, and the signal 38+ includes signals for program selection, CPU direct control, etc.

Here, signals 336 and S46 are similar to signals S31 and S41, respectively, but signals S3+ and S41
Rather than being supplied to the CPU 20 as in the example shown in FIG.

The signals S rt, S 371 S 4t are each similar to or similar to the signal S 16°S 36+S 46.

Also, the signals S18+ 338, 34 & are respectively cpu
20 and terminal equipment (in this case, the keyboard section 30 and the tone control panel section 32). If the status of the appropriate event is displayed on the display panel 36, it will be convenient for control in the next stage.

In Table 1, the signals S 12+ 21+ S 5+
Similar signals are sent and received in electronic computers that process business or technical data, and are well known in the technical field, so a description thereof will be omitted. In addition, the common information transmission path 10 shown in FIG.
An external storage device, an external data processing device, etc. may be connected to the , or one or more musical tone generating sections may be connected in addition to one musical tone generating section 34, and these devices and Table 1 Signals are exchanged between the devices shown in
Since the portions related to the external storage device and the external data processing device are well known in the field of general computer technology, their explanation will be omitted.

The formats of these signals and the format of the common information transmission path that should be determined according to the formats can be freely selected by design. The signals shown in Table 1 can be numerically divided into an address part, a data part, and an instruction part, and the address part consists of a machine address specifying the device shown as the receiving side in Table 1, and If there are multiple units, such as a musical tone generator, they can be divided into device addresses that specify which one of them, data addresses that specify which register in the device to input, etc. For example, a signal that includes all of these It is also possible to transmit the information in a bit serial format and use the common information transmission path 10 as a single line transmission path. In such a case, an interrupt priority order is determined for each device, and the interrupt is controlled according to the priority order. The CPU 20 also changes (selects), jumps in, stops, waits for, etc. the stupid program that receives and processes these interrupts. These matters are matters to be determined based on the design of how the electronic musical instrument of the present invention is constructed, so their explanation will be omitted.

Next, the configuration of the musical tone generator 34 will be explained.

The signals to be input to the musical tone generator 34 from the common information transmission path IO are a timbre data signal, a key data signal, and a key on/off signal, that is, an envelope start signal and a release start signal. The fundamental frequency of the musical tone generated by the musical tone generator 34 is determined by the key data signal, the attack waveform is started by the envelope start signal, and the release waveform is started by the release start signal. The shapes of the attack waveform and release waveform, that is, the shape of the musical tone amplitude envelope and the musical sound waveform, are determined by the timbre data signal.

By the way, rather than generating similar musical sound waves throughout the entire sound generation period from the envelope start (the start of sound production) to the release finish (the end of sound production), the sound waveforms gradually change during the attack and release periods, and therefore their harmonic content also increases. It is known that musical tones with preferable tones similar to musical instruments such as pianos, harps, xylophones, etc. can be obtained by changing the timbre data signal. Therefore, it is the most effective way to generate such musical tones.

FIG. 2 is a block diagram showing an example of the configuration of the musical tone generating section 34, and in the figure, the following signals (a) to (e) are applied to the musical tone generating section 34 from the outside. There is something.

(a) Key code indicating the turned-on key This key code includes an octave code OCC indicating the octave to which the turned-on key belongs, and a note code indicating the name of the note corresponding to the turned-on key among the 12 note names within the octave. The octave code oCC is stored in the register 800, and the note code NTC is stored in the register 500.

(b) Parameter codes Al + A2 i A3 for determining the initial waveform of musical tones These codes AI and A2 * A3 are stored in registers 140, 150, and 160, respectively.

(C) Parameter codes P and Q for determining the characteristics of the digital filter 5 These codes P and Q are stored in registers 520° and 54, respectively.
Stored at 0.

(d) Tone waveform switching signal S for switching the tone waveform from the initial waveform to the cyclic waveform This signal S is 1-bit No. 18 and is stored in the register 21.

(e) Musical tone output enable signal E for enabling musical tone generation This signal E is a 1-bit signal and is stored in the register 71.

Block 1 surrounded by a dotted line represents the initial waveform generator, and the second
In the example shown in the figure, there are memories 11, 12, 13 storing different tone waveforms, multiplication circuits 14, 15, 16, and addition circuit 17, and multiplication parameter codes A+, A
2. By changing A3, the initial waveform can be changed arbitrarily. In addition, as a numerical example for convenience of explanation, the memories 11, 12, and 13 store one period of the musical sound waveform at 1.02
It is assumed that a 16-bit digital code (including positive and negative signs) representing the amplitude at each sample point divided into four equal parts is stored in a ROM (read-only memory) at an address in the phase order of the sample point.

2 is a selector, 3 is a first-in, first-out type memory (hereinafter abbreviated as FIFO memory), 4 is a shift register, and block 5 surrounded by a dotted line is a digital filter. The shift register 4 and the filter 5 are circuits for circulating the musical sound waveform output from the selector 2 through the filter 5 every cycle and gradually changing the musical sound waveform according to the characteristics of the filter 5. This is explained in detail in the application.

In the embodiment shown in FIG. 2, the filter 5 includes a register 51,
It is a regression type one-stage digital filter composed of multiplication circuits 52, 54 and addition circuits 53, and the characteristics of the filter 5 can be changed by changing parameter codes P and Q. For example, by setting the value p of the parameter code P to p>0, low-order harmonics are hardly attenuated,
High-order overtones can be made to have a characteristic of rapidly attenuating over time, and can simulate the musical sounds of pianos, guitars, and the like. Further, by setting various values q of the parameter code Q, the gain and attenuation rate can be controlled, and the waveforms of the rise and fall of musical tones can be simulated by yc.

Furthermore, by setting p=o and q=t, it is possible to simulate the continuous waveform of a musical tone.

6 is a sound system including a D/A converter, an output amplifier, a speaker, etc.; 7 is a gate circuit for controlling the output of musical tone signals from the FIFO memory 3;

80 is a clock pulse generator, 81 is an AND gate, 8
2 is a frequency dividing circuit, 83 is an address counter, 85 is an address counter output connection control device, 86 is a flip-flop, 501 is a read clock pulse generator, 502 is an FI
A counter 503 is a counter for controlling the writing of the FO memory 3, and a counter 503 is a counter for controlling the reading of the FIFO memory 3.

The musical tone generator 34 shown in FIG. 2 is characterized in that musical waveforms are written into the FIFO memory 3 at a constant clock speed, and are read out at a variable or locked speed within a range that does not exceed the writing clock speed, and octave codes. The object of the present invention is to include word number control means for changing the number of samples or the number of words in one period of a musical tone waveform by controlling the oCC.

The operation of the circuit shown in FIG. 2 will be explained below using numerical examples.

Table 2 shows specific examples of the chord structure of the octave code oCC, the octaves it represents, and the number of samples in one cycle of the musical sound waveform for each octave.

Table 2 Kurotsuta pulse generator 80 is 2. A clock pulse φ having a frequency near [MHz] (hereinafter abbreviated as 2 [MHz] for simplicity). occurs. This 2 [MHz] clock pulse φ. As will be described later, what passes through the gate 81 intermittently is the master clock pulse φG for the initial waveform generator 1, digital filter 5, and shift register 4.
used as. Since the ROM II, 12.13 and shift register 4 store 16 bits of data per word, the master clock pulse φG is divided by 1/16 by the frequency dividing circuit 82 and input to the address counter 83. . In this way, address change and master clock pulse φ. Which synchronization can be done.

The number of words in one cycle of the musical waveform must be changed in the shift register 4 according to Table 2, so for convenience, the shift register 4 uses a RAM (random access memory), which is stored in the ROM II.12.1
The capacity is the same as 3, < 1,024 words x 16 bits.

Note that the register 51 has a capacity of 1 word x 16 bits.

The address counter 83 has ten binary stages connected in cascade, and its output is connected by an address counter output connection control device 85 as shown in FIG.

In Figure 3, c9 + C6r...C.

co is the parallel output of the address counter 83 shown in order from MSB to LSB, a9. aa+...al+
ao is the read address of ROMII, 12.13, and the 10 bits of the write and read address of RAM4.
They are shown in order from SB to LSB.

For example, if the octave code OCC is at logic r100J, only the lower 6 bits C6-Co of 09-Co are output, and this is the upper 6 bits a9-a of a, ~aO.
4, and °0° is output to the bits below a3. Therefore, each time the input pulse to the address counter 83 increases by one, the addresses of ROM11, 12.13 and RAM4 change by 16, and therefore, the address is not read out. The address is 0.
1B.

32, . . . 1008, resulting in 64 pieces, and as shown in Table 2, a musical sound waveform with 64 words is calculated and stored in the FIFO memory 3.
written to.

The FIFO memory 3 is a 64 word x 16 bit memory in which writing is performed intermittently and reading is performed continuously using a clock pulse having a lower frequency than the write clock pulse.
The generation frequency of is the third regardless of the octave code OCC.
As shown in the table. Note that the read clock pulse generator 501 uses a variable frequency dividing circuit in this embodiment, and receives the clock pulse φ from the relock pulse generator 80.

is frequency-divided in accordance with the note code NTC to generate 1 2 fffl type read clock pulses corresponding to 12 note names.

Table 3 The read clock pulse frequencies in Table 3 are all FIF
O Memory 3 write clock pulse frequency 2 [MH
z]/16=125 [KHz]. An example of the time relationship between writing and reading of the FIFO memory 3 is shown in FIG. The pulse waveform P in FIG. 3 indicates a change in the count of the read control counter 503, and every time the count reaches number 0 (number 64), the flip-flop 86 receives P from the counter 503. Set in response to N pulse. Then, the output Q of the flip-flop 86
The control signal aaa becomes "1'° and turns on the AND gate 81. As a result, the master clock pulse φ and the address counter output connection control device 85
Since the address signal is output from the selector 2, code data representing a musical tone waveform is output from the selector 2 and written into the FIFO memory 3. Pulse P5°2 in FIG. 4 indicates the output pulse from the frequency divider circuit 82, and this output pulse is
It is supplied to the counter 502 for write control of the FO memory 3.

Since the pulse frequency of P503 is lower than that of P5゜2, the first pulse of %P5゜3 is FI.
When reaching the FO memory 3, at least one word of data has already been written into the FIFO memory 3 by the first pulse of P502. Therefore, reading from the FIFO memory 3 can be performed continuously. Thus, during the period when the signal Ga1l in FIG.
When the count reaches number 64 (number 0), flip-flop 86 receives P from counter 502. Reset in response to FP pulse. Then P. , 4 pulses, the writing to the FIFO memory 3 is stopped until the flip-flop 8B is set again, and only reading is performed during that time.

In this way, writing to the FIFO memory 3 is interrupted every 64 words, and for example, in the octave of A and ~Gl# in Table 2, the writing to the FIFO memory 3 is interrupted every 64/1.024 cycles of the musical waveform.
, ~G, and #, writing is interrupted every 64/16 cycles of the tone waveform, but in all cases, reading is performed continuously to generate the tone waveform.

Also, for example, the frequency of the clock pulses generated by the read clock pulse generator 501 is the same < 28.16
Even in the case of 0 [K Hz], when the octave code OCC is at logic "000", the fundamental frequency of the musical waveform read from the FIFO memory 3 is 28.160 [K
HZ l÷1,024 = 27.5 [HZ ], and when it is in the octave code occ or logic rllOJ, it becomes 28.180 [K HZ co÷18 = 1,76
0[+(zl).

The digital code of the musical sound waveform outputted from the FIFO memory 3 is inputted to the sound system 6 via the gate circuit 7, where it is converted into an analog voltage, and if necessary, various performance effects are added and the sound is produced. Since the sound system is well known, a description thereof will be omitted.

As is clear from the above description, the musical tone generator 34 of the embodiment shown in FIG. 2 receives the signals S, E, and note code NTC via the common information transmission path IO.

Octave code OCC, parameter code Ar +
By giving A2, A3*P, and Q, it is possible to generate a musical tone having a desired timbre at the fundamental frequency corresponding to the pressed key. Also, due to the nature of these data, note code NTC and octave code OCC
is kept constant during musical tone generation, but the general design is to change the parameter codes P and Q as appropriate to form a preferable musical sound waveform in the attack and release sections. Although it is meaningless to change the parameter codes A+, A2, and A3 after the selector 2 is switched, they may be changed as appropriate before the selector 2 is switched.

The data NTC and oCC are generally sent from the keyboard section 30 to the common information transmission path 10. Any conventionally known circuit may be used to generate and send this data, one example of which is shown in FIG. In the same figure, to, 30.3
1 represents the same reference numerals and the same parts in FIG. 1, and the common information transmission path lO is the address bus A (101),
Data bus B (102) Control bus C (1
03).

In addition, in the design example of FIG. 5, the interface 31 has an octave code of 0CC as shown in Tables 2 and 3.
Although it has the capacity to detect the states of 12 types of note codes NTC (12 x 8 = 96 keys) for 8 types, the number of keys mounted on the keyboard section 30 is 61.
The case of 1 is shown.

The pulse generator 316 supplies the scanning clock pulse φ1 to the counter 312, and the pulse generator 316 and the counter 3
12. Decoder 31! , the OR gate 3!3, the shift register 314, and the latch 315 constitute a key state detection device. The lowest four stages of the counter 312 have a hexadecimal connection, and the decoder 311 also has a corresponding connection. Furthermore, the outputs of the decoder 311 other than those corresponding to the 61 keys can be omitted. With such a counter configuration, the lower 4 of the latch 315
The bits directly represent the note code NTC, and the top 3
The bits directly represent the octave code OCC.

In the example shown in FIG. 5, the keys are connected in order of priority, and among the keys that are turned on at the same time, only key C, which has the highest priority, is supplied with a logic "1" voltage from the terminal 301. , when the count value of the counter 312 reaches a value corresponding to that key, a logic 1 pulse is output from the OR gate 313 via each AND gate. The shift register 314 is for delaying these pulses by one scan period, and the output of the AND gate 319 means that a pulse that was not present in the previous scan has been detected in the current scan. Therefore, it becomes a pulse KON representing the key-on point, that is, an envelope start signal. Similarly, the output of the AND gate 320 means that the pulse that was present in the previous scan has disappeared in the current scan, so the output of the AND gate 320 is changed to the pulse representing the key-off point. In other words, it becomes a release start signal. and gate 31
9 output pulse K. When the output of the counter 312 is input to the latch 315 at N, the output of the latch 315 becomes the note code NTC and the octave code OCC. The output of the latch 315 is read out through the gate 318 when a predetermined address signal arrives at the address decoder 317. Note that the gate 318 further includes a control bus C (10
A gate enable signal GE given from 3) is added.

An example of the configuration of the timer 39 is shown in FIG. In the timer shown in the figure, the read control pulse PSO3 of the FIFO memory 3 is
(see Figures 2 and 4) is input to the frequency divider 386, a predetermined bit of the divided output data of the frequency divider 386 is selected by the data OCC in the selector 387, and the selected bit is Since time is measured using pulses, the unit of time measurement is one cycle of the musical sound waveform. In FIG. 6, 388 is an address decoder, 389 is a counter, 390 is a comparator, and 39
1°392, 393 are latches, 394.395 respectively
．． 396 are AND gates, which send data latch pulses to the corresponding latches 391, 392, and 393, and input data on the data bus B (102) to the latch corresponding to the output content of the address decoder 388 at that time. do. The latch 391 contains the octave code OCC, the latch 392 contains the control signal for the counter 389, and the latch 393 contains the time data 1 . ．． 12, 13, etc. are manually generated, but this will be explained in a later section.

When the data of the counter 389 and the data of the latch 393 match, the comparator 390 outputs P timer in FIG.
It outputs a pulse represented by , and interrupts the CPU 20, which will be explained in a later section.

Above, an example of signal use in the terminal equipment has been explained with reference to FIG. 2, and an example of signal exchange between the common information transmission path 10 and the keyboard section 30 has been explained with reference to FIG.
20. The mechanism for transmitting and receiving signals between the memory device 22 and various terminal devices via the common information transmission path 10 is well known in the technical field of electronic computers, and is
A similar signal exchange mechanism can be used in the electronic musical instrument shown in the figure, so a description thereof will be omitted.

Furthermore, since the interruption (interruption) from the terminal device to the CPU 20 and its processing are performed in the same way as in a general computer, a general explanation will be omitted.
For example, an interrupt is generated by the K ON +K OFF pulse in Fig. 5 and the ptt□ pulse in Fig. 6,
FIG. 8 shows a flowchart for generating a musical tone having the waveform shown in FIG. 7 T6.

The main program in the flowchart is a program that repeatedly performs scanning of the tone control panel 32, polling of the display panel 36, etc., as shown on the left end of FIG. 8, and it goes without saying that the program returns to the main program when the interrupt is completed. .

When interrupted by KOH, an address is sent to address decoder 317 (FIG. 5), and note code NTC and octave code OCC are read through gate 318. Next, state = 0 is set as the initial value, and C
PU20 has parameter code A corresponding to state = 0
l, A2, A3, note code NTC, octave code OCC, parameter code P, Q (Pr in Figure 8).
, Q+) and sends out S=°“0” as the signal S, so that the selector 2 inputs the output of the initial waveform generator 1 to the FIFO memory 3 during this period. Also, the time data t1 is sent to the latch 393 (
6), and a counter control signal is input to latch 392 to reset and enable counter 389 in response to counter reset signal CR and counter enable signal CE.

Next, a musical tone output enable signal E is sent to make the gate circuit 7 conductive, and the output of the FIFO memory 3 is supplied to the sound system 6. This ends the OH interrupt and returns to the main program.

Next, when the counter 389 reaches a count value corresponding to the time data t1, the comparator 390 outputs a pulse Ptl. ,
r outputs P tlm. An interrupt occurs. P
In the case of an interrupt by tlmar, the state is advanced by 1 after determining which value the state is at, and when the state = 1, the signal S is set to S = "1°", and the selector 2 circulates through the filter 5. The generated musical sound waveform is input to the FIFO memory 3, and a waveform as shown in state 1 in FIG. is input into the latch 393, and the counter 389 is reset and enabled in the same way as before, and then the process returns to the main program.

Next, when the counter 389 reaches a count value corresponding to the time data t2, the comparator 390 outputs a pulse Ptll1.
1. r is output and an interrupt by P timar occurs, 1 is added to the state and the state becomes 2, and the corresponding parameter codes P and Q (P2.Q are shown in Figure 8).
2) is sent out, and a waveform shown as state 2 in FIG. 7 is generated. Furthermore, since the timer 39 is disabled (the counter 389 is disabled), an interrupt due to P_timar will not occur as time passes.

After state = 2, an interrupt occurs due to K OFF, setting state = 3, sending out the corresponding parameter codes P and Q (represented by P3.Q3 in Figure 8), and changing to state 3 in Figure 7. Generates the waveform shown in . Then, after sending the time data t3 to the latch 393 and resetting and enabling the counter 389, the program returns to the main program.

Next, when the counter 389 reaches a count value corresponding to the time data t, an interrupt is generated by P_tlmar. At this time, the state becomes 4, and the signal E causes the gate circuit 7 to
becomes non-conductive, disables musical tone output, and returns to the main program.

Therefore, a waveform as shown in FIG. 7 is generated overall.

Parameter codes At, A2 . for which the performer determines the tone color.
A3. If you wish to change P and Q or change the CPU control program, please use the tone control panel section 32 or the CPU control section 24.
All you have to do is operate the appropriate switches. In this way,
An interrupt is generated, and a musical tone generation operation is performed in accordance with the changing operation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an electronic musical instrument according to an embodiment of the present invention, FIG. 2 is a block diagram showing an example of the configuration of a musical tone generating section in the electronic musical instrument, and FIG. 3 is an address in the musical tone generating section. A connection diagram for explaining the connection control operation of the counter output, FIG. 4 is a time chart for explaining the write/read operation of the FIFO memory in the musical tone generation section, and FIG. FIG. 6 is a block diagram showing an example of the configuration of the interface circuit; FIG. 6 is a block diagram showing an example of the configuration of the timer in the electronic musical instrument; FIG. 7 is an example of a musical sound waveform generated by the musical tone generator. Waveform diagram FIG. 8 is a flowchart showing several interrupt processes for the main program. lO...Common information transmission path, 20...CPU, 22
...Memory device, 24...CPU control panel section, 30.
...Keyboard section, 32... Tone control board section, 34... Musical tone generation section, 36... Display board section, 38... Modulation/demodulation circuit,
39...Timer. Applicant Yamaha Co., Ltd. Company Agent Patent Attorney Toshiaki Izawa

Claims (1)

[Claims] 1. It has a data circulation path in which a data delay means and a digital filter are connected in a closed loop, and by circulating waveform data through this data circulation path, the data being circulated can be converted into musical waveform data. What is claimed is: 1. A musical tone synthesizing apparatus, characterized in that the musical tone synthesizing apparatus is provided with a control means for changing and controlling the characteristics of the digital filter over time while the waveform data is being circulated. 2. An instruction means for instructing the start of generation and start of attenuation of musical tones is provided, and the control means controls the characteristics of the digital filter so as to increase the amplitude of the musical sound waveform in response to the instruction to start generation by the instruction means. 2. A musical tone synthesis apparatus according to claim 1, wherein characteristics of said digital filter are controlled to reduce the amplitude of a musical sound waveform in response to an instruction to start attenuation by said instruction means.