JPH0242701A - Network resistor - Google Patents

Network resistor

Info

Publication number
JPH0242701A
JPH0242701A JP19385188A JP19385188A JPH0242701A JP H0242701 A JPH0242701 A JP H0242701A JP 19385188 A JP19385188 A JP 19385188A JP 19385188 A JP19385188 A JP 19385188A JP H0242701 A JPH0242701 A JP H0242701A
Authority
JP
Japan
Prior art keywords
resistance
printed circuit
circuit board
network resistor
resistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP19385188A
Other languages
Japanese (ja)
Inventor
Kosuke Noguchi
野口 浩資
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP19385188A priority Critical patent/JPH0242701A/en
Publication of JPH0242701A publication Critical patent/JPH0242701A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/225Correcting or repairing of printed circuits

Landscapes

  • Details Of Resistors (AREA)

Abstract

PURPOSE:To facilitate designing of a printed circuit board and to reduce the number of designing processes by using conductor elements having a resistance value of zero for required resistance elements among resistance elements in a network resistor. CONSTITUTION:According to an embodiment, a resistance element 2 consisting of a resistor of ruthenium oxide and a conductor element 3 of copper are formed on an insulating substrate 1. The opposite ends of the resistance element 2 are connected to lead terminals 5 and the opposite ends of the conductor element 3 are connected to lead terminals 5a. The outer periphery of the assembly is covered with a packaging resin 4 while the unconnected ends of the lead terminals 5 and 5a are exposed. In this manner, required resistance elements 2 in the surface packaged network resistor having a plurality of resistance elements 2 are provided with ohmic resistance of zero. Accordingly, it is possible to facilitate designing of a printed circuit board and to reduce the number of designing processes.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はネットワーク抵抗器に関し、特に表面実装型の
ネットワーク抵抗器に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a network resistor, and more particularly to a surface-mounted network resistor.

〔従来の技術〕[Conventional technology]

従来、この種のネットワーク抵抗器は、すべての抵抗素
子が10オ一ム程度以上の抵抗値を有して構成されてい
た。
Conventionally, this type of network resistor has been configured such that all resistance elements have a resistance value of about 10 ohms or more.

第4図は従来のネットワーク抵抗器の一例の回路図であ
る。
FIG. 4 is a circuit diagram of an example of a conventional network resistor.

第4図に示すように、通常、表面実装型のネットワーク
抵抗器は図示しない基板上に8本の抵抗素子2を形成し
、それぞれの抵抗素子2をリード端子5に接続した16
ビンのICと同様の構成となっている。
As shown in FIG. 4, a surface mount type network resistor normally has eight resistance elements 2 formed on a substrate (not shown), and each resistance element 2 connected to a lead terminal 5.
It has the same configuration as the bottle IC.

第5図は第4図のネットワーク抵抗器を実装したプリン
ト基板の平面図である。
FIG. 5 is a plan view of a printed circuit board on which the network resistor of FIG. 4 is mounted.

第5図に示すように、プリント基板101上にはIC9
とチップ部品7,8と第4図に示すネットワーク抵抗器
6aとが搭載されている。いま、チップ部品7とチップ
部品8を接続するためのパターン接続をする場合、ネッ
トワーク抵抗器6aやIC9に接続する既設針のパター
ン及び実装部品そのものによる制約からパターン15に
より実装面での配線を行うか、又は、スルーホール14
、によりはんだ面パターン13又は多層プリント基板の
場合内層で接続する方法がとられる。
As shown in FIG. 5, there is an IC9 on the printed circuit board 101.
, chip components 7 and 8, and a network resistor 6a shown in FIG. 4 are mounted. Now, when making a pattern connection to connect the chip component 7 and the chip component 8, wiring is performed on the mounting surface using the pattern 15 due to restrictions due to the existing needle pattern connected to the network resistor 6a and IC 9 and the mounting component itself. or through hole 14
In the case of a multilayer printed circuit board, a method is used in which connection is made using the solder surface pattern 13 or an inner layer in the case of a multilayer printed circuit board.

前者の実装面でパターンを引きまわす場合は、他のパタ
ーン配線の形成がむつかしくなり、後者のスルーホール
を使用する場合は、配線スペースが少くなり、実装設計
を困難にする。
In the former case, when the pattern is routed around the mounting surface, it becomes difficult to form other pattern wiring, and in the latter case, when through holes are used, the wiring space is reduced, making the mounting design difficult.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

上述した従来のネットワーク抵抗器は、通常、電気的に
プルアップ抵抗用として多く使用されているので、プリ
ント基板上に実装されているIC及びLSIからのパタ
ーン配線が集中し、高密度実装における実装設計を困難
にしていた。特に、表面実装方式はチップ部品が隣接し
プリント基板の片面側のみで配線する率が高く、従来の
スルーホールプリント基板に比較しパターン配線スペー
ス及びパターン経路が少く、実装設計工数が多大にかか
るばかりでなく、スルーホールプリント基板において2
層で設計できたものが4層又は6層でなければ設計でき
なくなり、プリント基板そのものの価格が高くなると同
時にプリント基板製作工程も複雑となり製作日数がかか
るという欠点がある。
The conventional network resistor described above is usually used as an electrical pull-up resistor, so pattern wiring from ICs and LSIs mounted on printed circuit boards is concentrated, making it difficult to implement in high-density packaging. This made the design difficult. In particular, the surface mount method has a high rate of wiring only on one side of the printed circuit board because the chip components are adjacent to each other, and compared to the conventional through-hole printed circuit board, the pattern wiring space and pattern path are smaller, and the mounting design time is increased. 2 in a through-hole printed circuit board instead of
What could be designed with layers cannot be designed with anything other than 4 or 6 layers, which has the drawback that the price of the printed circuit board itself increases, and at the same time, the printed circuit board manufacturing process becomes complicated and takes many days to manufacture.

〔課題を解決するための手段〕[Means to solve the problem]

本発明は、複数の抵抗素子を形成した表面実装型のネッ
トワーク抵抗器において、前記抵抗素子に零オーム抵抗
を有している。
The present invention is a surface-mount type network resistor formed with a plurality of resistance elements, in which the resistance elements have zero ohm resistance.

〔実施例〕〔Example〕

次に、本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例の一部切欠き斜視図、第2図
は第1図の実施例の回路図である。
FIG. 1 is a partially cutaway perspective view of an embodiment of the present invention, and FIG. 2 is a circuit diagram of the embodiment of FIG.

第1図及び第2図に示すように、本実施例は絶縁性の基
板1上に酸化ルテニウムの抵抗体から成る抵抗素子2と
銅の導体素子3とを形成し、抵抗素子2の両端をリード
端子5と接続し、導体素子3の両端をリード端子51と
接続し、リード端子5及び5aの先端を露出させて外周
を外装樹脂4で覆っている。
As shown in FIGS. 1 and 2, in this embodiment, a resistance element 2 made of a ruthenium oxide resistor and a copper conductor element 3 are formed on an insulating substrate 1, and both ends of the resistance element 2 are connected to each other. Both ends of the conductive element 3 are connected to a lead terminal 51, and the outer periphery is covered with an exterior resin 4 with the tips of the lead terminals 5 and 5a exposed.

第3図は第1図の実施例を実装したプリント基板の平面
図である。
FIG. 3 is a plan view of a printed circuit board on which the embodiment of FIG. 1 is mounted.

第3図に示すように、プリント基板10上には第1図に
示すネットワーク抵抗器6とチップ部品7.8とIC9
とが実装されている。いま、チップ部品7とチップ部品
8を接続する場合、ネットワーク抵抗器6の導体素子3
(第1図参照)が接続されたリード端子5.、とチップ
部品7及び8との間にパターン11を形成すればよい。
As shown in FIG. 3, on the printed circuit board 10 are the network resistor 6, chip components 7.8, and IC 9 shown in FIG.
has been implemented. Now, when connecting the chip component 7 and the chip component 8, the conductor element 3 of the network resistor 6
(See Figure 1) lead terminal 5. , and the chip components 7 and 8 may be formed.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、ネットワーク抵抗器の抵
抗素子のうち必要なものに抵抗値零の導体素子を使用す
ることにより、プリント基板設計を容易にして設計工数
を削減できるとともに、プリント基板の暦数を少くする
ことにより、製作工数の短縮及び価格の低減ができる効
果がある。
As explained above, the present invention uses conductive elements with a zero resistance value as necessary resistance elements of a network resistor, thereby facilitating printed circuit board design and reducing design man-hours. Reducing the number of calendars has the effect of shortening manufacturing man-hours and reducing costs.

・・・IC110,10,・・・プリント基板、11゜
12.15・・・パターン、13・・・はんだ面パター
ン、14a、14b・・・スルーホール。
... IC110, 10, ... Printed circuit board, 11°12.15 ... Pattern, 13 ... Solder surface pattern, 14a, 14b ... Through hole.

Claims (1)

【特許請求の範囲】[Claims] 複数の抵抗素子を形成した表面実装型のネットワーク抵
抗器において、前記抵抗素子に零オーム抵抗を有するこ
とを特徴とするネットワーク抵抗器。
1. A surface-mounted network resistor formed with a plurality of resistance elements, characterized in that the resistance elements have zero ohm resistance.
JP19385188A 1988-08-02 1988-08-02 Network resistor Pending JPH0242701A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP19385188A JPH0242701A (en) 1988-08-02 1988-08-02 Network resistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP19385188A JPH0242701A (en) 1988-08-02 1988-08-02 Network resistor

Publications (1)

Publication Number Publication Date
JPH0242701A true JPH0242701A (en) 1990-02-13

Family

ID=16314807

Family Applications (1)

Application Number Title Priority Date Filing Date
JP19385188A Pending JPH0242701A (en) 1988-08-02 1988-08-02 Network resistor

Country Status (1)

Country Link
JP (1) JPH0242701A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103974586A (en) * 2014-04-04 2014-08-06 尚武机电技术(上海)有限公司广州分公司 Electronic device component and manufacturing method thereof
CN104103392A (en) * 2013-04-10 2014-10-15 珠海扬智电子科技有限公司 Resistor arrangement device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104103392A (en) * 2013-04-10 2014-10-15 珠海扬智电子科技有限公司 Resistor arrangement device
CN103974586A (en) * 2014-04-04 2014-08-06 尚武机电技术(上海)有限公司广州分公司 Electronic device component and manufacturing method thereof

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