JPH0244723U - - Google Patents
Info
- Publication number
- JPH0244723U JPH0244723U JP12295488U JP12295488U JPH0244723U JP H0244723 U JPH0244723 U JP H0244723U JP 12295488 U JP12295488 U JP 12295488U JP 12295488 U JP12295488 U JP 12295488U JP H0244723 U JPH0244723 U JP H0244723U
- Authority
- JP
- Japan
- Prior art keywords
- liquid crystal
- display panel
- crystal display
- drive tft
- gate line
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004973 liquid crystal related substance Substances 0.000 claims description 3
- 239000011159 matrix material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
- 230000007547 defect Effects 0.000 description 1
Landscapes
- Liquid Crystal (AREA)
- Liquid Crystal Display Device Control (AREA)
- Thin Film Transistor (AREA)
Description
第１図乃至第３図はこの考案の一実施例を示す
もので、第１図は回路構成を示すブロツク図、第
２図はゲートラインに入力されるゲートパルスと
画素電極での充電電位を示すタイミングチヤート
、第３図は各種の欠陥を生じた状態での回路構成
を示すブロツク図であり、第４図乃至第６図は従
来の液晶表示パネルの回路構成を例示するブロツ
ク図である。
１ａ，１ｂ，２ａ，２ｂ，３ａ，３ｂ…ＴＦＴ
、Ｇｉ―２〜Ｇｉ＋２…ゲートライン、Ｄｊ−１
〜Ｄｊ＋２…ドレインライン、Ｇｉ−１，ｊ−１
〜Ｃｉ＋３，ｊ＋１…画素電極。
Figures 1 to 3 show an embodiment of this invention. Figure 1 is a block diagram showing the circuit configuration, and Figure 2 shows the relationship between the gate pulse input to the gate line and the charging potential at the pixel electrode. The timing chart shown in FIG. 3 is a block diagram showing the circuit configuration in a state where various defects occur, and FIGS. 4 to 6 are block diagrams illustrating the circuit configuration of a conventional liquid crystal display panel. 1a, 1b, 2a, 2b, 3a, 3b...TFT
, Gi-2 to Gi+2...gate line, Dj-1
~Dj+2...Drain line, Gi-1, j-1
~Ci+3,j+1...pixel electrode.
Claims (1)
いて、 各画素の駆動ＴＦＴに対し、ゲートラインを挟
んで隣接する画素を同タイミングで駆動するドレ
インラインの異なるもう一つの駆動ＴＦＴを設け
たことを特徴とする液晶表示パネル。[Claims for Utility Model Registration] In an active matrix liquid crystal display panel, for each pixel drive TFT, another drive TFT with a different drain line is provided to drive adjacent pixels across the gate line at the same timing. A liquid crystal display panel characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12295488U JPH0244723U (en) | 1988-09-20 | 1988-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12295488U JPH0244723U (en) | 1988-09-20 | 1988-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0244723U true JPH0244723U (en) | 1990-03-28 |
Family
ID=31371363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12295488U Pending JPH0244723U (en) | 1988-09-20 | 1988-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0244723U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010054529A (en) * | 2008-08-26 | 2010-03-11 | Casio Comput Co Ltd | Display device |
| US8310471B2 (en) | 2008-07-08 | 2012-11-13 | Casio Computer Co., Ltd. | Display apparatus and method for driving the same |
-
1988
- 1988-09-20 JP JP12295488U patent/JPH0244723U/ja active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8310471B2 (en) | 2008-07-08 | 2012-11-13 | Casio Computer Co., Ltd. | Display apparatus and method for driving the same |
| JP2010054529A (en) * | 2008-08-26 | 2010-03-11 | Casio Comput Co Ltd | Display device |
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