JPH0244871A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To dispense with a memory by allowing a shutter by impressing a pulse whose voltage switching time point is in a horizontal or a vertical blanking period to be synchronized with a vertical driving pulse and applying the pulse to a conductive light shielding film. CONSTITUTION:The title device is provided with a shutter pulse generation circuit 32 to supply pulse voltage which rises from output interrupting voltage in which the accumulated charge quantity of a photodiode becomes below a prescribed value in the prescribed horizontal blanking period preceding a read pulse and in addition, falls below the output interrupting voltage in the vertical blanking period or the later horizontal blanking period while being delayed behind a read pulse to the conductive light shielding film 6. Accordingly, since the maximum accumulated charge quantity of the photodiode changes according to the voltage Vps to be impressed to the conductive light shielding film 6, output voltage becomes as shown in a figure, and when Vps is lowered, the output voltage decreases in proportion to it as well, and disappears perfectly at the vicinity of -7V. Then, Vps at that time is made to be the output interrupting voltage. Thus, shutter time can be made variable without being accompanied with the decrease of a maximum transferred charge quantity and the occurrence of saturation unevenness.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a solid-state imaging device, and more particularly to an interline transfer type CCD imaging device capable of operating an electronic shutter.

[Conventional technology]

A conventional interline transfer type CCD imaging device performs photoelectric conversion using a photodiode, and the accumulated charges are read out every vertical blanking period, so that, for example, in the NTSC system, the accumulation time is 1/60 seconds. Therefore 1/
Because images are captured using the amount of charge accumulated over 60 seconds, images of fast-moving objects were often blurred.

In order to improve this drawback, an electronic shutter operation that shortens the storage time has recently been proposed and is being put into practical use.

For example, 6 video magazines published by Shashin Kogyo Publishing, 19.
8.7 = As shown in the August issue, pages 145 to 148, there is generally a drain 4 at the top as shown in Figure 5.
Using an interline type CCD image sensor equipped with a In addition, the charge first read out by the read pulse 8-1 is swept out and swept out to the drain side. The charges accumulated during this period are outputted by the second read pulse 8-2. This period T1 becomes the shutter time. In this case, unnecessary charge reading, high-speed sweeping, and signal charge reading must be performed within the vertical blanking period 10, and the shutter time can only be fixed at 1/1000 seconds.

As an improved type of these, there is a variable type that realizes a shutter time of 1/250 seconds to 1/1000 seconds by providing a storage section 12 as shown in FIG.

Other publications include Nikkei Microdevice Magazine published by Nikkei Shimbun, 19
There is a method of drawing out unnecessary charges from the substrate side using a vertical overflow drain as shown in the October issue of 1987, pages 60 to 64, but in this case, a high substrate voltage (hereinafter referred to as V sub) is used. ) is necessary, and in order to completely reduce the accumulated charge of the photodiode to zero at such a voltage, it is necessary to increase the control dependence of the maximum accumulated charge amount on V sub, and this means that the electrostatic capacitance of the photodiode This means an increase in the capacitance, and the influence of variations in capacitance due to uneven substrate concentration becomes greater, resulting in the occurrence of saturation unevenness.

[Problem to be solved by the invention]

Among the conventional solid-state imaging devices mentioned above, those equipped with a storage section require more memory stages to widen the variable range of the shutter time, which inevitably increases the chip area of the imaging element. . Furthermore, as the number of memory stages increases, data must be transferred at a faster time, resulting in a higher frequency and a disadvantage that the maximum transfer charge amount of the vertical transfer register decreases.

Also, in the case of using a vertical overflow drain, the base voltage must be set to a high voltage. In order to completely reduce the accumulated charge of the photodiode to zero at such a voltage, it is necessary to increase the control dependence of the maximum accumulated charge amount on the base voltage, which means an increase in the capacitance of the photodiode. There is a drawback that the influence of variations in capacitance due to variations in substrate concentration, etc. becomes large, resulting in occurrence of saturation variations, etc.

SUMMARY OF THE INVENTION An object of the present invention is to provide a solid-state imaging device that can vary the shutter time without reducing the maximum amount of transferred charge or causing uneven saturation.

[Means to solve the problem]

The solid-state imaging device of the present invention includes a photodiode including a second conductivity type region selectively provided in a first conductivity type region on the surface of the semiconductor substrate, and a photodiode that includes a second conductivity type region selectively provided in the first conductivity type region on the surface of the semiconductor substrate; A readout gate electrode provided adjacently above the second conductivity type region and a conductive light shielding film provided over the readout gate electrode via a second insulating film and having an opening directly above the second conductivity type region. and readout pulse generation means for supplying the readout gate electrode with a pulse voltage for reading out accumulated charges from the photodiode within a vertical blanking period. A pulse that rises from an output cutoff voltage at which the amount of charge accumulated in the photodiode becomes equal to or less than a predetermined value during a horizontal blanking period, and falls below the output cutoff voltage during a vertical blanking period or a subsequent horizontal blanking period, delayed from the read pulse. The device includes a shutter pulse generation circuit that supplies voltage to the conductive light-shielding film.

〔Example〕

Next, embodiments of the present invention will be described with reference to the drawings.

Fig. 1 is a schematic diagram showing an embodiment of the present invention, Fig. 2 is a characteristic diagram showing the relationship between the voltage applied to the conductive light-shielding film and the output voltage of the vertical transfer register, and Fig. 3 is an example of a shutter pulse generation circuit. FIG. 4 is a signal waveform diagram of the circuit shown in FIG. 3.

In this embodiment, a p-type region (p-
A diode 1 including an n-type region 1n selectively provided in the well 7), directly above the n-type region]n via the first insulating film provided on the surface of the semiconductor substrate. A conductive light shielding film 6 made of an aluminum film and having an opening directly above the n-type region 1n is provided on the readout gate electrode 5 and the readout gate electrode 5 with a second insulating film 15 interposed therebetween. In the solid-state imaging device, the solid-state imaging device includes a solid-state imaging device and a readout pulse generating means 31 that supplies a readout gate electrode 5 with a pulse voltage for reading out accumulated charges from the photodiode 1 within a vertical blanking period. Conducting a pulse voltage that rises from the output cutoff voltage at which the accumulated charge of the photodiode 1 is equal to or less than a predetermined value during the period and falls below the output cutoff voltage during the vertical blanking period or the subsequent horizontal flanking period after the aforementioned read pulse. It has a shutter pulse generation circuit that supplies the light to the transparent light shielding film 6. The voltage applied to the conductive light shielding film 6 (
Since the maximum accumulated charge of the photodiode changes depending on (hereinafter referred to as VPs), the output voltage will be as shown in Figure 2,
The output voltage is highly dependent on VPs. When VPS is increased, the output voltage increases in proportion to it, and conversely, when VPS is decreased, the output voltage decreases in proportion to it, and disappears completely around -7V. The vps at this time will be referred to as the output cutoff voltage. Currently, since the aperture ratio of the photodiode is small and the aluminum of the conductive light-shielding film 6 is thick, the lines of electric force coming out from the side surfaces of the aluminum film act on the entire surface of the n-type region 1n, so that the conductive light-shielding film is 6 covers the entire surface of the n-type region 6, and the amount of accumulated charge is vps.
It is thought that it is controlled by The shape of the conductive light shielding film 6 is as follows:
As shown in the figure, extending like an eave to the side surface of the read gate electrode 6 is better for controlling this output voltage. However, it is not necessarily necessary to have an eave.

The present invention utilizes this phenomenon to realize a shutter operation.

In Fig. 3, two monostable multivibrators are used, and the signal goes low at the falling timing of the vertical drive signal VD.
A pulse with a predetermined pulse width that rises from "H" to "H" is generated. This pulse width can be changed by variable resistor VRI. The monostable multivibrator 22 changes from "L" to "H" at the falling timing of the output signal 21.
”, but the pulse width can be changed by variable resistor VR2.The output signal of D flip-flop 23 is the first horizontal drive signal 1- after the output signal of D flip-flop 23 becomes “H”. It rises at the timing when ID becomes "H'" and falls at the timing when HD first becomes "H" after the output signal of 23 becomes "L"". In this way, a signal synchronized with HD can be obtained. The variable resistors VR3 and VH4 of the variable amplitude circuit 25 adjust the "H" level and the "L" level, respectively, to obtain a shutter pulse.

Set the "H" level of the output signal of 25 to a voltage that can sufficiently accumulate charge in the photodiode, for example +8V, and
It is good to set the L' level to a voltage that does not cause charge storage in the photodiode, that is, to a value below the output cutoff voltage, for example, -8V. Furthermore, the falling timing and falling timing of the shutter pulse can be adjusted by VRI and VH2, respectively. It is preferable that the rising timing is set before the readout pulse 8 to the readout gate electrode 5 within an arbitrary vertical blanking period, and the falling timing is set within the same vertical blanking period even if it is after the readout pulse. It may be later than that. Both rising and falling are H
This is because the switching is performed within the horizontal flanking period in synchronization with D, thereby preventing noise from appearing on the screen at the time of switching. The time t2 from when the shutter pulse becomes H'' to when the readout pulse 8 is generated is the shutter time, but this can be arbitrarily adjusted by the VRI. Therefore, the shutter time is 7660 seconds (normal operation) It can be varied over a wide range from a time shorter than 1/1000 seconds of the conventional example.

〔Effect of the invention〕

As explained above, the present invention includes at least a readout pulse, and sets the voltage applied to the conductive light-shielding film for a predetermined storage period to a voltage that can store a necessary amount of charge in the photodiode,
During a period other than the accumulation time, the voltage applied to the conductive light shielding film is set to a lower voltage than the voltage, and a pulse whose voltage switching point is in the horizontal or vertical flanking period is applied to the conductive light shielding film in synchronization with the vertical drive pulse. This enables shutter operation and does not require memory unlike the conventional variable type. Therefore, the size of the image sensor can be smaller than that of a conventional variable CCD image sensor chip. Further, since unnecessary charge readout pulses, high-speed sweep pulses, and high-speed transfer pulses are not required, the vertical transfer pulse can be left as it is when it is normal, which simplifies the process.

Further, there is no decrease in the amount of transferred charge due to high-speed transfer, and the shutter time can be shortened from 1/60 seconds to the conventional 1/]-000 seconds.

Furthermore, there is no need for a high substrate voltage and no need to increase the photodiode capacitance, so there is also the effect that saturation unevenness does not occur.

[Brief explanation of the drawing]

Fig. 1 is a schematic diagram showing an embodiment of the present invention, Fig. 2 is a characteristic diagram showing the relationship between the voltage applied to the conductive light shielding film and the output voltage of the vertical transfer register, and Fig. 3 is an example of the shutter pulse generation circuit. 4 is an operating signal waveform diagram of the circuit shown in FIG. 3, FIG. 5 is a block diagram of a conventional solid-state image sensor with sweep train, and FIG. 6 is a shutter operation of the conventional example shown in FIG. 5. FIG. 7 is a block diagram of a conventional solid-state image pickup device with a storage section. 1... Photodiode, 1n... n-type region, 2...
... Vertical transfer register, 2n... N-type buried channel, 3... Horizontal transfer register, 4... Sweeping train, 5... Readout gate electrode, 6... Conductive light-shielding film, 7 ...p-well, 8.8-1.8-2...readout pulse, 9...channel stopper, 10...
Vertical blanking period, 11...imaging section, 12...
Storage section, 13...Memory, 14...Highway transfer pulse, 15...Second insulating film, 17...First insulating film, 1
8... Transfer gate, 19... N-type semiconductor substrate, 2122... Monostable multivibrator, 23...
・D flip-flop, 24...pulse generation circuit, 2
5... Amplitude variable circuit, 31... Read pulse generating means, 32... Shutter pulse generating circuit, C1 to C5
...Capacitor, DI, D2...Diode, HD
...Horizontal drive signal, Mn...n channel MO8)-
Transistor, Mp... p channel MO8) transistor, R1゜R2... resistor, VD... vertical drive signal, V
RI~VR4...variable resistance.

Claims (1)

[Claims] A photodiode including a second conductivity type region selectively provided in a first conductivity type region on the surface of the semiconductor substrate, and directly above the second conductivity type region via a first insulating film provided on the semiconductor substrate surface. a solid-state image sensor including a readout gate electrode provided adjacent to the readout gate electrode and a conductive light-shielding film provided on the readout gate electrode with a second insulating film interposed therebetween and having an opening directly above the second conductivity type region; In the solid-state imaging device, the solid-state imaging device includes a readout pulse generating means for supplying a pulse voltage to the readout gate electrode to read out the accumulated charge from the photodiode during a vertical blanking period. Applying a pulse voltage to the conductive light-shielding film that rises from an output cut-off voltage at which the amount of accumulated charge is equal to or less than a predetermined value and falls below the output cut-off voltage during a vertical blanking period or a subsequent horizontal blanking period after the readout pulse. What is claimed is: 1. A solid-state imaging device comprising a shutter pulse generation circuit that supplies a shutter pulse.