JPH0244896U - - Google Patents
Info
- Publication number
- JPH0244896U JPH0244896U JP1988122927U JP12292788U JPH0244896U JP H0244896 U JPH0244896 U JP H0244896U JP 1988122927 U JP1988122927 U JP 1988122927U JP 12292788 U JP12292788 U JP 12292788U JP H0244896 U JPH0244896 U JP H0244896U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- preset
- counter
- reference data
- data
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 4
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
Landscapes
- Control Of Electric Motors In General (AREA)
Description
第１図は本考案デジタルサーボ回路の構成を示
すブロツク図、第２図は従来のデジタルサーボ回
路の構成図、第３図は第４図の要部を示すブロツ
ク図、第４図は第３図の動作を示すタイミング図
である。
２……シリンダモータ、３……ＦＧコイル、５
……周期測定回路、６……Ｄ／Ａ変換回路、８…
…モータドライバ、２０……プリセツトカウンタ
、２１……データホールド回路、２２……タイミ
ング発生回路、２３……ステツプカウンタ、２４
，２５……ラツチ回路、２６，２６′……比較器
、２７，２７′……バイアスカウンタ、２８……
加算器。
FIG. 1 is a block diagram showing the configuration of the digital servo circuit of the present invention, FIG. 2 is a configuration diagram of a conventional digital servo circuit, FIG. 3 is a block diagram showing the main parts of FIG. FIG. 3 is a timing diagram showing the operation of the figure. 2...Cylinder motor, 3...FG coil, 5
...Period measurement circuit, 6...D/A conversion circuit, 8...
...Motor driver, 20...Preset counter, 21...Data hold circuit, 22...Timing generation circuit, 23...Step counter, 24
, 25... Latch circuit, 26, 26'... Comparator, 27, 27'... Bias counter, 28...
Adder.
Claims (1)
準データとに基づいて上記モータの回転速度を制
御するデジタルサーボ回路に於いて、 上記基準データに応じて一定周期のクロツクを
カウントしてプリセツトデータを発生するプリセ
ツトカウンタ、 上記プリセツトデータがプリセツトされて一定
周期のクロツクをカウントするステツプカウンタ
、 このステツプカウンタの出力を所定のタイミン
グでラツチするラツチ回路、 このラツチ回路の出力と上記基準データとを比
較する比較回路、 この比較回路の出力に従つてカウントされて上
記基準データを発生するアツプダウンカウンタ、 上記回転検出信号に基づいて上記ラツチ回路の
ラツチタイミングを設定するタイミング発生回路
、 を備え、 特定周期で上記アツプダウンカウンタから上記
プリセツトカウンタに基準データが移送されるこ
とを特徴とするデジタルサーボ回路。[Claims for Utility Model Registration] In a digital servo circuit that controls the rotational speed of the motor based on a rotation detection signal corresponding to the rotational speed of the motor and reference data, A preset counter that counts the preset data and generates preset data, A step counter that counts a constant period of clocks after the preset data is preset, A latch circuit that latches the output of this step counter at a predetermined timing, This latch circuit a comparator circuit that compares the output of the comparator with the reference data; an up-down counter that counts according to the output of the comparator circuit and generates the reference data; and a latch timing of the latch circuit based on the rotation detection signal. 1. A digital servo circuit comprising: a timing generation circuit, wherein reference data is transferred from the up-down counter to the preset counter at a specific cycle.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988122927U JPH0244896U (en) | 1988-09-20 | 1988-09-20 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988122927U JPH0244896U (en) | 1988-09-20 | 1988-09-20 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0244896U true JPH0244896U (en) | 1990-03-28 |
Family
ID=31371314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988122927U Pending JPH0244896U (en) | 1988-09-20 | 1988-09-20 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0244896U (en) |
-
1988
- 1988-09-20 JP JP1988122927U patent/JPH0244896U/ja active Pending
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