JPH0247877U - - Google Patents
Info
- Publication number
- JPH0247877U JPH0247877U JP12632288U JP12632288U JPH0247877U JP H0247877 U JPH0247877 U JP H0247877U JP 12632288 U JP12632288 U JP 12632288U JP 12632288 U JP12632288 U JP 12632288U JP H0247877 U JPH0247877 U JP H0247877U
- Authority
- JP
- Japan
- Prior art keywords
- control circuit
- circuit
- automatic gain
- gain control
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 claims description 3
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Television Receiver Circuits (AREA)
Description
第１図は本考案の一実施例を示す回路図、第２
図は実施例の動作を説明するための波形図、第３
図は従来の自動利得制御回路の構成を示す回路図
、第４図は第３図の動作を説明するための波形図
、第５図は復調信号とＡＧＣ信号との関係を示す
特性図、第６図ａ〜ｃは復調信号にノイズが重畳
した時の動作を説明するための波形図である。
２……チユーナ、３……映像中間周波増幅器、
４……復調回路、５……ＡＧＣ回路、６……垂直
同期信号検出回路、７……スイツチ回路、８……
判定回路、９……スイツチ制御回路。
Figure 1 is a circuit diagram showing one embodiment of the present invention;
The figure is a waveform diagram for explaining the operation of the example.
Figure 4 is a circuit diagram showing the configuration of a conventional automatic gain control circuit, Figure 4 is a waveform diagram for explaining the operation of Figure 3, Figure 5 is a characteristic diagram showing the relationship between the demodulated signal and the AGC signal, 6a to 6c are waveform diagrams for explaining the operation when noise is superimposed on the demodulated signal. 2...Tuner, 3...Video intermediate frequency amplifier,
4... Demodulation circuit, 5... AGC circuit, 6... Vertical synchronization signal detection circuit, 7... Switch circuit, 8...
Judgment circuit, 9...Switch control circuit.
Claims (1)
ユーナの高周波増幅器および映像中間周波増幅器
の利得を制御する尖頭値形の自動利得制御回路を
備えたテレビジヨン受像機において、 映像復調信号から垂直同期信号を分離抽出する
垂直同期信号検出回路と、 映像復調信号を前記自動利得制御回路に選択的
に入力するスイツチ回路と、 前記自動利得制御回路の出力電圧が所定値より
大きいか否かを判定する判定回路と、 この判定回路の出力信号と前記垂直同期信号検
出回路で抽出された垂直同期信号に基づき、自動
利得制御回路の出力電圧が所定値より小さい時は
前記スイツチ回路をオン状態に制御して映像復調
信号を前記自動利得制御回路に入力し、自動利得
制御回路の出力電圧が所定値より大きい時は垂直
同期信号の期間のみ前記スイツチ回路をオン状態
に制御して映像復調信号を前記自動利得制御回路
に入力するスイツチ制御回路とを備える自動利得
制御装置。[Claims for Utility Model Registration] A television equipped with a peak value type automatic gain control circuit that controls the gains of a tuner's high frequency amplifier and video intermediate frequency amplifier according to the peak value of a synchronization signal in a video demodulated signal. The receiver includes: a vertical synchronization signal detection circuit that separates and extracts a vertical synchronization signal from a video demodulation signal; a switch circuit that selectively inputs the video demodulation signal to the automatic gain control circuit; and an output voltage of the automatic gain control circuit. a determination circuit that determines whether the output voltage is greater than a predetermined value; and a determination circuit that determines whether the output voltage of the automatic gain control circuit is smaller than the predetermined value based on the output signal of the determination circuit and the vertical synchronization signal extracted by the vertical synchronization signal detection circuit. controls the switch circuit to be in the ON state to input the video demodulated signal to the automatic gain control circuit, and when the output voltage of the automatic gain control circuit is greater than a predetermined value, the switch circuit is to be in the ON state only during the period of the vertical synchronization signal. and a switch control circuit that controls the video demodulation signal to input the video demodulated signal to the automatic gain control circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12632288U JPH0247877U (en) | 1988-09-29 | 1988-09-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12632288U JPH0247877U (en) | 1988-09-29 | 1988-09-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0247877U true JPH0247877U (en) | 1990-04-03 |
Family
ID=31377746
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12632288U Pending JPH0247877U (en) | 1988-09-29 | 1988-09-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0247877U (en) |
-
1988
- 1988-09-29 JP JP12632288U patent/JPH0247877U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0247877U (en) | ||
| JPS6454432U (en) | ||
| JPH0344378U (en) | ||
| JPS6345051Y2 (en) | ||
| JPS6190347U (en) | ||
| JPS6110385Y2 (en) | ||
| JPH01103977U (en) | ||
| JPS59183049U (en) | Television receiver AGC circuit | |
| JPH0232250U (en) | ||
| JPS596009Y2 (en) | automatic frequency control device | |
| JPS62169572U (en) | ||
| JPS6251886U (en) | ||
| JPH02103984U (en) | ||
| JPS63191776U (en) | ||
| JPS63102339U (en) | ||
| JPH0282125U (en) | ||
| JPS63136471U (en) | ||
| JPH0257670U (en) | ||
| JPS6352356U (en) | ||
| JPS6157662U (en) | ||
| JPS61162173U (en) | ||
| JPH0369986U (en) | ||
| JPH0167884U (en) | ||
| JPH01149137U (en) | ||
| JPS61111274U (en) |