JPH0247894A - Manufacture of superconducting circuit board - Google Patents
Manufacture of superconducting circuit boardInfo
- Publication number
- JPH0247894A JPH0247894A JP63199103A JP19910388A JPH0247894A JP H0247894 A JPH0247894 A JP H0247894A JP 63199103 A JP63199103 A JP 63199103A JP 19910388 A JP19910388 A JP 19910388A JP H0247894 A JPH0247894 A JP H0247894A
- Authority
- JP
- Japan
- Prior art keywords
- board
- circuit board
- pad
- superconducting
- ceramic
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Superconductor Devices And Manufacturing Methods Thereof (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
【発明の詳細な説明】
〔概要〕
超伝導多層回路基板の製造方法に関し、眉間の回路接続
が確実に行われている多層基板を得ることを目的とし、
ビア形成位置を孔開けしたセラミック基板に酸化物超伝
導物質を成分として含むペーストを印刷し、それぞれの
孔にペーストを充填し封口した後に、この基板上に導体
パターンを印刷し乾燥して後、焼成して単位のセラミッ
ク回路基板を形成する工程と、このセラミック回路基板
のビア形成位置に更に超伝導ペーストを印刷してパッド
をパターン形成する工程と、このセラミック回路基板の
周辺部にスペーサを配置し、位置合わせを行いつ〜複数
のセラミック回路基板を積層し、加圧しながら乾燥する
工程と、スペーサを取り除いた後、酸化雰囲気中で焼成
して一体化する+4工程とを含んで超伝導回路基板の製
造方法を構成する。[Detailed Description of the Invention] [Summary] Regarding a method for manufacturing a superconducting multilayer circuit board, the purpose is to obtain a multilayer board in which circuit connections between the eyebrows are reliably made, and a ceramic board with holes formed at via formation positions is used. After printing a paste containing an oxide superconducting material as a component and filling and sealing each hole with the paste, a conductive pattern is printed on this substrate, dried, and then fired to form a unit ceramic circuit board. A step of further printing superconducting paste at the via formation position of this ceramic circuit board to form a pad pattern, and a step of placing spacers around the periphery of this ceramic circuit board and aligning them. The method for manufacturing a superconducting circuit board includes a step of stacking ceramic circuit boards and drying them under pressure, and a +4 step of removing spacers and then baking them in an oxidizing atmosphere to integrate them.
本発明は超伝導多層回路基板の製造方法に関する。 The present invention relates to a method for manufacturing a superconducting multilayer circuit board.
ニオ7’ (Nb)、鉛(Pb)などの元素および錫化
ニオブ(NbxSn) 、 ビスマス・鉛・バリウム
・酸素(Bi−Pb−Ba−0)などの物質が超伝導現
象を示すことは知られていたが、超伝導転移温度(’r
e)は金属元素については高くてもIOKに止まり、ま
た無機化合物についてもゲルマリラム化ニオブ(Nb:
+Ge)の23.5Kが最高であって、15に以上の材
料は数えるほどしか存在しなかった。It is well known that elements such as niobium 7' (Nb) and lead (Pb) and substances such as niobium stannide (NbxSn) and bismuth-lead-barium-oxygen (Bi-Pb-Ba-0) exhibit superconductivity. However, the superconducting transition temperature ('r
e) is only a high IOK for metal elements, and also for inorganic compounds, niobium germarylamide (Nb:
+Ge) had the highest value of 23.5K, and there were only a few materials with a value of 15 or higher.
然し、1986年4月にBednorzとMuller
によってランタン・バリウム・銅・酸素(La−Ba−
Cu−0)系の酸化物セラミックスについて高温超伝導
現象が発見されて以来、イツトリウム・バリウム・銅・
酸素(Y −Ba−Cu−0)系およびYを含む希土類
元素−Ba−Cu−0)系についてTcが約90Kを示
す超伝導セラミックスが発見されるに到った。However, in April 1986, Bednorz and Muller
Lanthanum, barium, copper, oxygen (La-Ba-
Since the discovery of high-temperature superconductivity in Cu-0)-based oxide ceramics, yttrium, barium, copper,
Superconducting ceramics having a Tc of approximately 90 K have been discovered for oxygen (Y-Ba-Cu-0) and rare earth element containing Y-Ba-Cu-0) systems.
その後、Ba成分をストロンチウム(Sr)やカルシウ
ム(Ca)成分に置換したり、La成分をビスマス(B
i)やタリウム(T l )に置換したB1−3r−C
a−Cu−0系(Tc #110 K)やT l −B
a−Ca−Cu−0系(T、#120K)などが発表さ
れている。After that, the Ba component is replaced with strontium (Sr) or calcium (Ca) component, and the La component is replaced with bismuth (B
i) or B1-3r-C substituted with thallium (T l )
a-Cu-0 series (Tc #110K) and T l -B
a-Ca-Cu-0 series (T, #120K) and the like have been announced.
さて、大量の情報を高速に処理する情報処理装置、特に
高速化を必要とする電算機部門には高電子移動度トラン
ジスタ(略称11EMT)や共鳴トンネリング・ホット
エレクトロン・トランジスタ(略称RHET)などガリ
ウム・砒素(GaAs)からなる半導体素子が導入され
つ−あるが、これらの半導体素子は液体窒素(N2)の
温度で特性を発揮することから、か\る半導体素子を搭
載する電子回路を超伏れ
環セラミックスで形成す÷ば極めて効果的である。Now, information processing equipment that processes large amounts of information at high speed, especially in the computer sector that requires high speed, uses gallium-based devices such as high electron mobility transistors (abbreviated as 11EMT) and resonant tunneling hot electron transistors (abbreviated as RHET). Semiconductor elements made of arsenic (GaAs) are being introduced, but since these semiconductor elements exhibit their characteristics at the temperature of liquid nitrogen (N2), electronic circuits equipped with such semiconductor elements have become extremely unstable. It is extremely effective if it is made of ring ceramics.
本発明はこれら超伝導セラミックスよりなる多層回路基
板の製造方法に関するものである。The present invention relates to a method of manufacturing a multilayer circuit board made of these superconducting ceramics.
従来の電子回路の形成法としては薄膜法と厚膜法とがあ
り、共に配線基板としては耐熱性が優れると共に誘電率
が低いアルミナ(α−八へ203)などのセラミックス
を用い、薄膜法の場合はこの上に電子ビーム蒸着やスパ
ッタなどの方法により金(Au)やタンタル(Ta)な
どの薄膜を形成し、写真蝕刻技術(フォトリソグラフィ
)を用いて選択エツチングを行い、微細パターンからな
る導体線路を形成している。Conventional methods for forming electronic circuits include the thin film method and the thick film method, both of which use ceramics such as alumina (α-8he 203), which has excellent heat resistance and a low dielectric constant, as wiring substrates. In this case, a thin film of gold (Au), tantalum (Ta), etc. is formed on this using methods such as electron beam evaporation or sputtering, and selective etching is performed using photolithography to create a conductor consisting of a fine pattern. forming a railway line.
また、厚膜法の場合はスクリーン印刷法によりAuペー
ストや銀・パラジウム(Ag−Pd)ペースドナどの導
体ペーストからなるパターンを作り、これを焼成するこ
とにより導体線路を形成している。In the case of the thick film method, a pattern made of a conductor paste such as Au paste or silver/palladium (Ag-Pd) paste is created by screen printing, and the conductor line is formed by firing the pattern.
そして、回路が複雑になり、多層化を要する場合には主
に厚膜法が使用され、未焼成のセラミック・グリンシー
トの上に導体ペーストをスクリーン印刷した後、位置決
めしながら積層して加圧し、焼成して一体化することに
より多層回路基板が作られている。When the circuit becomes complex and requires multi-layering, the thick film method is mainly used, in which conductive paste is screen printed on unfired ceramic green sheets, then laminated while positioning and pressurized. A multilayer circuit board is made by firing and integrating the two.
然しなから、金属蒸着膜や導体ペーストの代わりに超伝
導セラミックスを用い、これを導体線路として多層回路
基板を形成することは未だ実用化されていない。However, it has not yet been put to practical use to form a multilayer circuit board using superconducting ceramics as conductor lines instead of metal vapor deposition films or conductor pastes.
酸化物超伝導物質としては組成的に各種のものが開発さ
れているが、発明者等が実用化を進めているインドリウ
ム(Y) ・バリウム(Ba)・銅(Cu)・酸素系
セラミックス(Y BazCu+ Oq−’a )につ
いて超伝導特性を得るためには焼成中の雰囲気調整が必
要であるために、従来のようにグリーンシートの上に電
子回路パターンを印刷・乾燥した後に積層して焼成し、
一体化する方法をとることが困難である。Various types of oxide superconducting materials have been developed in terms of composition, including indium (Y), barium (Ba), copper (Cu), and oxygen-based ceramics (which the inventors are currently working on). In order to obtain superconducting properties for Y BazCu+ Oq-'a), it is necessary to adjust the atmosphere during firing, so as in the past, an electronic circuit pattern is printed on a green sheet, dried, and then laminated and fired. death,
It is difficult to adopt an integrated method.
そこで、多層化に当たってセラミ・ツク基板単位毎に印
刷焼成し、これを積層することになるが、この場合は基
板上にパターン形成した導体線路の分だけ厚さが増して
いること\、多少なりとも基板に反りが存在しているた
めに、積層する場合はビア(Via−hole)形成位
置と下の基板の導体線路との配線接続が充分にとれない
ことが問題である。Therefore, when creating multiple layers, each ceramic board is printed and fired and then laminated, but in this case, the thickness increases by the amount of conductor lines patterned on the board. In both cases, the substrates are warped, so when stacking them, there is a problem that the wiring connection between the via-hole formation position and the conductor line on the underlying substrate cannot be sufficiently established.
上記の課題はビア形成位置を孔開けしたセラミック基板
に超伝導ペーストを印刷し、それぞれの孔にペーストを
充填し封口した後に、この基板上に導体線路を印刷し乾
燥して後、焼成して単位のセラミック回路基板を形成す
る工程と、このセラミック回路基板のビア形成位置に更
に超伝導ペーストを印刷してパッドをパターン形成する
工程と、このセラミック回路基板の周辺部にスペーサを
配置し、位置合わせを行いつ\複数のセラミック回路基
板を積層し、加圧しながら乾燥する工程と、スペーサを
取り除いた後、酸化雰囲気中で焼成して一体化する方法
をとることにより解決することができる。The above problem involves printing superconducting paste on a ceramic substrate with holes drilled at the via formation positions, filling each hole with the paste and sealing it, then printing conductor lines on this substrate, drying it, and then firing it. A step of forming a unit ceramic circuit board, a step of further printing superconducting paste at the via formation position of this ceramic circuit board to form a pad pattern, and a step of placing spacers around the periphery of this ceramic circuit board and determining the position. This problem can be solved by combining a plurality of ceramic circuit boards, stacking them, drying them under pressure, removing the spacers, and then baking them in an oxidizing atmosphere to integrate them.
発明者が実用化研究を行っている希土類元素−Ba−C
u−0系例えばY−Ba−Cu−0系の超伝導回路を形
成する場合の問題点は、超伝導セラミックスを用いて導
体ペーストを作り、これを用いてスクリーン印刷などの
方法によりパターン形成した基板を焼成して導体線路を
形成する場合に、ペースト中に含まれている有機溶剤と
バインダが加熱によって分解し、この際に超伝導セラミ
ックスの構成材である酸化物が還元されてYBa2Cu
30 t−aの組成比を示すセラミックスが得られない
ことである。Rare earth elements -Ba-C, which the inventor is conducting practical research on
The problem with forming a u-0 system, for example, a Y-Ba-Cu-0 system superconducting circuit, is that a conductor paste is made using superconducting ceramics, and a pattern is formed using this by a method such as screen printing. When firing the substrate to form conductor lines, the organic solvent and binder contained in the paste are decomposed by heating, and at this time, the oxides that are the constituent materials of superconducting ceramics are reduced and YBa2Cu
The problem is that ceramics having a composition ratio of 30 t-a cannot be obtained.
そのためには、酸化雰囲気中で焼成することが必要であ
るが、超伝導ペーストをスクリーン印刷し、積層した状
態では酸素(Ot)の供給が悪く、超伝導セラミックス
を形成することが困難である。To achieve this, firing in an oxidizing atmosphere is necessary, but when superconducting pastes are screen printed and laminated, oxygen (Ot) is poorly supplied, making it difficult to form superconducting ceramics.
そこで、本発明においては多層配線基板を形成する各基
板毎に予め超伝導導体線路を形成しておく。Therefore, in the present invention, superconducting conductor lines are formed in advance for each board forming a multilayer wiring board.
次に、各配線基板を縦方向に回路接続するビヤ部にバン
ドを設け、その位置を基板より盛り上げおく。Next, a band is provided in the via portion that vertically connects each wiring board to the circuit, and the band is raised above the board.
か\る基板を位置合わせし、積層した後に加圧すると、
ビア部の接続は充分であり、またパッド部は周囲が隙間
であり、0□の供給は充分であるためにパッド部を超伝
導セラミックス化することができる。If you align the substrates and apply pressure after laminating them,
The connection of the via portion is sufficient, and since the pad portion has a gap around it and the supply of 0□ is sufficient, the pad portion can be made of superconducting ceramic.
このようにすると、多層配線基板は各層がビヤ位置で接
続し、相互に隙間が存在しているが、この構成は高周波
特性的に有利である。In this way, each layer of the multilayer wiring board is connected at the via position, and there are gaps between them, but this configuration is advantageous in terms of high frequency characteristics.
すなわち、アルミナ基板を使用する場合、誘電率は約1
0と大きく、アルミナ基板を挟んで上下に存在する配線
間に漏話(Cross−Talk)が生じ易いが、空気
層が存在することによってこれが防げると云う副次的な
効果もある。That is, when using an alumina substrate, the dielectric constant is approximately 1.
0, and cross-talk tends to occur between wirings located above and below the alumina substrate, but the presence of the air layer has the secondary effect of preventing this.
従来の方法でYBazCuzOt−aの組成をもつ超伝
導セラミックスを形成した後、播解機とボールミルとを
用いて粉砕し、整粒して平均粒径が2〜3μmの微粒子
とした。A superconducting ceramic having a composition of YBazCuzOt-a was formed by a conventional method, and then pulverized using a disintegrator and a ball mill, and sized to obtain fine particles with an average particle size of 2 to 3 μm.
そして、有機溶剤としてはテレピネオールとメチルエチ
ルケトンおよびアセトンを用い、またバインダとしては
ポリビニルブチラール(略称PVB)を用い、粘度が2
000ボイズ(Ps)の超伝導ペーストを形成した。Terpineol, methyl ethyl ketone, and acetone were used as organic solvents, and polyvinyl butyral (abbreviated as PVB) was used as a binder, and the viscosity was 2.
A superconducting paste with 000 voids (Ps) was formed.
次に、大きさが10cm角で厚さが0.65mのアルミ
ナ基板を用意し、YAG(イツトリウム・アルミニウム
・ガーネット)レーザを用いてビア形成部に直径が0.
2 mの孔開けをしたものを必要な枚数だけ用意した。Next, prepare an alumina substrate with a size of 10 cm square and a thickness of 0.65 m, and use a YAG (yttrium aluminum garnet) laser to create a via formation portion with a diameter of 0.65 m.
The required number of sheets with 2 m holes were prepared.
先ず、スクリーン印刷法によりアルミナ基板のビア形成
部に超伝導ペーストを充填した後、この基板上に配線パ
ターンを30μmの厚さに形成した。First, a via forming portion of an alumina substrate was filled with superconducting paste by screen printing, and then a wiring pattern was formed on this substrate to a thickness of 30 μm.
そして、アルゴン(Ar)と02の混合雰囲気中で10
00℃で30分間焼成した後、続いて同じ雰囲気中で9
00℃で1時間に亙ってアニールを行い、超伝導線路を
形成した。Then, in a mixed atmosphere of argon (Ar) and 02
After baking at 00°C for 30 minutes, it was subsequently baked at 9°C in the same atmosphere.
Annealing was performed at 00° C. for 1 hour to form a superconducting line.
こ\で、アニールはYBa2CuzOy−aの分子式に
おけるdの値の調節のためである。Here, the purpose of annealing is to adjust the value of d in the molecular formula of YBa2CuzOy-a.
次に、焼成の終わったアルミナ基板のビア形成位置の上
下に超伝導体ペーストをスクリーン印刷し、厚さが20
μmのパッドを形成した。Next, superconductor paste was screen printed on the top and bottom of the via formation position on the fired alumina substrate to a thickness of 20 mm.
A μm pad was formed.
次に、か\る基板でパターン形成の行われていない四隅
に厚さが50μ履のポリエステル製のスペーサをそれぞ
れ配置し、位置合わせを行いながら積層し、加圧した状
態で乾燥した。Next, polyester spacers having a thickness of 50 μm were placed on each of the four corners of the substrate where no pattern was formed, and the layers were laminated while being aligned, and dried under pressure.
次に、四隅のスペーサを取り除いた後、先と同様な条件
すなわち、Arと02の混合雰囲気中で1000℃で3
0分間焼成した後、続いて同じ雰囲気中で900℃で1
時間に亙ってアニールを行い、超伝導パターンを形成し
た。Next, after removing the spacers at the four corners, the same conditions were used as before, i.e., at 1000°C in a mixed atmosphere of Ar and 02.
After baking for 0 min, it was subsequently baked at 900°C for 1 min in the same atmosphere.
Annealing was performed over a period of time to form a superconducting pattern.
このようにして生じた相互の基板間に空隙部をもつ多層
回路基板は各基板の凹凸をビア部で吸収して接続は完全
であり、またビア部のパッドも酸化ガスの供給が充分に
行われているために導体線路と同様な超伝導セラミック
スを得ることができた。In the multilayer circuit board created in this way, with gaps between the boards, the unevenness of each board is absorbed by the via parts, and the connection is perfect, and the pads in the via parts are also sufficiently supplied with oxidizing gas. This made it possible to obtain superconducting ceramics similar to conductor lines.
本発明の実施により超伝導転移温度(T、)が約80に
の超伝導多層配線基板を得ることができ、このようにし
て得られた多層回路基板を使用することによりHEMT
、 RHETやジョセフソン素子のように液体N2の温
度で使用する半導体素子の性能を充分に発揮することが
可能になった。By carrying out the present invention, a superconducting multilayer wiring board having a superconducting transition temperature (T) of about 80 can be obtained, and by using the multilayer circuit board thus obtained, HEMT
, it has become possible to fully demonstrate the performance of semiconductor devices used at the temperature of liquid N2, such as RHET and Josephson devices.
Claims (1)
導物質を成分として含むペーストを印刷して該孔にペー
ストを充填し封口した後に前記基板上に導体パターンを
印刷し乾燥して後、焼成して単位のセラミック回路基板
を形成する工程と、該セラミック回路基板のビア形成位
置に更に酸化物超伝導物質を成分として含むペーストを
印刷してパッドをパターン形成する工程と、 該セラミック回路基板の周辺部にスペーサを配置し、位
置合わせを行いつゝ複数のセラミック回路基板を積層し
、加圧しながら乾燥する工程と、前記スペーサを取り除
いた後、酸化雰囲気中で焼成して一体化する工程と、 を含んで構成されることを特徴とする超伝導回路基板の
製造方法。[Claims] Printing a paste containing an oxide superconducting material as a component on a ceramic substrate with a hole formed at a via formation position, filling the hole with the paste and sealing it, and then printing a conductor pattern on the substrate and drying it. and then firing to form a unit ceramic circuit board; further printing a paste containing an oxide superconducting material as a component at the via formation position of the ceramic circuit board to form a pad pattern; A process of arranging spacers around the periphery of the ceramic circuit board, stacking a plurality of ceramic circuit boards while aligning them, and drying them under pressure; and after removing the spacers, firing in an oxidizing atmosphere. A method for manufacturing a superconducting circuit board, comprising: a step of integrating;
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63199103A JP2551114B2 (en) | 1988-08-10 | 1988-08-10 | Method for manufacturing superconducting circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63199103A JP2551114B2 (en) | 1988-08-10 | 1988-08-10 | Method for manufacturing superconducting circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0247894A true JPH0247894A (en) | 1990-02-16 |
| JP2551114B2 JP2551114B2 (en) | 1996-11-06 |
Family
ID=16402175
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP63199103A Expired - Fee Related JP2551114B2 (en) | 1988-08-10 | 1988-08-10 | Method for manufacturing superconducting circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2551114B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0269994A (en) * | 1988-09-05 | 1990-03-08 | Mitsubishi Mining & Cement Co Ltd | Ceramic superconductive multilayer wiring board and manufacture of the same |
| WO1992020108A1 (en) * | 1991-05-08 | 1992-11-12 | Superconductor Technologies, Inc. | Multichip interconnect module including superconductive materials |
-
1988
- 1988-08-10 JP JP63199103A patent/JP2551114B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0269994A (en) * | 1988-09-05 | 1990-03-08 | Mitsubishi Mining & Cement Co Ltd | Ceramic superconductive multilayer wiring board and manufacture of the same |
| WO1992020108A1 (en) * | 1991-05-08 | 1992-11-12 | Superconductor Technologies, Inc. | Multichip interconnect module including superconductive materials |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2551114B2 (en) | 1996-11-06 |
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