JPH0256119A - Coding circuit for vector quantizer - Google Patents

Abstract

PURPOSE:To realize high efficient coding of an input signal by applying block- processing to an input signal series as a vector, converting the result into a block of an output signal series with minimum distortion by minimum/maximum approximation and coding and outputting the address. CONSTITUTION:An output vector yi is fed to an output register 8 in the order of i=1, 2,...N, and the absolute value of a difference is calculated through a subtractor 9 and an absolute value correction unit 10 for each input vector X and element. A maximum value Di of element distortion Di1 is detected by a maximum element distortion detector 11. Then a minimum distortion D among di is detected y a minimum distortion output vector detector 12. That is, the input vector X and the minimum distortion distortion of the output vector yi are obtained as D=Min[Max¦yi1-x1¦]. The index (i) in such a case is fetched by a code output circuit 13 and the result is used as an index signal i14 being an output of a coding section.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a quantizer encoding circuit that quantizes a signal sequence into a minimum distortion according to an amplitude probability density function of an input signal.

Conventional quantizers of this type employ scalar quantization in which an input signal is converted to a corresponding output signal level for each sample.

FIG. 1 shows a conventional scalar quantizer. In the figure, (1)
is a sequentially input signal sequence XI + X2,...
xK (K is an integer) b (2) is a scalar menciformizer, (
3) is the output signal sequence y1. which is converted to a water digitization level corresponding to each sample of the input signal sequence (1). y2.・・・
・It is y3.

Now, it is assumed that the amplitude probability density of the input signal sequence (1) takes a Gaussian distribution centered on the origin. In this case, the conventional scalar quantization characteristic that minimizes the distortion of the input signal system (1) and the output signal system (2) has a quantization level that becomes coarser as it moves away from the origin, as shown in Figure 2 (ζ). ,
If there is a correlation between each sample of the input signal sequence (1),
Even if quantization is performed to minimize distortion for each sample as in the conventional method, the output signal sequence (2) will not be optimally quantized.

This invention was made in order to eliminate the quantization loss caused by the conventional scalar converter, and it divides the input signal sequence into blocks for each predetermined sample and quickly converts them into blocks of the output signal sequence. The present invention aims to provide an encoding circuit for a vector quantizer that encodes and outputs addresses.

Next, the principle of vector quantization will be explained.

for correlated input signal sequences (K is an integer greater than or equal to 2)
a block consisting of input vector X=(Xl,
X2. .

Now assume a dimensional Euclidean signal space RE containing all input vectors X. In this case, vector quantization is a finite set of output vectors Y=(y++yz+...
- Yw) is defined as the mapping of R1 to Yw). R8
If the N divisions of R1+R2+... are islands, vector quantization Q is expressed as follows.

Q:R'-Y Here, Ri=Q-1(yi)=(XeR':Q(X)
=Yi) After all, vector quantization Q can be regarded as a continuation of encoding C and decoding. At this time, the encoding C is the index set of Y of R' J = (1, 2°...
・N), and decoding is mapping from J to Y.

C: R'-J D: J-Y Q=D-C In the vector quantization, if there is a correlation in the input vector X,
Efficient quantization can be achieved.

FIG. 3 shows the signal space and output vector arrangement in two-dimensional vector quantization. When the input signals x1 and x2 are correlated, the amplitude distribution is concentrated near XI = x2. Therefore, the division Ri and its representative point (
For example, the center of gravity) yi is optimized by clustering as shown in the example of FIG. At this time, the input vector I included in the division Ri is vector quantized into the output vector yi. In FIG. 3, XI*12>O.

FIG. 4 shows a coding circuit of a vector pythonizer according to the present invention, and FIG. 5 shows a configuration diagram of an embodiment of a decoding section corresponding to the coding circuit of the present invention.

In the figure, (4) is input vector X, (5) is input vector register, (6) is output vector code table address counter, (7) is output vector code table, (8) is output vector register, (9 ) is a subtractor, Q
l is an absolute value corrector, a is a maximum element distortion detector, (6) is a minimum distortion output vector detector, and □□□ is an index set of output vectors that produce the minimum distortion.The output circuit Q4 produces the minimum distortion. The index signal of the output vector, μs, is the output vector.

Next, the operation of the encoding circuit of the vector quantizer according to the present invention will be explained.

In the encoding unit shown in Fig. 3, the signal sequence input from the signal source is blocked in units of dimensional input vectors X = (Xl l xg l...xl) (each element corresponds to the sample I value). ) is latched into the input vector register (5). At this point, from the probabilistic model of the input signal or the standard image data, for example,
M.

Gray' An algorithm for v
ectorquantizer design'IEE
E Trans, Commun,, vol C0M
-28, pp, 84-95. Jan.

A set of output vectors yi resulting in the minimum distortion determined using the clustering method shown in 1980
Output vectors yi are sequentially read from the output vector code table (7) in which yl + y2 + . . . Y, ) are written. Note that clustering is generally an operation in a method that collects similar objects to create clusters and describes the structure of the object based on the similarities within each cluster and the differences between each cluster. . The output vector yi is i=1.2. ...N is sent to the output vector register (8) in order, and the absolute value of the difference (hereinafter defined as element type Dil) is passed through the input vector X and each element value subtracter (9) and absolute value corrector σQ Calculate.

This element type D il =(D t+ , D t2 *・
...Dim) is detected by the maximum element distortion detector αυ. The maximum element distortion detection calculation may be performed by comparing each light of the element type Dil in a tournament manner. Next, the minimum distortion output vector detector @D i = (Dt + D2,...
・Detect the minimum distortion among D, ). This means that the code table address counter (6) is i=t, Z,...N
(The minimum distortion in the past is replaced with each other and detected by comparison.)

In other words, the minimum distortion between the input vector X and the output vector yi is D=Min (Max l yil −X+l )
It is required as. The index i at this time is taken in by the code output circuit (to), and the index signal i Q4
1 as the encoder output.

Next, in the decoding section shown in FIG.
If the output vector code table (7) in which the output vector yi is stored is referred to as an address signal, the output vector yi corresponding to the index signal i is obtained as the output signal (6).

Here, if the index signal α of the encoder in the vector quantizer according to the present invention is used for transmission or recording in memory, highly efficient encoding can be realized.

The encoding efficiency η of the encoding circuit of the vector multiplexer according to the present invention is the input signal sequence X4 + X! +...X, and if N=2M, then +y=M/ bits/sample. Therefore, this vector quantizer can be used for highly efficient encoding of data such as images and audio, in which correlated sample sequences are divided into blocks and encoded.

Further, in the present invention, since the output vector code table reference method, parallelization of vector operations, and minimax approximate distortion detection method are adopted for minimum distortion calculation, a high-speed vector quantizer encoding circuit can be realized.

Furthermore, by introducing this microprocessor, it is of course possible to sequentially perform this vector operation on each original value.

Alternatively, the output vector code table may have this structure, and the minimax matching with the input vector may be performed using a tree search method.

Furthermore, when there is a 3Y-yannel parallel signal sequence such as a color image signal, it is of course possible to block the signal sequence across channels and use it as an input vector.

As described above, according to the present invention, an input signal sequence is divided into blocks, vectorized all at once, converted into a block of an output signal sequence resulting in minimum distortion by minimax approximation, and the vector multiplier is encoded and outputted by encoding the address. Since the encoding circuit of the encoder is configured, there is an advantage that highly efficient encoding of the input signal can be realized.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of a conventional scalar empress converter, FIG. 2 is an explanatory diagram of the empress characteristic of a conventional scalar empress converter, and FIG. 3 is an explanatory diagram of the subjunctive characteristic of the vector quantizer according to the present invention. 4 is a configuration diagram showing an embodiment of the encoding circuit of the vector multiplexer according to the present invention, and FIG. 5 is a configuration diagram showing an embodiment of the decoding section corresponding to the encoding circuit of FIG. 4. It is a diagram. In the figure, (2) is a scalar generator, (5) is an input vector register, (6) is a code table address counter, (7) is an output vector code table, (8) is an output vector register, and (9) is a Co is an absolute value corrector, CIη is a maximum element distortion detector, (6) is a minimum distortion output vector detector, and (to) is a sign output circuit. In the drawings, the same reference numerals indicate the same or equivalent parts.

Claims (1)

[Claims] For the distribution of the input vector in the K-dimensional Euclidean signal space, where the input signal sequence is divided into K blocks (where K is an integer of 2 or more), the signal space is divided into multiple points that serve as representative points to minimize distortion. an output vector code table that stores output vectors of the output vector, an address generator that generates a code table address to be given to the output vector code table, and output vectors and inputs that are sequentially read out from the output vector code table according to the code table address. a subtracter for calculating the difference of each element from the vector; an absolute value corrector for converting the output of the subtracter into an absolute value for each element to calculate distortion for each element; a maximum element distortion detector that determines the maximum value of distortion; a minimum distortion output vector detector that detects an output vector that minimizes the maximum value of distortion for each element of an output vector that is sequentially matched with the input vector; a code output circuit that encodes and outputs a code table address given to the output vector code table corresponding to the output vector with the minimum distortion according to the detection result of the minimum distortion output vector detector; encoder encoding circuit.