JPH026322U - - Google Patents
Info
- Publication number
- JPH026322U JPH026322U JP8370688U JP8370688U JPH026322U JP H026322 U JPH026322 U JP H026322U JP 8370688 U JP8370688 U JP 8370688U JP 8370688 U JP8370688 U JP 8370688U JP H026322 U JPH026322 U JP H026322U
- Authority
- JP
- Japan
- Prior art keywords
- timer counter
- reset
- lsi
- keyboard
- chip microcontroller
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003213 activating effect Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Input From Keyboards Or The Like (AREA)
Description
第１図は本考案の実施例に係る定時間自己リセ
ツト形キーボードのリセツト機構回路部のブロツ
ク図、第２図は本考案に係るタイマカウンタＬＳ
Ｉリセツトの際のプログラムのフローチヤートを
示した図である。
１……１チツプマイコン、２……タイマカウン
タＬＳＩ、３……タイマカウンタリセツト信号線
、４……１チツプマイコンリセツト信号線。
FIG. 1 is a block diagram of the reset mechanism circuit section of a fixed-time self-resetting type keyboard according to an embodiment of the present invention, and FIG. 2 is a block diagram of a timer counter LS according to the present invention.
FIG. 3 is a diagram showing a flowchart of a program at the time of I reset. 1...1 chip microcomputer, 2...timer counter LSI, 3...timer counter reset signal line, 4...1 chip microcomputer reset signal line.
Claims (1)
プマイコンと信号線で結ばれたタイマカウンタＬ
ＳＩと、キーボードのキーがオフしたとき前記タ
イマカウンタＬＳＩにタイマカウンタリセツト信
号を送出し該タイマカウンタＬＳＩのタイマカウ
ンタを初期化するプログラムとを有し、前記タイ
マカウンタＬＳＩは、タイマカウンタをカウント
アツプし続けている間にタイマカウンタが予め任
意に設定された時間経過したならばタイマカウン
タＬＳＩと１チツプマイコンのリセツト端子を結
ぶリセツト信号線を介してリセツト信号を１チツ
プマイコンへ送出し、１チツプマイコンのハード
ウエアリセツトを起動することを特徴とする定時
間自己リセツト形キーボード。 A timer counter L connected to one chip microcomputer in the keyboard by a signal line.
SI and a program that sends a timer counter reset signal to the timer counter LSI to initialize the timer counter of the timer counter LSI when a key on the keyboard is turned off, and the timer counter LSI counts up the timer counter. If the timer counter has elapsed for an arbitrarily set time while the timer continues to run, a reset signal is sent to the 1-chip microcontroller via the reset signal line connecting the timer counter LSI and the reset terminal of the 1-chip microcontroller, and the 1-chip microcontroller is reset. A fixed-time self-resetting keyboard characterized by activating a hardware reset of a microcomputer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8370688U JPH026322U (en) | 1988-06-24 | 1988-06-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8370688U JPH026322U (en) | 1988-06-24 | 1988-06-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH026322U true JPH026322U (en) | 1990-01-17 |
Family
ID=31308417
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8370688U Pending JPH026322U (en) | 1988-06-24 | 1988-06-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH026322U (en) |
-
1988
- 1988-06-24 JP JP8370688U patent/JPH026322U/ja active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0433127U (en) | ||
| JPS5920732U (en) | timer circuit | |
| JPH0277747U (en) | ||
| JPH01123230U (en) | ||
| JPH0250758U (en) | ||
| JPH0366417U (en) | ||
| JPS637773U (en) | ||
| JPS62169831U (en) | ||
| JPH0310682U (en) | ||
| JPS6296754U (en) | ||
| JPS635572U (en) | ||
| JPS62105546U (en) | ||
| JPH02149419U (en) | ||
| JPH039043U (en) | ||
| JPH0184147U (en) | ||
| JPH0316790U (en) | ||
| JPS62129864U (en) | ||
| JPH0292521U (en) | ||
| JPS6312569U (en) | ||
| JPS6425241U (en) | ||
| JPH0321121U (en) | ||
| JPS6399449U (en) | ||
| JPS6335239U (en) | ||
| JPH01138130U (en) | ||
| JPS60170632U (en) | Controller with built-in clock function |