JPH0263464U - - Google Patents

Info

Publication number
JPH0263464U
JPH0263464U JP14209988U JP14209988U JPH0263464U JP H0263464 U JPH0263464 U JP H0263464U JP 14209988 U JP14209988 U JP 14209988U JP 14209988 U JP14209988 U JP 14209988U JP H0263464 U JPH0263464 U JP H0263464U
Authority
JP
Japan
Prior art keywords
transistor
logarithmic conversion
conversion circuit
circuit
current error
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14209988U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14209988U priority Critical patent/JPH0263464U/ja
Publication of JPH0263464U publication Critical patent/JPH0263464U/ja
Pending legal-status Critical Current

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  • Measuring Instrument Details And Bridges, And Automatic Balancing Devices (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例の回路図、第2図は
従来の検波直線性補正回路の一例を示す回路図で
ある。 1…対数変換回路、2…逆対数変換回路、3,
4…オペアンプ、5…対数変換トランジスタ、6
…エミツタ飽和電流誤差補正用トランジスタ、7
,8…オペアンプ、9…対数変換トランジスタ、
10…エミツタ飽和電流誤差補正用トランジスタ
、11…マルチプライヤ、12…入力及び電流―
電圧変換用オペアンプ、13…恒温槽、R〜R
14…抵抗、VR,VR…基準電圧印加端子
、IN…入力端子、OUT…出力端子、VR…可
変抵抗、R…抵抗、VR…基準電圧印加端子。
FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a circuit diagram showing an example of a conventional detection linearity correction circuit. 1... Logarithmic conversion circuit, 2... Anti-logarithmic conversion circuit, 3,
4... operational amplifier, 5... logarithmic conversion transistor, 6
...Emitter saturation current error correction transistor, 7
, 8... operational amplifier, 9... logarithmic conversion transistor,
10... Transistor for emitter saturation current error correction, 11... Multiplier, 12... Input and current -
Operational amplifier for voltage conversion, 13... constant temperature oven, R 1 ~ R
14 ...Resistor, VR1 , VR2 ...Reference voltage application terminal, IN...Input terminal, OUT...Output terminal, VR...Variable resistor, R...Resistor, VR...Reference voltage application terminal.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 一の対数変換トランジスタとそのエミツタ飽和
電流誤差補正用トランジスタで構成した対数変換
回路に、他の対数変換トランジスタとそのエミツ
タ飽和電流誤差補正用トランジスタとで構成した
逆対数変換回路を接続し、前記対数変換回路に入
力された信号を逆対数変換回路を通して出力する
ように構成したことを特徴とする検波直線性補正
回路。
A logarithmic conversion circuit composed of one logarithmic conversion transistor and its emitter saturation current error correction transistor is connected to an antilogarithmic conversion circuit composed of another logarithmic conversion transistor and its emitter saturation current error correction transistor. A detection linearity correction circuit characterized in that the detection linearity correction circuit is configured to output a signal input to the conversion circuit through an anti-logarithmic conversion circuit.
JP14209988U 1988-10-31 1988-10-31 Pending JPH0263464U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14209988U JPH0263464U (en) 1988-10-31 1988-10-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14209988U JPH0263464U (en) 1988-10-31 1988-10-31

Publications (1)

Publication Number Publication Date
JPH0263464U true JPH0263464U (en) 1990-05-11

Family

ID=31407756

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14209988U Pending JPH0263464U (en) 1988-10-31 1988-10-31

Country Status (1)

Country Link
JP (1) JPH0263464U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8972474B2 (en) 2011-11-01 2015-03-03 Mitsubishi Electric Corporation Logarithmic/inverse-logarithmic conversion circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8972474B2 (en) 2011-11-01 2015-03-03 Mitsubishi Electric Corporation Logarithmic/inverse-logarithmic conversion circuit

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