JPH0263554U - - Google Patents

Info

Publication number
JPH0263554U
JPH0263554U JP14353188U JP14353188U JPH0263554U JP H0263554 U JPH0263554 U JP H0263554U JP 14353188 U JP14353188 U JP 14353188U JP 14353188 U JP14353188 U JP 14353188U JP H0263554 U JPH0263554 U JP H0263554U
Authority
JP
Japan
Prior art keywords
ecl
semiconductor device
semiconductor element
wiring board
printed wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14353188U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP14353188U priority Critical patent/JPH0263554U/ja
Publication of JPH0263554U publication Critical patent/JPH0263554U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例による、ECL半
導体素子を実装した印刷配線板を示す正面図、第
2図は従来のECL半導体素子を実装した印刷配
線板を示す正面図である。 1は印刷配線板、2,3はECL半導体素子、
2aはECL半導体素子2の出力端子、3aはE
CL半導体素子3の入力端子、3bはECL半導
体素子のECLレベル接続端子、4は抵抗素子、
5は印刷配線板1の配線、6はECLレベルへ接
続するスルホール、7はECL半導体素子3に内
蔵された抵抗素子である。なお、図中同一符号は
同一、または相当部分を示す。
FIG. 1 is a front view showing a printed wiring board on which an ECL semiconductor element is mounted according to an embodiment of the invention, and FIG. 2 is a front view showing a printed wiring board on which a conventional ECL semiconductor element is mounted. 1 is a printed wiring board, 2 and 3 are ECL semiconductor elements,
2a is the output terminal of the ECL semiconductor element 2, 3a is the E
An input terminal of the CL semiconductor element 3, 3b is an ECL level connection terminal of the ECL semiconductor element, 4 is a resistance element,
5 is a wiring on the printed wiring board 1, 6 is a through hole connected to the ECL level, and 7 is a resistance element built into the ECL semiconductor element 3. Note that the same reference numerals in the figures indicate the same or equivalent parts.

補正 昭63.1.5 図面の簡単な説明を次のように補正する。 明細書第5頁10行目および11行目「ECL
レベル」を「ECL“L”レベル」と訂正する。
Amendment January 5, 1983 The brief description of the drawing is amended as follows. Page 5, lines 10 and 11 of the specification “ECL
Correct “level” to “ECL “L” level.”

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半導体素子において、他の半導体素子より出力
された信号を入力する端子部分に、その入力され
た信号を終端する抵抗を内蔵することを特徴とす
る半導体素子。
1. A semiconductor device characterized in that a resistor for terminating an input signal is built into a terminal portion for inputting a signal output from another semiconductor device.
JP14353188U 1988-11-02 1988-11-02 Pending JPH0263554U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14353188U JPH0263554U (en) 1988-11-02 1988-11-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14353188U JPH0263554U (en) 1988-11-02 1988-11-02

Publications (1)

Publication Number Publication Date
JPH0263554U true JPH0263554U (en) 1990-05-11

Family

ID=31410434

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14353188U Pending JPH0263554U (en) 1988-11-02 1988-11-02

Country Status (1)

Country Link
JP (1) JPH0263554U (en)

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