JPH0264232U - - Google Patents
Info
- Publication number
- JPH0264232U JPH0264232U JP14357388U JP14357388U JPH0264232U JP H0264232 U JPH0264232 U JP H0264232U JP 14357388 U JP14357388 U JP 14357388U JP 14357388 U JP14357388 U JP 14357388U JP H0264232 U JPH0264232 U JP H0264232U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- detection signal
- edge detection
- input state
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000003708 edge detection Methods 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Electronic Switches (AREA)
Description
第１図は本考案の一実施例の構成図、第２図は
第１図の動作説明図、第３図はエンコーダのＩ／
Ｆ回路と接続する送信回路の構成例を示した図、
第４図は送信回路とＩ／Ｆ回路を接続した状態を
示した図、第５図及び第６図は従来におけるエン
コーダのインタフエイス回路の構成例を示した図
である。
１……受信回路部、１１，１２……レシーバ回
路、２，２１，２２……エツジ検出回路、３，３
１，３２……入力状態保持回路、４……入力選択
回路。
Fig. 1 is a block diagram of an embodiment of the present invention, Fig. 2 is an explanatory diagram of the operation of Fig. 1, and Fig. 3 is an I/O diagram of the encoder.
A diagram showing an example of the configuration of a transmitting circuit connected to the F circuit,
FIG. 4 is a diagram showing a state in which a transmitting circuit and an I/F circuit are connected, and FIGS. 5 and 6 are diagrams showing a configuration example of a conventional encoder interface circuit. 1... Receiving circuit section, 11, 12... Receiver circuit, 2, 21, 22... Edge detection circuit, 3, 3
1, 32...Input state holding circuit, 4...Input selection circuit.
Claims (1)
に接続されたエンコーダのインタフエイス回路に
おいて、 前記検出信号を受けるレシーバ回路が複数種類
設けられた受信回路部と、 各レシーバ回路毎に設けられていて、レシーバ
回路で受けた検出信号のエツジを検出するエツジ
検出信号を発生するエツジ検出回路と、 各エツジ検出回路毎に設けられていて、それぞ
れのエツジ検出信号を受けて入力状態信号を発生
し、リセツト後最初に立上がつたエツジ検出信号
を受けたもののみの入力状態信号が変動する入力
状態保持回路と、 各入力状態信号を受け、変動した入力状態信号
を発生した入力状態保持回路に対応したレシーバ
回路が受けた検出信号のみをクロツクで同期化し
て出力する入力選択回路、 を具備したエンコーダのインタフエイス回路。[Claims for Utility Model Registration] In an encoder interface circuit connected to an output end of an encoder that outputs a two-phase detection signal, a reception circuit section is provided with a plurality of types of receiver circuits that receive the detection signal; An edge detection circuit is provided for each receiver circuit and generates an edge detection signal to detect the edge of the detection signal received by the receiver circuit, and an edge detection circuit is provided for each edge detection circuit and receives the respective edge detection signal. an input state holding circuit that generates an input state signal and changes the input state signal of only the one that receives the first edge detection signal that rises after reset; An encoder interface circuit comprising an input selection circuit that synchronizes with a clock only the detection signal received by the receiver circuit corresponding to the generated input state holding circuit and outputs the signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14357388U JPH0264232U (en) | 1988-11-02 | 1988-11-02 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14357388U JPH0264232U (en) | 1988-11-02 | 1988-11-02 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0264232U true JPH0264232U (en) | 1990-05-15 |
Family
ID=31410514
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14357388U Pending JPH0264232U (en) | 1988-11-02 | 1988-11-02 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0264232U (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5730427A (en) * | 1980-07-31 | 1982-02-18 | Fujitsu Ltd | Signal automatic switching circuit |
| JPS5815320A (en) * | 1981-07-21 | 1983-01-28 | Tamura Electric Works Ltd | Edge detection circuit for signal |
| JPS6058609A (en) * | 1983-09-12 | 1985-04-04 | Agency Of Ind Science & Technol | Manufacture of semiconductor thin film crystal layer |
-
1988
- 1988-11-02 JP JP14357388U patent/JPH0264232U/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5730427A (en) * | 1980-07-31 | 1982-02-18 | Fujitsu Ltd | Signal automatic switching circuit |
| JPS5815320A (en) * | 1981-07-21 | 1983-01-28 | Tamura Electric Works Ltd | Edge detection circuit for signal |
| JPS6058609A (en) * | 1983-09-12 | 1985-04-04 | Agency Of Ind Science & Technol | Manufacture of semiconductor thin film crystal layer |