JPH0266895A - Discharge lamp lightup device - Google Patents

Discharge lamp lightup device

Info

Publication number
JPH0266895A
JPH0266895A JP21699888A JP21699888A JPH0266895A JP H0266895 A JPH0266895 A JP H0266895A JP 21699888 A JP21699888 A JP 21699888A JP 21699888 A JP21699888 A JP 21699888A JP H0266895 A JPH0266895 A JP H0266895A
Authority
JP
Japan
Prior art keywords
discharge lamp
circuit
current
switching
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP21699888A
Other languages
Japanese (ja)
Inventor
Fuminori Nakaya
文則 仲矢
Kenichi Inui
乾 健一
Minaki Aoike
青池 南城
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Lighting and Technology Corp
Original Assignee
Toshiba Lighting and Technology Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Lighting and Technology Corp filed Critical Toshiba Lighting and Technology Corp
Priority to JP21699888A priority Critical patent/JPH0266895A/en
Publication of JPH0266895A publication Critical patent/JPH0266895A/en
Pending legal-status Critical Current

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  • Circuit Arrangements For Discharge Lamps (AREA)

Abstract

PURPOSE:To secure switching operation in a safe region and enhance the reliability by furnishing an inductance element between output terminals of an inverter circuit, and by allowing a phase delay current to flow in a MOSFET even when a discharge lamp is removed. CONSTITUTION:When a discharge lamp 3 inserted between output terminals of an inverter circuit 2 is removed, a phase delay drain current flows in drains of MOSFETs 4, 5 alternately. This is because an inductor L1 as an inductance element is connected parallelly with a series resonance circuit of a current limit inductor L and a capacitor C3 and this circuit takes the phase delay current. This reduces switching loss to eliminate heat emission, and switching operation can be performed in a safe region to accomplish a high reliability lightup circuit.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、ハーフブリッジインバータ型の放電灯点灯装
置に関する。
DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a half-bridge inverter type discharge lamp lighting device.

従来の技術 従来、この種の放電灯点灯装置では商用交流電源を電源
としインバータ回路を介して放電灯を点灯させるように
している。
2. Description of the Related Art Conventionally, in this type of discharge lamp lighting device, a commercial AC power source is used as a power source to light a discharge lamp via an inverter circuit.

このためのハーフブリッジインバータ型放電灯点灯装置
(回路)として第3図に示すようなものがある。まず、
直流電源1にはインバータ回路2を介して放電灯3が接
続されている。ここに、インバータ回路2は直流電源1
間に直列に接続した2つのスイッチング素子、具体的に
はMOS  FET(MO3型電解効果型トランジスタ
)4,5と、その接続中点と前記放電灯3との間に接続
した限流インダクタしとこの限流インダクタLと放電灯
3のフィラメント3a、3bに直列なコンデンサCとに
より■、C直列共振回路と、MOS  FET4.5に
各々並列でブリッジ接続された直流カットなコンデンサ
C,,C2とによるハーフブリッジ型として構成されて
いる。ここに、前記コンデンサCは放電灯3のフィラメ
ント3a、3b中、非電源側端子間に接続されている。
A half-bridge inverter type discharge lamp lighting device (circuit) for this purpose is shown in FIG. first,
A discharge lamp 3 is connected to the DC power supply 1 via an inverter circuit 2. Here, the inverter circuit 2 is connected to the DC power supply 1
Two switching elements connected in series between them, specifically MOS FETs (MO3 type field effect transistors) 4 and 5, and a current limiting inductor connected between the midpoint of their connection and the discharge lamp 3. This current-limiting inductor L and the capacitor C connected in series with the filaments 3a and 3b of the discharge lamp 3 create a C series resonant circuit, and DC-cut capacitors C, C2 each connected in parallel to the MOS FET 4.5 in a bridge. It is configured as a half-bridge type. Here, the capacitor C is connected between the non-power supply side terminals of the filaments 3a and 3b of the discharge lamp 3.

また、前記MO5FET45の内の一方、ここでは、M
OSFET4のドレインD−ソースS間にはスイッチン
グ改善用コンデンサC3が接続されている。
Also, one of the MO5FETs 45, here, M
A switching improvement capacitor C3 is connected between the drain D and source S of the OSFET4.

このような構成において、2つのMOS  FET4,
5は図示しない駆動制御回路により個別に動作制御され
、一方がオフ時に他方がスイッチング制御される。この
時、放電灯3が装着されて点灯している正常時にはコン
デンサCに流れる電流によりフィラメント3a、3bに
は電力が供給される。このようなコンデンサCの存在に
より、放電灯3のフィラメント3a、3bが端子に接続
された状態では、MOS  FET4.5にはランプ電
流に対して遅相なる電流が常に交互に流れる。
In such a configuration, two MOS FET4,
5 are individually controlled in operation by a drive control circuit (not shown), and when one is off, the other is under switching control. At this time, under normal conditions when the discharge lamp 3 is attached and lit, electric power is supplied to the filaments 3a and 3b by the current flowing through the capacitor C. Due to the presence of such a capacitor C, when the filaments 3a and 3b of the discharge lamp 3 are connected to the terminals, a current that is lagging in phase with respect to the lamp current always alternately flows through the MOS FET 4.5.

発明が解決しようとする問題点 ところが、放電灯3が外れたり、未装着なる無負荷状態
の時には、第3図からも判るように、フィラメント3a
、3bが切り離され、出力電流が流れない。しかし、一
方のMOS  FET4のドレインD−ソースS間には
スイッチング改善用コンデンサC3が接続されているた
め、このMOSFET4には放電電流が流れる。また、
このMOS  FET4に直列な他方のMOS  FE
T5には充電電流が流れる。この結果、MOS  FE
T4のドレインD−ソースS間電圧V D S 2のオ
ン/オフのタイミングにて、各々のMOS  FET4
.5のドレインDには第4図に示すようにスイッチング
波形状のドレイン電流I D+ +  I D2が流れ
、スイッチングロスが大きくなるため、著しい発熱を生
ずる。場合によっては、MOS  FETの安全動作領
域を越えてしまうこともある。
Problems to be Solved by the Invention However, when the discharge lamp 3 is detached or is not attached or is in an unloaded state, as can be seen from FIG. 3, the filament 3a
, 3b are disconnected, and no output current flows. However, since the switching improvement capacitor C3 is connected between the drain D and source S of one MOSFET 4, a discharge current flows through this MOSFET 4. Also,
The other MOS FE in series with this MOS FET4
A charging current flows through T5. As a result, MOS FE
At the on/off timing of the drain D-source S voltage VDS2 of T4, each MOS FET4
.. As shown in FIG. 4, a switching wave-shaped drain current I D+ + I D2 flows through the drain D of No. 5, which increases switching loss and causes significant heat generation. In some cases, the safe operating area of the MOS FET may be exceeded.

問題点を解決するための手段 直列接続した2個のMOS  FETを駆動回路により
スイッチングさせるとともにこのスイッチング出力を直
列共振回路に供給するインバータの発振動作により放電
灯を点灯させる放電灯点灯装置であって、前記直列共振
回路の定数を前記放電灯の点灯中の前記MOSFETに
対し常に遅相電流を流す値に設定し、一方の前記MOS
FETのドレイン−ソース間にスイッチング改善用コン
デンサ又はスナバ回路を接続したハーフブリッジインバ
ータ型の放電灯点灯装置において、前記インバータ回路
の出力端子間に前記放電灯を取外した時にも前記MOS
FETに対し遅相電流を流すためのインダクタンス素子
を接続する。
Means for Solving the Problems A discharge lamp lighting device is provided in which two MOS FETs connected in series are switched by a drive circuit and the discharge lamp is lit by the oscillation operation of an inverter which supplies the switching output to a series resonant circuit. , the constant of the series resonant circuit is set to a value that causes a slow phase current to always flow through the MOSFET during lighting of the discharge lamp;
In a half-bridge inverter type discharge lamp lighting device in which a switching improvement capacitor or a snubber circuit is connected between the drain and source of the FET, the MOS remains connected between the output terminals of the inverter circuit even when the discharge lamp is removed.
An inductance element is connected to cause a slow phase current to flow through the FET.

作用 放電灯が外れたような無負荷状態にあっても、出力端子
間にインダクタンス素子が存在することにより、MOS
  FETに接続されたコンデンサ又はスナバ回路との
間でL C回路が構成され、MOS  FETのドレイ
ンには、通常点灯時と同様に、常に遅相なる電流が流れ
、ロスの少ないスイッチング動作となり、その発熱が抑
制される。
Even under no-load conditions, such as when the working discharge lamp is disconnected, the presence of an inductance element between the output terminals prevents the MOS
An LC circuit is formed between the capacitor or snubber circuit connected to the FET, and a current with a lagging phase always flows through the drain of the MOS FET, just as it would during normal lighting, resulting in a switching operation with less loss. Heat generation is suppressed.

実施例 本発明の一実施例を第1図及び第2図に基づいて説明す
る。第3図及び第4図で示した部分と同一部分は同一符
号を用いて示す。本実施例は、インバータ回路2の出力
端子間、即ち、限流インダクタLとコンデンサCとによ
るL C直列共振回路に並列状態で、インダクタンス素
子としてのインダクタL1 を接続したものである。こ
こに、このインダクタL1 としては、無負荷時におい
てJEJM○5FET4.5のドレインに遅相のドレイ
ン電流■D+ +  I D2を流し得るインダクタ値
を持つものが用いられる このような構成によれば、あらゆるモード、例えば放電
灯3が外れているような無負荷状態にあつても、M O
S  FE T /l 、  5のドレインには第2図
に示すように常に遅相のドレイン電流■D++ID11
が交互に流れ、スイッチングロスの少ないものとなる。
Embodiment An embodiment of the present invention will be explained based on FIGS. 1 and 2. The same parts as those shown in FIGS. 3 and 4 are indicated using the same reference numerals. In this embodiment, an inductor L1 as an inductance element is connected between the output terminals of an inverter circuit 2, that is, in parallel to an LC series resonant circuit formed by a current limiting inductor L and a capacitor C. Here, according to such a configuration, the inductor L1 has an inductor value that allows a slow-phase drain current ■D+ + I D2 to flow through the drain of the JEJM○5FET4.5 at no load. M O
As shown in Fig. 2, the drain current of SFE T /l, 5 always has a slow phase ■D++ID11
flows alternately, resulting in less switching loss.

よって、従来のような発熱はなく、安全領域でスイッチ
ング動作させることができ、信頼性の高い点灯回路とな
る。
Therefore, unlike conventional lighting circuits, there is no heat generation, and switching operations can be performed within a safe range, resulting in a highly reliable lighting circuit.

なお、本実施例では第3図に対応させてスイッチング改
善用にコンデンサC3を接続したが、これに代えて、ス
ナバ回路を用いてもよい。
In this embodiment, a capacitor C3 is connected to improve switching in accordance with FIG. 3, but a snubber circuit may be used instead.

また、MOS  FET4.5を駆動させる駆動回路は
、他励、自励の何れでもよい。特に、自励は放電灯及び
コンデンサの並列回路及びインダクタの直列回路、即ち
、第1図に示したインダクタ■、とコンデンサCと放電
灯3との組を、2個、並列接続した場合、インダクタ■
7、に巻線を設けて帰還信号を得ることができる。
Further, the drive circuit for driving the MOS FET 4.5 may be either separately excited or self-excited. In particular, self-excitation is achieved by connecting a parallel circuit of a discharge lamp and a capacitor and a series circuit of an inductor. ■
7, can be provided with a winding to obtain a feedback signal.

発明の効果 本発明は、上述したようにインバータ回路の出力端子間
に放電灯を取外した時にもMOS  FETに対し遅相
電流を流すためのインダクタンス素子を接続したので、
放電灯が外れた無負荷時等にあっても、MOS  FE
Tには常に遅相電流を流してスイッチングロスを軽減さ
せることができ、よって、安全領域でのスイッチング動
作を確保して発熱を抑制することができ、信頼性の高い
点灯回路とすることができる。
Effects of the Invention In the present invention, as described above, an inductance element is connected between the output terminals of the inverter circuit to cause a slow phase current to flow through the MOS FET even when the discharge lamp is removed.
Even if there is no load when the discharge lamp is disconnected, MOS FE
Switching loss can be reduced by constantly flowing a slow-phase current through T, thus ensuring switching operation in a safe range and suppressing heat generation, resulting in a highly reliable lighting circuit. .

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す回路図、第2図は電圧
、電流波形図、第3図は従来例を示す回路図、第4図は
電圧、電流波形図である。 2・・・インバータ回路、3・・・放電列、4,5・・
・MOS  FET、C,・・・スイッチング改善用コ
ンデンサ IDZ
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a voltage and current waveform diagram, FIG. 3 is a circuit diagram showing a conventional example, and FIG. 4 is a voltage and current waveform diagram. 2... Inverter circuit, 3... Discharge column, 4, 5...
・MOS FET, C, ... Capacitor IDZ for switching improvement

Claims (1)

【特許請求の範囲】[Claims] 直列接続した2個のMOSFETを駆動回路によりスイ
ッチングさせるとともにこのスイッチング出力を直列共
振回路に供給するインバータの発振動作により放電灯を
点灯させる放電灯点灯装置であつて、前記直列共振回路
の定数を前記放電灯の点灯中の前記MOSFETに対し
常に遅相電流を流す値に設定し、一方の前記MOSFE
Tのドレイン−ソース間にスイッチング改善用コンデン
サ又はスナバ回路を接続したハーフブリッジインバータ
型の放電灯点灯装置において、前記インバータ回路の出
力端子間に前記放電灯を取外した時にも前記MOSFE
Tに対し遅相電流を流すためのインダクタンス素子を接
続したことを特徴とする放電灯点灯装置。
A discharge lamp lighting device that lights a discharge lamp by the oscillation operation of an inverter that switches two MOSFETs connected in series by a drive circuit and supplies the switching output to a series resonant circuit, wherein the constant of the series resonant circuit is The value is set so that a slow phase current always flows through the MOSFET during lighting of the discharge lamp, and one of the MOSFETs
In a half-bridge inverter type discharge lamp lighting device in which a switching improvement capacitor or a snubber circuit is connected between the drain and source of the T, even when the discharge lamp is removed between the output terminals of the inverter circuit, the MOSFE
A discharge lamp lighting device characterized in that an inductance element for flowing a slow phase current is connected to the T.
JP21699888A 1988-08-31 1988-08-31 Discharge lamp lightup device Pending JPH0266895A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP21699888A JPH0266895A (en) 1988-08-31 1988-08-31 Discharge lamp lightup device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP21699888A JPH0266895A (en) 1988-08-31 1988-08-31 Discharge lamp lightup device

Publications (1)

Publication Number Publication Date
JPH0266895A true JPH0266895A (en) 1990-03-06

Family

ID=16697215

Family Applications (1)

Application Number Title Priority Date Filing Date
JP21699888A Pending JPH0266895A (en) 1988-08-31 1988-08-31 Discharge lamp lightup device

Country Status (1)

Country Link
JP (1) JPH0266895A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05242977A (en) * 1991-09-26 1993-09-21 General Electric Co <Ge> Electric ballast circuit for compact fluorescent lamp

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05242977A (en) * 1991-09-26 1993-09-21 General Electric Co <Ge> Electric ballast circuit for compact fluorescent lamp

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