JPH0270206U - - Google Patents
Info
- Publication number
- JPH0270206U JPH0270206U JP14814988U JP14814988U JPH0270206U JP H0270206 U JPH0270206 U JP H0270206U JP 14814988 U JP14814988 U JP 14814988U JP 14814988 U JP14814988 U JP 14814988U JP H0270206 U JPH0270206 U JP H0270206U
- Authority
- JP
- Japan
- Prior art keywords
- delay time
- feedforward
- memory
- feedforward compensation
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000003321 amplification Effects 0.000 claims description 6
- 230000006870 function Effects 0.000 claims description 6
- 238000003199 nucleic acid amplification method Methods 0.000 claims description 6
- 230000001934 delay Effects 0.000 claims 3
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 7
Landscapes
- Feedback Control In General (AREA)
- Control Of Position Or Direction (AREA)
Description
第１図は本考案に従うフイードフオワード制御
補償器を示すブロツク図、第２図は従来のフイー
ドフオワード制御補償器を示すブロツク図、第３
図はＤＣサーボモータを駆動源とする装置の装置
構成図、第４図はＤＣサーボモータの速度制御装
置の全体の構成を示すブロツク図、第５図はフイ
ードフオワード補償関数を求めた計算結果図、第
６図は３種類の目標速度について本考案の速度制
御装置で第３図のキヤリジの移動制御を行つた結
果を示す図である。
１……フイードフオワード補償関数メモリ、２
……遅延器、３……増幅器、４……遅延時間メモ
リ、５……増幅係数メモリ、６……目標速度、１
２……フイードフオワード補償信号。
FIG. 1 is a block diagram showing a feed-forward control compensator according to the present invention, FIG. 2 is a block diagram showing a conventional feed-forward control compensator, and FIG. 3 is a block diagram showing a conventional feed-forward control compensator.
The figure is a device configuration diagram of a device using a DC servo motor as a drive source, Figure 4 is a block diagram showing the overall configuration of a speed control device for a DC servo motor, and Figure 5 is a calculation for determining the feed forward compensation function. The result diagram, FIG. 6, is a diagram showing the results of controlling the movement of the carriage shown in FIG. 3 using the speed control device of the present invention for three types of target speeds. 1...Feed forward compensation function memory, 2
...Delay device, 3...Amplifier, 4...Delay time memory, 5...Amplification coefficient memory, 6...Target speed, 1
2...Feed forward compensation signal.
Claims (1)
制限を考慮したフイードフオワード制御補償器と
、制御対象物を一定速度に到達させるフイードバ
ツク制御補償器とを有するＤＣサーボモータの位
置制御装置であつて、 前記フイードフオワード制御補償器は、 前記フイードフオワード制御補償器のフイード
フオワード補償関数を記憶するフイードフオワー
ド補償関数メモリと、 前記制御対象物の目標速度に応じたフイードフ
オワード補償関数の遅延時間を記憶する遅延時間
メモリと、 前記フイードフオワード補償関数メモリより動
作開始時刻からの経過時間に応じフイードフオワ
ード補償信号を取り出し、前記遅延時間メモリよ
り遅延時間を取り出し、前記フイードフオワード
補償信号を遅延させる遅延器と、 前記制御対象物の前記目標速度に応じた前記遅
延時間により遅延させた前記フイードフオワード
補償信号を前記制御対象物の前記目標速度に応じ
増幅する増幅係数を記憶する増幅係数記憶メモリ
と、 前記増幅係数記憶メモリより増幅係数を取り出
し、前記制御対象物の前記目標速度に応じた前記
遅延時間により遅延させた前記フイードフオワー
ド補償信号を増幅する増幅器とを有し、 前記増幅器により得られる信号をフイードフオ
ワード信号として制御信号に加えることを特徴と
するＤＣサーボモータ速度制御装置。[Scope of Claim for Utility Model Registration] A DC servo motor that has a feed forward control compensator that takes into account input limitations and drive current limitations of the DC servo motor, and a feedback control compensator that allows a controlled object to reach a constant speed. A position control device, wherein the feedforward control compensator includes: a feedforward compensation function memory that stores a feedforward compensation function of the feedforward control compensator; a delay time memory for storing a delay time of a feedforward compensation function according to the target speed; and a delay time memory for storing a delay time of a feedforward compensation function according to the target speed; a delay device that retrieves a delay time from a delay time memory and delays the feedforward compensation signal; and a delay device that extracts a delay time from a delay time memory and delays the feedforward compensation signal; an amplification factor storage memory that stores an amplification coefficient to be amplified according to the target speed of the controlled object; and an amplification factor storage memory that retrieves the amplification factor from the amplification factor storage memory and delays it by the delay time that corresponds to the target speed of the controlled object. and an amplifier for amplifying the feedforward compensation signal, and the signal obtained by the amplifier is added to a control signal as a feedforward signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14814988U JPH0270206U (en) | 1988-11-14 | 1988-11-14 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14814988U JPH0270206U (en) | 1988-11-14 | 1988-11-14 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0270206U true JPH0270206U (en) | 1990-05-29 |
Family
ID=31419205
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14814988U Pending JPH0270206U (en) | 1988-11-14 | 1988-11-14 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0270206U (en) |
-
1988
- 1988-11-14 JP JP14814988U patent/JPH0270206U/ja active Pending
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