JPH0272018U - - Google Patents
Info
- Publication number
- JPH0272018U JPH0272018U JP15082188U JP15082188U JPH0272018U JP H0272018 U JPH0272018 U JP H0272018U JP 15082188 U JP15082188 U JP 15082188U JP 15082188 U JP15082188 U JP 15082188U JP H0272018 U JPH0272018 U JP H0272018U
- Authority
- JP
- Japan
- Prior art keywords
- variable resistance
- section
- transistors
- variable
- current
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Networks Using Active Elements (AREA)
- Control Of Amplification And Gain Control (AREA)
Description
第１図は、本考案の一実施例を示す回路図、第
２図は従来の可変抵抗回路を示す回路図、及び第
３図は第１図の具体回路例を示す回路図である。
７……バツフアアンプ、９……バイアス電源、
１２……第１可変抵抗部、１３……第２可変抵抗
部、１４……固定抵抗、１５……ボリユーム、１
６……制御部。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, FIG. 2 is a circuit diagram showing a conventional variable resistance circuit, and FIG. 3 is a circuit diagram showing a specific example of the circuit shown in FIG. 7... Buffer amplifier, 9... Bias power supply,
12...First variable resistance section, 13...Second variable resistance section, 14...Fixed resistance, 15...Volume, 1
6...Control unit.
Claims (1)
た第１可変抵抗部と、 前記増幅部にバイアス電圧を印加するバイアス
電源と、 該バイアス電源と前記出力端子との間に接続さ
れた第２可変抵抗部と、 該第２可変抵抗部と並列接続された抵抗と、 前記第１及び第２可変抵抗部の抵抗値を互いに
逆方向に変化させる制御部とを備えることを特徴
とする可変抵抗回路。 (2) 前記第１可変抵抗部は、差動接続された第
１及び第２トランジスタと、該第１及び第２トラ
ンジスタの共通エミツタに接続される電流源と、
前記第１及び第２トランジスタのコレクタ間に負
荷として接続される電流ミラー回路とを備え、前
記第２トランジスタのベース及びコレクタを共通
に出力端子に接続するとともに、前記制御部によ
り前記電流源に流れる電流を変化させて抵抗値を
可変したことを特徴とする請求項第１項記載の可
変抵抗回路。 (3) 前記第２可変抵抗部は、差動接続された第
３及び第４トランジスタを含み、前記抵抗は前記
第３及び第４トランジスタのベース間に接続され
ることを特徴とする請求項第１項記載の可変抵抗
回路。 (4) 前記制御部は、可変抵抗と該可変抵抗の値
に応じた出力電流を発生する第１及び第２電流発
生部とを備え、前記第１及び第２電流発生部の出
力電流の変化方向を互いに逆方向と成し、前記出
力電流をそれぞれ第１及び第２可変抵抗部に制御
の為に供給することを特徴とする請求項第１項記
載の可変抵抗回路。[Claims for Utility Model Registration] (1) An amplifier section to which an input signal is applied, a first variable resistance section connected between an output end and an output terminal of the amplifier section, and a bias voltage applied to the amplifier section. a second variable resistance section connected between the bias power source and the output terminal; a resistor connected in parallel with the second variable resistance section; and the first and second variable resistances. A variable resistance circuit comprising: a control section that changes resistance values of the sections in opposite directions. (2) the first variable resistance section includes first and second transistors that are differentially connected; and a current source that is connected to a common emitter of the first and second transistors;
a current mirror circuit connected as a load between the collectors of the first and second transistors, the base and collector of the second transistor are commonly connected to an output terminal, and the current flows to the current source by the control unit. 2. The variable resistance circuit according to claim 1, wherein the resistance value is varied by changing the current. (3) The second variable resistance section includes third and fourth transistors that are differentially connected, and the resistor is connected between the bases of the third and fourth transistors. The variable resistance circuit described in item 1. (4) The control unit includes a variable resistor and first and second current generating units that generate output currents according to the values of the variable resistor, and controls changes in the output currents of the first and second current generating units. 2. The variable resistance circuit according to claim 1, wherein the output currents are opposite to each other and the output currents are supplied to the first and second variable resistance sections for control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15082188U JPH0272018U (en) | 1988-11-18 | 1988-11-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP15082188U JPH0272018U (en) | 1988-11-18 | 1988-11-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0272018U true JPH0272018U (en) | 1990-06-01 |
Family
ID=31424305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP15082188U Pending JPH0272018U (en) | 1988-11-18 | 1988-11-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0272018U (en) |
-
1988
- 1988-11-18 JP JP15082188U patent/JPH0272018U/ja active Pending
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