JPH0273247U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 shows an example of this invention, and is a configuration diagram when the width N on time series data is 8. Fig. 2 is a time chart of each point in Fig. 1. Fig. 3 is a conventional diagram. This is a minimum value detection device for a case where the width N on time series data is 8. In the figure, 1 is a shift register, 2a, 2b...
2j is a Min detector, 3a, 3b, 3c are delay devices with delay lengths of 2 ⁰ , 2 ¹ , 2 ^{2 ,} 4 is a time series data input point, 5 is an output point of the delay device 3a, and 6 is a Min detector. The output point of the detector 2h, 7 is the delay device 3b
8 is the output point of the Min detector 2i, 9 is the output point of the delay device 3c, 10 is the Min detector 2j
is the output point of In the drawings, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of utility model registration request] In a minimum value detection device that detects the minimum value of time series data within a moving window of width N (N=2 ⁿ , n is an integer greater than 1) on time series data, a first input port and a second n Min detectors each having an input port and comparing the amplitudes of the data input to the first input port and the data input to the second input port, and storing and outputting the smaller data; and a delay The lengths of are respectively 2 ⁰ , 2 ¹ , ...2 ⁿ - ² , 2 ⁿ -
¹ , and the n delay devices are M i
The output of the previous stage is input to the first input port of each of the n detectors, and the output of the previous stage via the delay device is input to the second input port. A minimum value detection device characterized in that it is connected with.